中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

34 records (took 0.024 seconds)

    Nonvolatile memory devices
    6.
    发明授权
    Nonvolatile memory devices 有权
    非易失性存储器件

    公开(公告)号：US09184164B2

    公开(公告)日：2015-11-10

    申请号：US14134457

    申请日：2013-12-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Chang-Hyun Lee ,  Jung-Dal Choi

    IPC: H01L21/336 ,  H01L27/105 ,  H01L27/115 ,  G11C16/04

    CPC classification number: H01L27/1052 ,  G11C16/0483 ,  H01L27/11521 ,  H01L27/11524

    Abstract: A nonvolatile memory device includes a string selection transistor, a plurality of memory cell transistors, and a ground selection transistor electrically connected in series to the string selection transistor and to the pluralities of memory cell transistors. First impurity layers are formed at boundaries of the channels and the source/drain regions of the memory cell transistors. The first impurity layers are doped with opposite conductivity type impurities relative to the source/drain regions of the memory cell transistors. Second impurity layers are formed at boundaries between a channel and a drain region of the string selection transistor and between a channel and a source region of the ground selection transistor. The second impurity layers are doped with the same conductivity type impurities as the first impurity layers and have a higher impurity concentration than the first impurity layers.

    Abstract translation: 非易失性存储器件包括串选择晶体管，多个存储单元晶体管和与串选择晶体管和多个存储单元晶体管串联电连接的接地选择晶体管。 在存储单元晶体管的沟道和源极/漏极区的边界处形成第一杂质层。 相对于存储单元晶体管的源/漏区，第一杂质层掺杂有相反导电类型的杂质。 第二杂质层形成在串选择晶体管的沟道和漏极区之间的边界处，并且在地选择晶体管的沟道和源极区之间形成。 第二杂质层掺杂有与第一杂质层相同的导电类型杂质，并且具有比第一杂质层更高的杂质浓度。

    Method of programming a nonvolatile memory device
    7.
    发明授权
    Method of programming a nonvolatile memory device 有权
    非易失性存储器件编程方法

    公开(公告)号：US09159432B2

    公开(公告)日：2015-10-13

    申请号：US13790409

    申请日：2013-03-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Chang-Hyun Lee ,  Jee-Yeon Kang ,  Dong-Hoon Jang ,  Jung-Dal Choi

    IPC: G11C16/24 ,  G11C16/04 ,  G11C16/10

    CPC classification number: G11C16/24 ,  G11C16/0483 ,  G11C16/10

    Abstract: In method of programming a nonvolatile memory device including first and second cell strings that are coupled to one bitline, a first channel of the first cell string and a second channel of the second cell string are precharged by applying a first voltage to the bitline, one cell string is selected from the first and second cell strings, and a memory cell included in the selected cell string is programmed by applying a second voltage greater than a ground voltage and less than the first voltage to the bitline.

    Abstract translation: 在编程包括耦合到一个位线的第一和第二单元串的非易失性存储器件的方法中，通过向位线施加第一电压来预充电第一单元串的第一通道和第二单元串的第二通道，一个 从第一和第二单元串中选择单元串，并且通过向位线施加大于接地电压并小于第一电压的第二电压来对包括在所选单元串中的存储单元进行编程。

Patent Agency Ranking