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公开(公告)号:US11626501B2
公开(公告)日:2023-04-11
申请号:US17039083
申请日:2020-09-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: In Yeal Lee , Ju Youn Kim , Jin-Wook Kim , Ju Hun Park , Deok Han Bae , Myung Yoon Um
IPC: H01L29/423 , H01L23/528 , H01L21/84 , H01L27/088 , H01L27/108 , H01L29/49 , H01L23/522 , H01L21/02
Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, and a gate contact in the gate structure. The gate structure includes a gate electrode extending in a first direction and a gate capping pattern on the gate electrode. The gate contact is connected to the gate electrode. The gate electrode includes a protrusion extending along a boundary between the gate contact and the gate capping pattern.
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公开(公告)号:US11296029B2
公开(公告)日:2022-04-05
申请号:US17007265
申请日:2020-08-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ju Youn Kim , Deok Han Bae , Jin-Wook Kim , Ju Hun Park , Myung Yoon Um , In Yeal Lee
IPC: H01L23/535 , H01L29/06 , H01L29/423 , H01L29/417 , H01L29/786 , H01L29/08 , H01L29/78 , H01L21/3213 , H01L21/768
Abstract: A semiconductor device includes an active pattern extending in a first horizontal direction on a substrate, a gate electrode extending in a second horizontal direction across the active pattern, and including a first portion, and a second portion protruding upward from the first portion in a vertical direction, a capping pattern extending in the second horizontal direction on the gate electrode, and a gate contact disposed on the second portion of the gate electrode, overlapping the active pattern, and penetrating the capping pattern to connect the gate electrode.
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公开(公告)号:US20210265351A1
公开(公告)日:2021-08-26
申请号:US17318133
申请日:2021-05-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eui Chul Hwang , Ju Youn Kim , Hyung Joo Na , Bong Seok Suh , Sang Min Yoo , Joo Ho Jung , Sung Moon Lee
IPC: H01L27/092 , H01L27/02 , H01L29/423 , H01L29/08 , H01L21/8234 , H01L21/311 , H01L21/306 , H01L21/762 , H01L29/66
Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.
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公开(公告)号:US10930651B2
公开(公告)日:2021-02-23
申请号:US16238988
申请日:2019-01-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ju Youn Kim , Se Ki Hong
IPC: H01L27/092 , H01L29/49 , H01L29/423 , H01L21/8238 , H01L29/78 , H01L29/775 , H01L29/739 , H01L29/51 , H01L27/11
Abstract: A semiconductor device includes a substrate including a first area and a second area, and first and second transistors formed in the first area and the second area, respectively. The first transistor includes a first gate insulating layer on the substrate, a first TiN layer on the first gate insulating layer contacting the first gate insulating layer, and a first filling layer on the first TiN layer. The second transistor includes a second gate insulating layer on the substrate, a second TiN layer on the second gate insulating layer contacting the second gate insulating layer, and a second filling layer on the second TiN layer. A threshold voltage of the first transistor is less than that of the second transistor, the second gate insulating layer does not comprise lanthanum, and an oxygen content of a portion of the first TiN layer is greater than that of the second TiN layer.
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公开(公告)号:US10910376B2
公开(公告)日:2021-02-02
申请号:US16290222
申请日:2019-03-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jun Mo Park , Ju Youn Kim , Hyung Joo Na , Sang Min Yoo , Eui Chul Hwang
IPC: H01L21/00 , H01L27/092 , H01L29/06 , H01L21/8238 , H01L29/78 , H01L29/66
Abstract: Semiconductor devices and methods of forming the same are provided. Semiconductor devices may include a substrate including first and second regions, first active fins extending in a first direction on the first region, second active fins extending parallel to the first active fins on the second region, and single diffusion break regions between two first active fins. Single diffusion break regions may be spaced apart from each other in the first direction. The semiconductor devices may also include a lower diffusion break region between two second active fins and extending in a second direction that is different from the first direction and upper diffusion break regions on the lower diffusion break region. The upper diffusion break regions may be spaced apart from each other in the first direction, and each of the upper diffusion break regions may overlap the lower diffusion break region.
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公开(公告)号:US10804265B2
公开(公告)日:2020-10-13
申请号:US16382382
申请日:2019-04-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Min Yoo , Ju Youn Kim , Hyung Joo Na , Bong Seok Suh , Joo Ho Jung , Eui Chul Hwang , Sung Moon Lee
IPC: H01L27/088 , H01L29/40 , H01L21/762 , H01L29/78
Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.
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公开(公告)号:US10043903B2
公开(公告)日:2018-08-07
申请号:US15384587
申请日:2016-12-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ju Youn Kim , Gi Gwan Park
IPC: H01L21/02 , H01L29/78 , H01L27/092 , H01L29/08 , H01L21/8238 , H01L29/66 , H01L29/165
Abstract: A semiconductor device includes a substrate including a first region and a second region, a first fin-type pattern in the first region, a second fin-type pattern in the second region, a first gate structure intersecting the first fin-type pattern, the first gate structure including a first gate spacer, a second gate structure intersecting the second fin-type pattern, the second gate structure including a second gate spacer, a first epitaxial pattern formed on opposite sides of the first gate structure, on the first fin-type pattern, the first epitaxial pattern having a first impurity, a second epitaxial pattern formed on opposite sides of the second gate structure, on the second fin-type pattern, the second epitaxial pattern having a second impurity, a first silicon nitride film extending along a sidewall of the first gate spacer, and a first silicon oxide film extending along a sidewall of the first gate spacer.
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公开(公告)号:US09000564B2
公开(公告)日:2015-04-07
申请号:US13725837
申请日:2012-12-21
Applicant: STMicroelectronics, Inc. , International Business Machines Corporation , GlobalFoundries Inc. , Samsung Electronics Co., Ltd.
Inventor: Pietro Montanini , Gerald Leake, Jr. , Brett H. Engel , Roderick Mason Miller , Ju Youn Kim
CPC classification number: H01L28/20 , H01L27/0629 , H01L27/0802 , H01L29/66545
Abstract: Use of a replacement metal gate (RMG) process provides an opportunity to create precision polysilicon resistors alongside metal gate transistors. During formation of a sacrificial polysilicon gate, the precision polysilicon resistor can also be formed from the same polysilicon film. The polysilicon resistor can be slightly recessed so that a protective insulating layer can cover the resistor during subsequent replacement of the sacrificial gate with a metal gate. The final structure of the precision polysilicon resistor fabricated using such a process is more compact and less complex than existing structures that provide metal resistors for integrated circuits having metal gate transistors. Furthermore, the precision polysilicon resistor can be freely tuned to have a desired sheet resistance by either implanting the polysilicon film with dopants, adjusting the polysilicon film thickness, or both.
Abstract translation: 使用替代金属栅极(RMG)工艺提供了在金属栅极晶体管旁边创建精密多晶硅电阻的机会。 在牺牲多晶硅栅极的形成期间,也可以由相同的多晶硅膜形成精密多晶硅电阻器。 多晶硅电阻器可以稍微凹进,使得在随后用金属栅极替换牺牲栅极时,保护绝缘层可以覆盖电阻器。 使用这种工艺制造的精密多晶硅电阻器的最终结构比为具有金属栅极晶体管的集成电路提供金属电阻器的现有结构更紧凑和更不复杂。 此外,通过用掺杂剂注入多晶硅膜,调节多晶硅膜厚度或两者,可以将精密多晶硅电阻器自由地调谐为具有所需的薄层电阻。
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公开(公告)号:US11476341B2
公开(公告)日:2022-10-18
申请号:US17105868
申请日:2020-11-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ju Youn Kim , Sang Jung Kang , Jin Woo Kim , Seul Gi Yun
IPC: H01L29/417 , H01L29/06 , H01L29/786
Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including a first region and a second region, a first gate structure extending in a first direction on the first region of the substrate, the first gate structure including a first gate insulation film and a first work function film disposed on the first gate insulation film, and a second gate structure extending in the first direction on the second region of the substrate, the second gate structure including a second gate insulation film and a second work function film disposed on the second gate insulation film, wherein a first thickness of the first work function film in a second direction intersecting the first direction is different from a second thickness of the second work function film in the second direction, and wherein a first height of the first work function film in a third direction perpendicular to the first and second directions is different from a second height of the second work function film in the third direction.
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公开(公告)号:US11462613B2
公开(公告)日:2022-10-04
申请号:US17032261
申请日:2020-09-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ju Youn Kim , Sang Jung Kang , Ji Su Kang , Yun Sang Shin
IPC: H01L29/06 , H01L27/092 , H01L29/08 , H01L29/417 , H01L29/78 , H01L29/423 , H01L29/786 , H01L29/66 , H01L21/762 , H01L21/8238
Abstract: A semiconductor device includes first to sixth active patterns extending in a first direction and spaced apart in the first direction and a second direction; a field insulating layer between the first and second active patterns, an upper surface thereof being lower than upper surfaces of the first and second active patterns; a first gate structure on the field insulating layer and the first active pattern and extending in the second direction; a second gate structure on the field insulating layer and the second active pattern and extending in the second direction; a first separation trench extending between the second and third active patterns and the fifth and sixth active patterns, and a second separation trench extending between the first and second gate structures, wherein a lowest surface of the first separation trench is higher than a lowest surface of the second separation trench.
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