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21.发明公开公开(公告)号：US20230155578A1
公开(公告)日：2023-05-18
申请号：US17702170
申请日：2022-03-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seungchul JUNG , Sang Joon KIM , Sungmeen MYUNG , Seok Ju YUN , Seungkeun YOON
Abstract: A computing device for performing a digital pulse-based crossbar operation and a method of operating the computing device. The computing device includes a plurality of input lines to which a pulse is selectively input in a sequential manner based on a corresponding input signal; a plurality of output lines crossing the input lines; a plurality of elements, each element being disposed at a cross point between a corresponding input line and a corresponding output line to transfer, to the corresponding output line, a pulse input to the corresponding input line in response to a corresponding weight being a first value; and a plurality of pulse counters, each pulse counter counting a number of pulses output from a corresponding output line.
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22.发明申请公开(公告)号：US20180048263A1
公开(公告)日：2018-02-15
申请号：US15664732
申请日：2017-07-31
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seok Ju YUN
Abstract: A frequency calibrator includes an input signal generator configured to generate an input signal based on an oscillation signal and an external signal; a frequency difference extractor configured to extract, from the input signal, a frequency difference signal having a frequency corresponding to a frequency difference between an external frequency of the external signal and an oscillation frequency of the oscillation signal; a divider configured to generate a division signal by dividing a signal having the oscillation frequency by a division ratio; and a frequency tuner configured to tune the oscillation frequency of the oscillation signal based on a result of comparing the frequency difference signal to the division signal.
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公开(公告)号：US20180019782A1
公开(公告)日：2018-01-18
申请号：US15474758
申请日：2017-03-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seok Ju YUN
CPC classification number: H04B1/406 , H03B5/08 , H03B5/1234 , H03B5/1237 , H03B5/24 , H03B5/32 , H03D1/00 , H03F1/565 , H03F3/19 , H03F3/245 , H03F2200/222 , H03F2200/294 , H03F2200/387 , H03F2200/451 , H03G3/3042
Abstract: A radio frequency (RF) transceiver includes a first oscillator configured to generate a first oscillation frequency associated with an RF signal, a second oscillator configured to generate a second oscillation frequency associated with a clock frequency, a counter configured to generate a counter output signal using the first oscillation frequency and the second oscillation frequency, and a comparer configured to generate a digital output signal associated with the RF signal by comparing an output value of the counter output signal to a reference value.
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24.发明申请DIGITAL PHASE-LOCKED LOOP (DPLL), METHOD OF CONTROLLING DPLL, AND ULTRA LOW POWER (ULP) TRANSCEIVER USING DPLL 有权数字相位锁定（DPLL），控制DPLL的方法和使用DPLL的超低功耗（ULP）收发器公开(公告)号：US20150207514A1
公开(公告)日：2015-07-23
申请号：US14600533
申请日：2015-01-20
Inventor： Seong Joong KIM , Seok Ju YUN , Young Jun HONG , Hyung Gu PARK , Kang Yoon LEE
CPC classification number: H03L7/0992 , H03L7/08 , H03L7/0995 , H03L7/18 , H04B1/40
Abstract: A phase-locked loop (PLL) includes a counter configured to measure voltage-controlled oscillator (VCO) information of an oscillator during a mask time, and a frequency tuner configured to tune a frequency of the oscillator to a target frequency, based on a comparison result obtained by comparing the VCO information to target frequency information.
Abstract translation: 锁相环（PLL）包括被配置为在屏蔽时间期间测量振荡器的压控振荡器（VCO）信息的计数器和配置成将振荡器的频率调谐到目标频率的频率调谐器，基于 通过将VCO信息与目标频率信息进行比较而获得的比较结果。
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公开(公告)号：US20250013714A1
公开(公告)日：2025-01-09
申请号：US18764855
申请日：2024-07-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jaehyuk LEE , Dong-Jin CHANG , Sungmeen MYUNG , Daekun YOON , Seok Ju YUN
IPC: G06F17/15
Abstract: A processor-implemented method includes receiving an input vector comprising a plurality of channels, performing a first convolution operation by allocating first chunks, obtained by dividing the input vector, to a plurality of first in-memory computing (IMC) macros, and performing a second convolution operation by allocating second chunks obtained by dividing a result of the first convolution operation to a plurality of second IMC macros.
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Patent Agency Ranking
公开(公告)号：US20240103809A1
公开(公告)日：2024-03-28
申请号：US18139567
申请日：2023-04-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong-Jin CHANG , Soon-Wan KWON , Seok Ju YUN , Jaehyuk LEE , Sungmeen MYUNG , Daekun YOON
CPC classification number: G06F7/507 , G06F7/504 , G06F7/5443
Abstract: Provided is a computation method of a memory processor configured to perform an operation between a first vector including first elements and a second vector including second elements, the first elements including respective first bits and the second elements including respective second bits, the method performed by the memory processor including: applying, to single-bit operation gates, the respective first bits and the respective second bits; obtaining bit operation result sum values for the respective first and second elements based on bit operation results obtained using the single-bit operation gates; and obtaining an operation result of the first vector and the second vector based on the bit operation result sum value.
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公开(公告)号：US20220357922A1
公开(公告)日：2022-11-10
申请号：US17546523
申请日：2021-12-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyungwoo LEE , Sang Joon KIM , Seok Ju YUN , Seungchul JUNG
Abstract: A multiply-accumulate (MAC) computation circuit includes: a bit-cell array configured to generate an analog output corresponding to a MAC operation result of an input signal; a first analog-to-digital conversion (ADC) circuit configured to determine an upper part of a digital output corresponding to the analog output; and a second ADC circuit configured to determine a lower part of the digital output based on a reference voltage corresponding to the upper part.
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公开(公告)号：US20200212961A1
公开(公告)日：2020-07-02
申请号：US16431835
申请日：2019-06-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Wonseok LEE , Seok Ju YUN , Sang Joon KIM , Jaechun LEE
IPC: H04B5/00
Abstract: Disclosed is a near-field communication (NFC) system that includes an NFC supporting apparatus. The NFC supporting apparatus includes a dual coil and a first switch. The dual coil includes an NFC band coil and a radio frequency (RF) band coil. An RF amplitude modulation signal is generated at the RF band coil in response to a transmission from an implantable device. The first switch is configured to switch the NFC band coil based on the RF amplitude modulation signal. The NFC band coil is configured to generate an NFC amplitude modulation signal at an NFC band coil of an NFC reader in response to the first switch.
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公开(公告)号：US20180219569A1
公开(公告)日：2018-08-02
申请号：US15936776
申请日：2018-03-27
Applicant: Samsung Electronics Co., Ltd.
Inventor： SeongJoong KIM , Joonseong KANG , Seok Ju YUN , Young Jun HONG
CPC classification number: H04B1/16 , H03J3/20 , H03J7/065 , H03J2200/40 , H03L7/0991 , H04B1/1027 , H04B2001/1072
Abstract: A frequency tuning apparatus includes: a frequency tuner configured to tune an oscillation frequency of an oscillator based on target information extracted from a mapping table in correspondence to a target frequency, and oscillation information collected from the oscillator; and a frequency compensator configured to compensate for a compensation error between the tuned oscillation frequency and the target frequency based on an offset table.
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公开(公告)号：US20170117862A1
公开(公告)日：2017-04-27
申请号：US15162677
申请日：2016-05-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seok Ju YUN , Seongjoong KIM , Yongkyu KIM , Young Jun HONG
CPC classification number: H03G3/3036 , H03B5/1212 , H03B5/1228 , H03B2200/0096 , H03D11/04 , H03F3/19 , H03F3/265 , H03F2200/102 , H03F2200/294 , H03F2200/451 , H03G3/3052
Abstract: A receiver includes a low noise amplifier (LNA) configured to amplify an input RF signal using a first current supplied by a first current source, and a voltage controlled oscillator (VCO) for applying an oscillation frequency to the amplified signal by generating an oscillation signal using the first current.
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