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公开(公告)号：US20230225138A1
公开(公告)日：2023-07-13
申请号：US18185817
申请日：2023-03-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yumin KIM , Seyun KIM , Jinhong KIM , Soichiro MIZUSAKI , Youngjin CHO
IPC: H01L47/00
CPC classification number: H10B63/84 , H10B63/34 , H10N70/011 , H10N70/8833 , H10N70/231 , H10N70/8828 , H10N70/841
Abstract: A memory device may include an insulating structure including a first surface and a protrusion portion protruding from the first surface in a first direction, a recording material layer on the insulating structure and extending along a protruding surface of the protrusion portion to cover the protrusion portion and extending onto the first surface of the insulating structure, a channel layer on the recording material layer and extending along a surface of the recording material layer, a gate insulating layer on the channel layer; and a gate electrode formed on the gate insulating layer at a location facing a second surface of the insulating structure. The second surface of the insulating structure may be a protruding upper surface of the protrusion portion.
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公开(公告)号：US20230083978A1
公开(公告)日：2023-03-16
申请号：US17989206
申请日：2022-11-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jungho YOON , Soichiro MIZUSAKI , Youngjin CHO
Abstract: A semiconductor device is provided. The semiconductor device includes a substrate a substrate, a first electrode structure on the substrate, the first electrode structure including first insulating patterns and first electrode patterns, the first insulating patterns alternately stacked with the first electrode patterns, a second electrode pattern on a sidewall of the first electrode structure, and a data storage film on a sidewall of the second electrode pattern. The data storage film has a variable resistance.
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公开(公告)号：US20220302380A1
公开(公告)日：2022-09-22
申请号：US17395040
申请日：2021-08-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Soichiro MIZUSAKI , Doyoon KIM , Seyun KIM , Yumin KIM , Jinhong KIM , Youngjin CHO
Abstract: A variable resistance memory may include first and second conductive elements spaced apart from each other on a variable resistance layer. The variable resistance layer may include first to third oxide layers sequentially arranged in a direction perpendicular to a direction in which the first and second conductive elements are arranged. A dielectric constant of the second oxide layer may be greater than dielectric constants of the first and third oxide layers.
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公开(公告)号：US20220246679A1
公开(公告)日：2022-08-04
申请号：US17523381
申请日：2021-11-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngjin CHO , Seyun KIM , Yumin KIM , Doyoon KIM , Jinhong KIM , Soichiro MIZUSAKI
Abstract: A variable resistance memory device includes a support layer including an insulating material; a variable resistance layer on the support layer and including a variable resistance material; a capping layer between the support layer and the variable resistance layer and protecting the variable resistance layer; a channel layer on the variable resistance layer; a gate insulating layer on the channel layer; and a plurality of gate electrodes and a plurality of insulators alternately and repeatedly arranged on the gate insulating layer in a first direction parallel with the channel layer. The capping layer may maintain oxygen vacancies formed in the variable resistance layer.
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公开(公告)号：US20220020437A1
公开(公告)日：2022-01-20
申请号：US17306302
申请日：2021-05-03
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yumin KIM , Seyun KIM , Jinhong KIM , Soichiro MIZUSAKI , Youngjin CHO
Abstract: A nonvolatile memory device and an operating method thereof are provided. The nonvolatile memory device includes a memory cell array including first to third memory cells sequentially arranged in a vertical stack structure and a control logic configured to apply a first non-selection voltage to the first memory cell, apply a second non-selection voltage different from the first non-selection voltage to the third memory cell, apply a selection voltage to the second memory cell, and select the second memory cell as a selection memory cell.
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Patent Agency Ranking
公开(公告)号：US20210202840A1
公开(公告)日：2021-07-01
申请号：US16999285
申请日：2020-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seyun KIM , Jinhong KIM , Soichiro MIZUSAKI , Jungho YOON , Youngjin CHO
Abstract: A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer and a second layer. The first layer is formed of a first material. The second layer is on the first layer and formed of a second material having a density different from a density of the first material. The first conductive element and a second conductive element are located on the variable resistance layer and spaced apart from each other in order to form a current path in the variable resistance layer. The current path is in a direction perpendicular to a direction in which the first layer and the second layer are stacked.
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27.发明申请公开(公告)号：US20200337119A1
公开(公告)日：2020-10-22
申请号：US16919792
申请日：2020-07-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hiesang SOHN , Seyun KIM , Haengdeog KOH , Doyoon KIM , Soichiro MIZUSAKI , Jinhong KIM , Hajin KIM , Minjong BAE , Changsoo LEE
IPC: H05B1/02 , H05B3/14 , B29C70/88 , C03C14/00 , B29C70/02 , C03C4/14 , C03C17/00 , C03C8/16 , C03C8/14 , H05B3/26
Abstract: A heating element includes a plurality of matrix particles and a conductive inorganic filler disposed at interfaces between the plurality of matrix particles to provide a conductive network.
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公开(公告)号：US20190110337A1
公开(公告)日：2019-04-11
申请号：US16145753
申请日：2018-09-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Haengdeog KOH , Hajin KIM , Minjong BAE , Doyoon KIM , Seyun KIM , Jinhong KIM , Soichiro MIZUSAKI , Changsoo Lee
Abstract: A composition for forming a heating element; a dried and sintered product thereof; and a method of preparing the composition for forming a heating element, the composition including a matrix particle, a composite filler, and a solvent, wherein the composite filler includes a core and a coating layer disposed on the core, the core includes a nanosheet filler, and the composition has a pH in a range of about 5 to about 9.
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公开(公告)号：US20180163971A1
公开(公告)日：2018-06-14
申请号：US15833519
申请日：2017-12-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Soichiro MIZUSAKI , Haengdeog Koh , Doyoon Kim , Seyun Kim , Jinhong Kim , Hajin Kim , Minjong Bae , Hiesang Sohn , Changsoo Lee
CPC classification number: F24C7/081 , F24C7/043 , F24C7/062 , F24C7/067 , H05B3/141 , H05B3/145 , H05B6/6482
Abstract: An electric oven includes a top plate and a bottom plate facing each other, two side plates facing each other, and a rear plate connecting the top plate, the bottom plate and the two side plates where the top plate, the bottom plate, the two side plates and the rear plate define a cavity having a front opening, a door which selectively opens and closes the front opening of the cavity, a casing which surrounds the cavity, a support member interposed between the casing and the cavity, and one or more planar heating elements which extend along one plane, are detachably supported by the support member, and apply radiant heat to the cavity.
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公开(公告)号：US20180160479A1
公开(公告)日：2018-06-07
申请号：US15830213
申请日：2017-12-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jinhong Kim , Changsoo Lee , Doyoon Kim , Haengdeog Koh , Seyun Kim , Hajin Kim , Soichiro MIZUSAKI , Minjong Bae , Hiesang Sohn
Abstract: A sheet heater includes a substrate; a first and second finger electrode each on the substrate to lengthwise extend in a first direction and be spaced apart from each other in a second direction; and a heating layer on the substrate to have a stripe shape lengthwise extended in the second direction to cross each of the first and second finger electrodes. The first finger electrode or the second finger electrode crossed by the heating layer is a pattern electrode in which an opening is defined, for the pattern electrode in which the opening is defined, an opening ratio is defined by a total planar area of the opening to a total planar area of the pattern electrode, and the opening ratio is in a range from about 40% to about 80%.
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