公开(公告)号：US08208305B2

公开(公告)日：2012-06-26

申请号：US12655157

申请日：2009-12-23

申请人： Toru Tanzawa

发明人： Toru Tanzawa

IPC分类号： G11C11/34

CPC分类号： G11C16/0483 ,  G11C16/28 ,  H01L27/115 ,  H01L27/11519

摘要： A non-volatile microelectronic memory that has a memory cell array, which includes memory cell string pairs that share a bitline contact, that have separate source lines, and that have at least two transistors within each memory cell string that may be programming for sharing the bitline contact.

摘要翻译： 具有存储单元阵列的非易失性微电子存储器，其包含共享位线接触的存储单元串对，其具有分离的源极线，并且在每个存储单元串中具有至少两个晶体管，其可编程以共享 位线接触

公开(公告)号：US20120013314A1

公开(公告)日：2012-01-19

申请号：US13243495

申请日：2011-09-23

申请人： Toru Tanzawa

发明人： Toru Tanzawa

IPC分类号： G05F1/577

CPC分类号： G05F1/577 ,  G11C5/145 ,  H02M3/1584 ,  Y10T307/406

摘要： The present disclosure includes circuits, systems and methods for regulating voltage. One voltage regulator system embodiment includes a voltage regulator having an output and a number of stages coupled in parallel to the output of the voltage regulator. Each stage includes a source follower circuit, and a sample and hold circuit coupled in series between the output of the voltage regulator and an input of the source follower circuit.

摘要翻译： 本公开包括用于调节电压的电路，系统和方法。 一个电压调节器系统实施例包括具有与电压调节器的输出并联耦合的输出和多个级的电压调节器。 每个级包括源极跟随器电路以及串联耦合在电压调节器的输出端和源极跟随器电路的输入端之间的取样和保持电路。

公开(公告)号：US07916544B2

公开(公告)日：2011-03-29

申请号：US12020460

申请日：2008-01-25

申请人： Toru Tanzawa

发明人： Toru Tanzawa

IPC分类号： G11C11/34

CPC分类号： G11C16/26 ,  G11C7/00 ,  G11C16/0408 ,  G11C16/10 ,  G11C16/12 ,  G11C16/3459

摘要： Embodiments are provided that include a method including providing a first pulsed gate signal to a selected memory cell, wherein the pulsed gate signal alternates between a first voltage level and a second voltage level during a time period and sensing a data line response to determine data stored on the selected memory of cells. Further embodiments provide a system including a memory device, having a regulator circuit coupled to a plurality of access lines of a NAND memory cell, and a switching circuit configured to sequentially bias at least one of the plurality of the access lines between a first voltage level and a second voltage level based on an input signal.

摘要翻译： 提供的实施例包括一种方法，包括向所选择的存储单元提供第一脉冲栅极信号，其中脉冲栅极信号在一段时间段内在第一电压电平和第二电压电平之间交替并感测数据线响应以确定存储的数据 在选定的单元格内存上。 另外的实施例提供一种包括存储器件的系统，该存储器件具有耦合到NAND存储器单元的多个访问线路的调节器电路，以及切换电路，被配置为顺序地将多个接入线路中的至少一个在第一电压电平 以及基于输入信号的第二电压电平。

公开(公告)号：US20100270994A1

公开(公告)日：2010-10-28

申请号：US12833692

申请日：2010-07-09

申请人： Toru Tanzawa ,  Peter B. Harrington

发明人： Toru Tanzawa ,  Peter B. Harrington

IPC分类号： G05F1/10

CPC分类号： G05F1/575 ,  G11C5/147

摘要： Voltage regulators, memories, and methods for providing a regulated output voltage are disclosed. For example, one such voltage regulator includes a comparator circuit, a driver circuit, an impedance circuit, and a modulation circuit. The comparator circuit generates an output voltage according to a difference between a reference voltage and a feedback voltage. The driver circuit is coupled to an output of the comparator circuit and drives the regulated output voltage at an output node according to the output voltage from the comparator circuit. The impedance circuit is coupled to the comparator circuit and provides the feedback voltage to the comparator circuit in response to a detection current from the output node. The modulation circuit is coupled to the impedance circuit and adjusts a modulation current component of the detection current to adjust the regulated output voltage.

摘要翻译： 公开了用于提供稳定输出电压的稳压器，存储器和方法。 例如，一个这样的电压调节器包括比较器电路，驱动电路，阻抗电路和调制电路。 比较器电路根据参考电压和反馈电压之间的差产生输出电压。 驱动器电路耦合到比较器电路的输出，并根据来自比较器电路的输出电压在输出节点处驱动调节输出电压。 阻抗电路耦合到比较器电路，并且响应于来自输出节点的检测电流将反馈电压提供给比较器电路。 调制电路耦合到阻抗电路并调节检测电流的调制电流分量以调节调节的输出电压。

公开(公告)号：US20090302815A1

公开(公告)日：2009-12-10

申请号：US12200457

申请日：2008-08-28

申请人： Toru Tanzawa

发明人： Toru Tanzawa

IPC分类号： G05F1/00 ,  H02J3/14

CPC分类号： G05F1/577 ,  G11C5/145 ,  H02M3/1584 ,  Y10T307/406

摘要： The present disclosure includes circuits, systems and methods for regulating voltage. One voltage regulator system embodiment includes a voltage regulator having an output and a number of stages coupled in parallel to the output of the voltage regulator. Each stage includes a source follower circuit, and a sample and hold circuit coupled in series between the output of the voltage regulator and an input of the source follower circuit.

摘要翻译： 本公开包括用于调节电压的电路，系统和方法。 一个电压调节器系统实施例包括具有与电压调节器的输出并联耦合的输出和多个级的电压调节器。 每个级包括源极跟随器电路以及串联耦合在电压调节器的输出端和源极跟随器电路的输入端之间的取样和保持电路。

公开(公告)号：US07535762B2

公开(公告)日：2009-05-19

申请号：US12046745

申请日：2008-03-12

申请人： Tomoharu Tanaka ,  Hiroshi Nakamura ,  Toru Tanzawa

发明人： Tomoharu Tanaka ,  Hiroshi Nakamura ,  Toru Tanzawa

IPC分类号： G11C16/04

CPC分类号： G11C16/0483 ,  G11C7/1048 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C11/565 ,  G11C16/26 ,  G11C2211/5642

摘要： A semiconductor memory device comprises memory cells, a bitline connected to the memory cells, a read circuit including a precharge circuit, and a first transistor connected between the bitline and the read circuit, wherein a first voltage is applied to a gate of the first transistor when the precharge circuit precharges the bitline, and a second voltage which is different from the first voltage is applied to the gate of the first transistor when the read circuit senses a change in a voltage of the bitline.

公开(公告)号：US20070297225A1

公开(公告)日：2007-12-27

申请号：US11848511

申请日：2007-08-31

申请人： Toru Tanzawa

发明人： Toru Tanzawa

IPC分类号： G11C16/30 ,  H03H11/26

CPC分类号： G11C8/10 ,  G11C8/06 ,  G11C16/12

摘要： A high voltage switching circuit that has a depletion mode NMOS transistor, an enhancement mode PMOS transistor and, an enhancement mode NMOS transistor. A control circuit generates first and second control signals. A first control signal controls the enhancement mode NMOS transistor and a logical combination of both control signals provides a bias to control the PMOS transistor. The bias on the PMOS transistor provides a gate voltage greater than ground potential after the high voltage has been switched to the circuit output.

摘要翻译： 具有耗尽型NMOS晶体管，增强型PMOS晶体管和增强型NMOS晶体管的高压开关电路。 控制电路产生第一和第二控制信号。 第一控制信号控制增强模式NMOS晶体管，并且两个控制信号的逻辑组合提供偏置以控制PMOS晶体管。 在高电压切换到电路输出之后，PMOS晶体管上的偏置提供大于接地电位的栅极电压。

公开(公告)号：US20070263453A1

公开(公告)日：2007-11-15

申请号：US11433341

申请日：2006-05-12

申请人： Toru Tanzawa

发明人： Toru Tanzawa

IPC分类号： G11C11/34

CPC分类号： G11C8/08 ,  G11C7/04 ,  G11C8/14 ,  G11C11/5621 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/30 ,  G11C16/3454

摘要： Method and apparatus for generating a word-line voltage are disclosed. A word-line voltage generator includes a first current source, an adjustable current source, and a voltage converter, all operably coupled to a current sum node. The first current source generates a first current wherein a voltage derived from the first current at least partially comprises a cell location-dependent temperature coefficient varying with a location of a memory cell in a string of interconnected bit cells. The adjustable current source generates a second current that is substantially independent of a temperature change. The voltage converter is configured for generating a word-line signal having a word-line voltage proportional to the first current.

摘要翻译： 公开了用于产生字线电压的方法和装置。 字线电压发生器包括可操作地耦合到电流和节点的第一电流源，可调电流源和电压转换器。 第一电流源产生第一电流，其中从第一电流导出的电压至少部分地包括随连续位单元串中的存储器单元的位置而变化的单元位置相关温度系数。 可调电流源产生基本上与温度变化无关的第二电流。 电压转换器被配置为产生具有与第一电流成比例的字线电压的字线信号。

公开(公告)号：US20070047335A1

公开(公告)日：2007-03-01

申请号：US11215836

申请日：2005-08-29

申请人： Toru Tanzawa

发明人： Toru Tanzawa

IPC分类号： G11C5/14

CPC分类号： G11C8/08 ,  G11C5/14 ,  G11C7/04 ,  G11C16/08 ,  G11C16/30

摘要： Methods and an apparatuses for generating a word-line voltage are disclosed. A word-line voltage generator includes a first current source, an adjustable current source, adjustable current sink, and a voltage converter, all operably coupled to a current sum node. The first current source generates a first current having a temperature coefficient substantially equal to a temperature coefficient of at least one bit cell. The adjustable current source generates a second current that is substantially independent of a temperature change. The adjustable current sink sinks a third current that is substantially independent of a temperature change. The voltage converter is configured for generating a word-line signal having a word-line voltage proportional to a reference current, wherein the reference current comprises the first current, plus the second current, and minus the third current.

摘要翻译： 公开了用于产生字线电压的方法和装置。 字线电压发生器包括第一电流源，可调电流源，可调电流吸收器和电压转换器，全部可操作地耦合到电流和节点。 第一电流源产生具有基本上等于至少一个位单元的温度系数的温度系数的第一电流。 可调电流源产生基本上与温度变化无关的第二电流。 可调电流吸收器吸收基本上独立于温度变化的第三电流。 电压转换器被配置为产生具有与参考电流成比例的字线电压的字线信号，其中参考电流包括第一电流加上第二电流，而减去第三电流。

公开(公告)号：US20070046341A1

公开(公告)日：2007-03-01

申请号：US11215802

申请日：2005-08-29

申请人： Toru Tanzawa

发明人： Toru Tanzawa

IPC分类号： H03L7/00

CPC分类号： H03K17/22 ,  H03K17/14

摘要： Methods and apparatuses for generating a power-on-reset signal that is substantially independent of temperature change are disclosed. A reset circuit comprises a voltage generator, a first resistance element, a current generator, and a comparator. The voltage generator is configured for generating a first voltage signal having a negative temperature coefficient. The first resistance element is operably coupled between a supply voltage and a second voltage signal. The current generator is operably coupled to the second voltage signal and configured for sinking a reference current having a positive temperature coefficient and an offset current. The comparator is configured for comparing the first voltage signal to the second voltage signal to generate a reset signal. The present invention further includes semiconductor devices, semiconductor wafers, and electronic systems including the method or apparatus for generating the power-on-reset signal.

摘要翻译： 公开了用于产生基本上与温度变化无关的上电复位信号的方法和装置。 复位电路包括电压发生器，第一电阻元件，电流发生器和比较器。 电压发生器被配置为产生具有负温度系数的第一电压信号。 第一电阻元件可操作地耦合在电源电压和第二电压信号之间。 电流发生器可操作地耦合到第二电压信号并且被配置用于吸收具有正温度系数和偏移电流的参考电流。 比较器被配置为将第一电压信号与第二电压信号进行比较以产生复位信号。 本发明还包括半导体器件，半导体晶片和包括用于产生上电复位信号的方法或装置的电子系统。