公开(公告)号：US07304356B2

公开(公告)日：2007-12-04

申请号：US11432907

申请日：2006-05-12

申请人： Tetsuya Takahashi

发明人： Tetsuya Takahashi

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/7395 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/407

摘要： A multiple-cell insulated-gate-bipolar-transistor chip is disclosed which includes a semiconductor substrate having formed therein a p+-type collector region and an n−-type base region, with a pn junction therebetween. An annular trench is etched in the substrate so as to surround the array of IGBT cells. Received in the trench are a dielectric layer which is held against the base region, and an electroconductive layer which is held against the base region via the dielectric layer and which is electrically coupled to the collector region. When the pn junction between the collector and base regions is reverse biased, the electroconductive layer creates at the annular periphery of the base region a depletion layer which is joined to a depletion layer created in the base region by the pn junction, thereby preventing current leakage from the side surfaces of the IGBT chip.

摘要翻译： 公开了一种多单元绝缘栅极 - 双极晶体管芯片，其包括其中形成有p + +型集电极区域和n-O - 型基极区域的半导体衬底 ，其间具有pn结。 在衬底中蚀刻环形沟槽，以便围绕IGBT单元的阵列。 在沟槽中接收的电介质层被保持在基极区域上，并且导电层通过介电层保持抵靠基极区域，并且电耦合到集电极区域。 当集电极和基极区之间的pn结被反向偏置时，导电层在基极区的环形周边产生耗尽层，该耗尽层通过pn结连接到在基极区中产生的耗尽层，从而防止漏电 从IGBT芯片的侧面。

公开(公告)号：US20060231867A1

公开(公告)日：2006-10-19

申请号：US11395772

申请日：2006-03-31

申请人： Tetsuya Takahashi

发明人： Tetsuya Takahashi

IPC分类号： H01L29/768

CPC分类号： H01L29/861 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/7394 ,  H01L29/7824 ,  H01L29/78624 ,  H01L29/868

摘要： A semiconductor device has a semiconductor base, an anode electrode, and a cathode electrode. The semiconductor base includes a P type semiconductor substrate, an insulating film, an N− type semiconductor region formed on the insulating film, an N+ type semiconductor region, and a P+ type semiconductor region facing the N+ type semiconductor region via the N− type semiconductor region. The semiconductor device further has an N type diffusion layer which is formed, in the N− type semiconductor region at the interface between the insulating film and the N− type semiconductor region, so as to have a concentration gradient such that the N type impurity concentration increases from the side of the anode electrode to the side of the cathode electrode.

摘要翻译： 半导体器件具有半导体基底，阳极电极和阴极电极。 半导体基底包括形成在绝缘膜上的P型半导体衬底，绝缘膜，N +型半导体区域，N + +型半导体区域和P 经由N + O型半导体区域面向N + +型半导体区域的超导型半导体区域。 半导体器件还具有N型扩散层，其在绝缘膜和N +型半导体区域之间的界面处形成在N + - 型半导体区域中， 使得具有浓度梯度，使得N型杂质浓度从阳极侧到阴极侧增加。

公开(公告)号：US06904928B2

公开(公告)日：2005-06-14

申请号：US10694254

申请日：2003-10-27

申请人： Patrick Powell ,  Takehiro Nagase ,  Tetsuya Takahashi

发明人： Patrick Powell ,  Takehiro Nagase ,  Tetsuya Takahashi

IPC分类号： F02M25/08 ,  B60K15/035 ,  F02M37/00 ,  F16K24/00 ,  F16K24/04 ,  F16K31/22

CPC分类号： F16K24/044 ,  Y10T137/3099 ,  Y10T137/86324

摘要： A vapor vent valve for a fuel pump module, wherein the valve assembly attaches directly to the bottom side of the fuel pump module flange within the interior volume of the fuel tank. When rising fuel exerts a force on the valve assembly pushing the float assembly upwards, the valve head attached to the float assembly seals directly against a valve seat on the underside of the modular flange, covering the vapor release aperture located through the flange, preventing fuel from escaping through the vent aperture. In providing a direct seal of the valve head against the modular flange, additional sealing means and potential emission sources between the valve housing and the modular flange are eliminated.

摘要翻译： 一种用于燃料泵模块的蒸汽排放阀，其中所述阀组件直接附接到所述燃料箱模块凸缘的底侧，所述燃料泵模块凸缘在所述燃料箱的内部容积内。 当上升的燃料在阀组件上施加力以将浮子组件向上推动时，附接到浮子组件的阀头直接抵靠在模块化凸缘的下侧上的阀座，覆盖通过凸缘定位的蒸气释放孔，从而防止燃料 从通风孔中逃逸。 在提供阀头相对于模块化法兰的直接密封时，消除了在阀壳体和模块化凸缘之间的额外的密封装置和潜在的排放源。

公开(公告)号：US06377979B1

公开(公告)日：2002-04-23

申请号：US09210646

申请日：1998-12-14

申请人： Toshiro Yamashita ,  Toshiaki Shimoda ,  Tetsuya Takahashi ,  Kazushige Harada

发明人： Toshiro Yamashita ,  Toshiaki Shimoda ,  Tetsuya Takahashi ,  Kazushige Harada

IPC分类号： G06F15167

CPC分类号： H04L29/06 ,  H04L67/1002

摘要： A multiple-processor system uses transfer blocks each having a size equal to or less than the capacity of a shared memory when transferring data from a master system to a slave system via the shared memory. Each transfer block includes a data to be transferred from the master system or a plurality of divisional data obtained by dividing the data to be transferred; information representing a writing-start address at which the data to be transferred or the plurality of divisional data starts to be written in storage for the slave system; and information representing the length of the data or the plurality of divisional data.

摘要翻译： 当通过共享存储器将数据从主系统传送到从系统时，多处理器系统使用各自具有等于或小于共享存储器容量的传输块。 每个传送块包括要从主系统传送的数据或通过划分要传送的数据获得的多个分割数据; 表示要传送的数据或多个分割数据的写入开始地址的信息开始被写入用于从系统的存储器中; 以及表示数据长度或多个分割数据的信息。

公开(公告)号：US06344235B1

公开(公告)日：2002-02-05

申请号：US09424590

申请日：1999-11-24

申请人： Tadayoshi Iijima ,  Shigeo Kurose ,  Tetsuya Takahashi

发明人： Tadayoshi Iijima ,  Shigeo Kurose ,  Tetsuya Takahashi

IPC分类号： B05D512

CPC分类号： H01M4/043 ,  H01M4/02 ,  H01M4/0404 ,  H01M4/0409 ,  H01M4/0411 ,  H01M4/0414 ,  H01M4/0416 ,  H01M4/0435 ,  H01M4/131 ,  H01M4/139 ,  H01M4/505 ,  H01M4/525 ,  H01M4/625 ,  H01M10/0525

摘要： This invention is a method for producing an electrode for a non-aqueous electrolytic cell, in which a collector is coated with an electrode active material layer comprising an active material, flake graphite and a binder, which is characterized by that the graphite is subjected to a pulverization process twice or more, followed by mixing and pulverization using the active material, and provides an electrode for a secondary cell which is good in charge and discharge characteristics such as discharge capacity and charge and discharge cycle life, and improved in physical characteristics.

摘要翻译： 本发明是一种非水电解电池用电极的制造方法，其特征在于，使用含有活性物质，片状石墨和粘合剂的电极活性物质层， 粉碎过程两次或更多次，然后使用活性材料进行混合和粉碎，并且提供一种二次电池用电极，其放电特性，充放电循环寿命等放电特性良好，物理特性提高。

公开(公告)号：US06321355B1

公开(公告)日：2001-11-20

申请号：US09204153

申请日：1998-12-03

申请人： Kouji Izaki ,  Tetsuya Takahashi ,  Ryo Yamagata

发明人： Kouji Izaki ,  Tetsuya Takahashi ,  Ryo Yamagata

IPC分类号： G01R3128

CPC分类号： G01R31/318536

摘要： An LSI having a logic circuit and a test circuit is provided with a first register which is connected between an LSI input/output pin and the logic circuit and has a first input terminal to be outputted from the first register in accordance with a system clock signal and a second input terminal, a second register which has a first input terminal inputted with an output of the first register and a second input terminal inputted with scan-in data and an output of which is connected to the second input terminal of the first register, a selector circuit which is connected to one of the first input terminal of the second register and the second terminal of the first register and selects one of a signal relating to scan-out data and an output signal of the other register so that the selected signal is inputted to the one input terminal, and a third register which receives an output of the second register and provides the received output as scan-out data in accordance with another clock signal. An output of the third register is successively provided to another LSI input/output pin. The selector circuit includes a logic gate circuit inputted with a signal indicative of an LSI test mode and the output signal of the other register.

摘要翻译： 具有逻辑电路和测试电路的LSI具有连接在LSI输入/输出引脚和逻辑电路之间的第一寄存器，并具有根据系统时钟信号从第一寄存器输出的第一输入端 以及第二输入端子，第二寄存器，其具有输入了第一寄存器的输出的第一输入端子和输入了扫描数据的第二输入端子，其输出端连接到第一寄存器的第二输入端子 选择器电路，其连接到第二寄存器的第一输入端和第一寄存器的第二端之一，并选择与扫描输出数据有关的信号和另一寄存器的输出信号之一，使得所选择的 信号被输入到一个输入端，以及第三寄存器，其接收第二寄存器的输出，并根据另一个时钟信号将接收到的输出提供为扫描数据 l。 第三寄存器的输出依次提供给另一个LSI输入/输出引脚。 选择器电路包括输入了指示LSI测试模式的信号和另一个寄存器的输出信号的逻辑门电路。

公开(公告)号：US5897391A

公开(公告)日：1999-04-27

申请号：US896058

申请日：1997-07-17

申请人： Tetsuya Takahashi ,  Kensaku Sato

发明人： Tetsuya Takahashi ,  Kensaku Sato

IPC分类号： H01R33/02 ,  H01R13/64 ,  H01R13/641 ,  H01R33/46 ,  H01R33/96 ,  H01R4/50

CPC分类号： H01R13/641 ,  H01R33/46

摘要： A central terminal (40) is provided in the central mount (9) of the plugging cavity (4) for contact with the plug terminal (85) of the lamp plug (B). An outer terminal (50) and a check terminal (70) are provided in the outer mount (10A) and the check mount (10B), respectively, for contact with the annular contact (88) on the side wall of the lamp plug (B).

摘要翻译： 中心端子（40）设置在插塞腔（4）的中心支架（9）中，用于与灯头（B）的插头端子（85）接触。 外部端子（50）和支架端子（70）分别设置在外部安装件（10A）和支架安装件（10B）中，用于与灯头的侧壁上的环形触点（88）接触 B）。

公开(公告)号：US5871377A

公开(公告)日：1999-02-16

申请号：US528498

申请日：1995-09-14

申请人： Kensaku Sato ,  Tetsuya Takahashi

发明人： Kensaku Sato ,  Tetsuya Takahashi

IPC分类号： F21V19/00 ,  F21S8/10 ,  H01K1/46 ,  H01R13/115 ,  H01R33/02 ,  H01R33/05 ,  H01R33/46 ,  H01R17/04

CPC分类号： H01R13/115 ,  H01R33/46 ,  Y10S439/918

摘要： The press-fit section 31 is made up of a lance member 33 for engagement with the latch apertures 26a and 29b of terminal legs 26 and 29 of central and peripheral terminals 3 and 4 and a press-fit portion 36 formed by a pair of linear protrusions 34L and 34R and a pair of pressdown pieces 35L and 35R so that by engaging the lance member 33 with the latch apertures 26a and 29b and holding the terminal legs 26 and 29 between the pressdown pieces 35L and 35R and the linear protrusions 34L and 34R, the terminal leges 26 and 29 are connected to the press-fit terminal 5 with the crimping section 30 crimped on an electrical wire 39.

摘要翻译： 压配合部31由用于与中心和外围端子3和4的端子腿26和29的闩锁孔26a和29b接合的喷枪构件33和由一对线性形成的压配合部36组成 突起34L和34R以及一对按压片35L和35R，使得通过将矛杆构件33与闩锁孔26a和29b接合并将端子腿26和29保持在压片35L和35R之间以及直线突起34L和34R 端子腿26和29连接到压配端子5，压接部分30压接在电线39上。

公开(公告)号：US5384505A

公开(公告)日：1995-01-24

申请号：US212395

申请日：1994-03-10

申请人： Tetsuya Takahashi

发明人： Tetsuya Takahashi

IPC分类号： H03K17/14 ,  G05F3/26 ,  H03K5/04 ,  H03K5/159 ,  H03K17/28 ,  G05F3/16

CPC分类号： G05F3/265 ,  H03K5/04

摘要： A delayed-pulse generator formed by a combination of a comparator, a current-mirror circuit, a capacitor, a switching transistor and a constant-current source further has a transistor whose emitter and base are connected together and which is connected in parallel and in forward-direction with respect to the constant-current source. A charging current of a very small value can be set stably without being affected by the leakage current flowing in the switching transistor even in a high temperature operation. Thus, a pulse having a long delay time can be readily obtained. In addition, an erroneous operation caused by the leakage current flowing in the switching transistor can be effectively suppressed.

摘要翻译： 由比较器，电流镜电路，电容器，开关晶体管和恒流源的组合形成的延迟脉冲发生器还具有其发射极和基极连接在一起并且并联连接的晶体管 相对于恒流源的正向。 即使在高温操作中，也可以稳定地设定非常小的值的充电电流，而不受开关晶体管中流过的漏电流的影响。 因此，可以容易地获得具有长延迟时间的脉冲。 此外，可以有效地抑制由开关晶体管中流过的漏电流引起的错误操作。

公开(公告)号：US4358794A

公开(公告)日：1982-11-09

申请号：US176804

申请日：1980-08-11

申请人： Naoki Kurakami ,  Tetsuya Takahashi ,  Etsuo Suzuki

发明人： Naoki Kurakami ,  Tetsuya Takahashi ,  Etsuo Suzuki

IPC分类号： H04N1/028 ,  G06T3/00 ,  H04N1/19 ,  H04N1/193 ,  H04N1/10 ,  H04N1/38 ,  H04N1/40

CPC分类号： H04N1/193

摘要： Appearance of joints between partly overlapping picture signal segments from a plurality of solid-state image scanners can be effectively avoided by means of automatically phase-setting the scan start signals for the respective image scanners relative to each other so that the logical sum signal of the marker signals contained in the respective signal segments is minimized in width. The marker as a source of the marker signals is fixedly arranged on the original-copy supporting table or separately therefrom in the region of overlap of the scan ranges of adjacent image scanners.

摘要翻译： 通过相对于彼此自动相位设定各图像扫描器的扫描开始信号，可以有效地避免来自多个固态图像扫描仪的部分重叠的图像信号段之间的接合的外观，使得 包含在各个信号段中的标记信号的宽度最小化。 作为标记信号的源的标记被固定地布置在原稿支撑台上或者在相邻的图像扫描器的扫描范围的重叠区域中与其分离。