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公开(公告)号：US08576636B2
公开(公告)日：2013-11-05
申请号：US13175090
申请日：2011-07-01
IPC分类号： G11C11/34
CPC分类号： H01L27/1156 , G11C11/404 , G11C16/0441 , H01L27/1207
摘要： A plurality of memory cells included in a memory cell array are divided into a plurality of blocks every plural rows. A common bit line is electrically connected to the divided bit lines through selection transistors in the blocks. One of the memory cells includes a first transistor, a second transistor, and a capacitor. The first transistor includes a first channel formation region. The second transistor includes a second channel formation region. The first channel formation region includes a semiconductor material different from the semiconductor material of the second channel formation region.
摘要翻译： 包括在存储单元阵列中的多个存储单元被分成多个块，每个多行。 公共位线通过块中的选择晶体管电连接到分割位线。 一个存储单元包括第一晶体管，第二晶体管和电容器。 第一晶体管包括第一沟道形成区。 第二晶体管包括第二沟道形成区域。 第一沟道形成区域包括与第二沟道形成区域的半导体材料不同的半导体材料。
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公开(公告)号：US08441841B2
公开(公告)日：2013-05-14
申请号：US13027546
申请日：2011-02-15
IPC分类号： G11C11/24
CPC分类号： G11C8/08 , G11C11/413
摘要： An object is to provide a semiconductor device with a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device includes a memory cell including a widegap semiconductor, for example, an oxide semiconductor and the semiconductor device includes a potential conversion circuit which functions to output a potential lower than a reference potential for reading data from the memory cell. With the use of a widegap semiconductor, a semiconductor device capable of sufficiently reducing the off-state current of a transistor included in a memory cell and capable of holding data for a long time can be provided.
摘要翻译： 目的是提供一种具有新颖结构的半导体器件，其即使在未被供电且具有无限数量的写周期的情况下也可以保存存储的数据。 半导体器件包括具有宽栅半导体例如氧化物半导体的存储单元，并且该半导体器件包括用于输出低于用于从存储单元读取数据的参考电位的电位的电位转换电路。 通过使用宽栅半导体，可以提供能够充分降低包含在存储单元中并能够长时间保持数据的晶体管的截止电流的半导体器件。
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公开(公告)号：US20120051116A1
公开(公告)日：2012-03-01
申请号：US13206547
申请日：2011-08-10
IPC分类号： G11C11/24
CPC分类号： G11C16/0433 , G11C11/404
摘要： A semiconductor device with a novel structure and a driving method thereof are provided. A semiconductor device includes a non-volatile memory cell including a writing transistor including an oxide semiconductor, a reading p-channel transistor including a semiconductor material different from that of the writing transistor, and a capacitor. Data is written to the memory cell by turning on the writing transistor so that a potential is supplied to a node where a source electrode of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of electric charge is held in the node. In a holding period, the memory cell is brought into a selected state and a source electrode and a drain electrode of the reading transistor are set to the same potential, whereby the electric charge stored in the node is held.
摘要翻译： 提供具有新颖结构的半导体器件及其驱动方法。 一种半导体器件包括：非易失性存储单元，包括包括氧化物半导体的写入晶体管，包括与写入晶体管的半导体材料不同的半导体材料的读取P沟道晶体管，以及电容器。 通过接通写入晶体管将数据写入存储单元，使得电位被提供给写入晶体管的源电极，电容器的一个电极和读取晶体管的栅极电连接的节点，以及 然后关闭写入晶体管，使得节点中保持预定量的电荷。 在保持期间，将存储单元置于选择状态，将读取晶体管的源电极和漏电极设定为相同的电位，由此保存存储在节点中的电荷。
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公开(公告)号：US20110199816A1
公开(公告)日：2011-08-18
申请号：US13022407
申请日：2011-02-07
IPC分类号： G11C11/24
CPC分类号： G11C11/24 , G11C11/403 , G11C11/405 , H01L27/1052 , H01L27/11521 , H01L27/1225
摘要： An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied, and the number of times of writing is not limited. The semiconductor device is formed using a wide gap semiconductor and includes a potential change circuit which selectively applies a potential either equal to or different from a potential of a bit line to a source line. Thus, power consumption of the semiconductor device can be sufficiently reduced.
摘要翻译： 目的在于提供具有新颖结构的半导体器件，其中即使在不提供电力的情况下也可以保持存储的数据，并且写入的次数不受限制。 半导体器件使用宽间隙半导体形成，并且包括电位改变电路，其选择性地将与位线的电位等于或不同的电位施加到源极线。 因此，可以充分降低半导体器件的功耗。
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公开(公告)号：US20110198593A1
公开(公告)日：2011-08-18
申请号：US13019330
申请日：2011-02-02
IPC分类号： H01L29/772
CPC分类号： H01L27/108 , H01L27/105 , H01L27/1052 , H01L27/1156 , H01L27/1225
摘要： A semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limitation on the number of times of writing. In the semiconductor device, a plurality of memory cells each including a first transistor, a second transistor, and a capacitor is provided in matrix and a wiring (also called a bit line) for connecting one memory cell to another memory cell and a source or drain electrode of the first transistor are electrically connected to each other through a source or drain electrode of the second transistor. Accordingly, the number of wirings can be smaller than that in the case where the source or drain electrode of the first transistor and the source or drain electrode of the second transistor are connected to different wirings. Thus, the degree of integration of the semiconductor device can be increased.
摘要翻译： 具有新颖结构的半导体器件，其中即使在不提供电力的情况下也可以保持存储的数据，并且对写入次数没有限制。 在半导体装置中，以矩阵形式设置有各自包括第一晶体管，第二晶体管和电容器的多个存储单元，以及用于将一个存储单元连接到另一个存储单元的源（或称为位线） 第一晶体管的漏极电极通过第二晶体管的源极或漏极电极彼此电连接。 因此，布线数量可以比第一晶体管的源极或漏极以及第二晶体管的源极或漏极连接到不同的布线的情况下的布线数量小。 因此，可以提高半导体器件的集成度。
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公开(公告)号：US08767442B2
公开(公告)日：2014-07-01
申请号：US13230093
申请日：2011-09-12
IPC分类号： G11C11/24
CPC分类号： H01L27/1052 , G11C8/08 , G11C11/403 , G11C11/405 , G11C11/4085 , G11C16/02 , G11C16/0433 , G11C16/0483 , G11C16/08 , G11C2211/4016
摘要： A semiconductor device in which stored data can be held even when power is not supplied and there is no limitation on the number of writing operations is provided. A semiconductor device is formed using a material which can sufficiently reduce the off-state current of a transistor, such as an oxide semiconductor material that is a wide-gap semiconductor. When a semiconductor material which can sufficiently reduce the off-state current of a transistor is used, the semiconductor device can hold data for a long period. In addition, by providing a capacitor or a noise removal circuit electrically connected to a write word line, a signal such as a short pulse or a noise input to a memory cell can be reduced or removed. Accordingly, a malfunction in which data written into the memory cell is erased when a transistor in the memory cell is instantaneously turned on can be prevented.
摘要翻译： 即使在不提供电力的情况下也可以保存存储的数据，并且没有限制写入操作的数量的半导体装置。 使用可以充分降低诸如作为宽间隙半导体的氧化物半导体材料的晶体管的截止电流的材料形成半导体器件。 当使用可以充分降低晶体管的截止电流的半导体材料时，半导体器件可以长期保存数据。 此外，通过提供电连接到写字线的电容器或噪声去除电路，可以减少或去除诸如短脉冲或输入到存储器单元的噪声的信号。 因此，可以防止当存储单元中的晶体管瞬间导通时擦除写入存储单元的数据的故障。
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公开(公告)号：US08406038B2
公开(公告)日：2013-03-26
申请号：US13094863
申请日：2011-04-27
IPC分类号： G11C11/24
CPC分类号： H01L29/78 , G11C11/403 , G11C11/406 , G11C16/0416 , G11C2211/4065 , H01L27/11521 , H01L27/1156 , H01L27/1207 , H01L27/1225
摘要： A semiconductor device includes a plurality of memory cells including a first transistor and a second transistor, a reading circuit including an amplifier circuit and a switch element, and a refresh control circuit. A first channel formation region and a second channel formation region contain different materials as their respective main components. A first gate electrode is electrically connected to one of a second source electrode and a second drain electrode. The other of the second source electrode and the second drain electrode is electrically connected to one of input terminals of the amplifier circuit. An output terminal of the amplifier circuit is connected to the other of the second source electrode and the second drain electrode through the switch element. The refresh control circuit is configured to control whether the switch element is turned on or off.
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公开(公告)号：US08563973B2
公开(公告)日：2013-10-22
申请号：US13041581
申请日：2011-03-07
IPC分类号： H01L29/786
CPC分类号： H01L27/11521 , G11C16/0408 , H01L27/11551 , H01L27/1156 , H01L27/1207 , H01L27/1225 , H01L28/60
摘要： A semiconductor device including a nonvolatile memory cell including a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor is provided. Data is written to the memory cell by turning on the writing transistor and supplying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected to each other, and then turning off the writing transistor so that a predetermined amount of charge is held at the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.
摘要翻译： 提供一种半导体器件，其包括包括具有氧化物半导体的写入晶体管的非易失性存储单元，包括与写入晶体管不同的半导体材料的读取晶体管和电容器。 通过接通写入晶体管并将电位提供给写入晶体管的源极（或电极），电容器的一个电极和读取晶体管的栅电极的节点，将数据写入存储单元 彼此电连接，然后关闭写入晶体管，使得在节点处保持预定量的电荷。 此外，当使用p沟道晶体管作为读取晶体管时，读取电位为正电位。
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公开(公告)号：US20120294070A1
公开(公告)日：2012-11-22
申请号：US13473752
申请日：2012-05-17
IPC分类号： G11C11/24
CPC分类号： G11C11/404 , G11C16/0433 , H01L27/1156 , H01L27/1225 , H01L27/1255
摘要： A semiconductor device includes a nonvolatile memory cell including a writing transistor including an oxide semiconductor, a reading transistor including a semiconductor material different from that of the writing transistor, and a capacitor. Data is written to the memory cell by turning on the writing transistor so that a potential is supplied to a node where a source electrode of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined potential is held in the node. Data is read out from the memory cell by supplying a precharge potential to a bit line, stopping the supply of the potential to the bit line, and determining whether the potential of the bit line is kept at the precharge potential or decreased.
摘要翻译： 半导体器件包括：非易失性存储单元，包括具有氧化物半导体的写入晶体管，包括与写入晶体管不同的半导体材料的读取晶体管，以及电容器。 通过接通写入晶体管将数据写入存储单元，使得电位被提供给写入晶体管的源电极，电容器的一个电极和读取晶体管的栅极电连接的节点，以及 然后关闭写入晶体管，使得在节点中保持预定的电位。 通过向位线提供预充电电位，停止对位线的电位供给，以及确定位线的电位是否保持在预充电电位还是减小，从存储单元读出数据。
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公开(公告)号：US20110199807A1
公开(公告)日：2011-08-18
申请号：US13022292
申请日：2011-02-07
CPC分类号： G11C11/405 , H01L27/11521 , H01L27/1156 , H01L27/1225 , H01L28/40
摘要： A semiconductor device includes a first signal line, a second signal line, a memory cell, and a potential converter circuit. The memory cell includes a first transistor including a first gate electrode, a first source electrode, a first drain electrode, and a first channel formation region; a second transistor including a second gate electrode, a second source electrode, a second drain electrode, and a second channel formation region; and a capacitor. The first channel formation region and the second channel formation region include different semiconductor materials. The second drain electrode, one electrode of the capacitor, and the first gate electrode are electrically connected to one another. The second gate electrode is electrically connected to the potential converter circuit through the second signal line.
摘要翻译： 半导体器件包括第一信号线，第二信号线，存储单元和电位转换器电路。 存储单元包括：第一晶体管，包括第一栅极电极，第一源电极，第一漏极电极和第一沟道形成区域; 第二晶体管，包括第二栅极电极，第二源极电极，第二漏极电极和第二沟道形成区域; 和电容器。 第一沟道形成区域和第二沟道形成区域包括不同的半导体材料。 第二漏电极，电容器的一个电极和第一栅电极彼此电连接。 第二栅极通过第二信号线电连接到电位转换器电路。
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