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公开(公告)号：US08767442B2
公开(公告)日：2014-07-01
申请号：US13230093
申请日：2011-09-12
IPC分类号： G11C11/24
CPC分类号： H01L27/1052 , G11C8/08 , G11C11/403 , G11C11/405 , G11C11/4085 , G11C16/02 , G11C16/0433 , G11C16/0483 , G11C16/08 , G11C2211/4016
摘要： A semiconductor device in which stored data can be held even when power is not supplied and there is no limitation on the number of writing operations is provided. A semiconductor device is formed using a material which can sufficiently reduce the off-state current of a transistor, such as an oxide semiconductor material that is a wide-gap semiconductor. When a semiconductor material which can sufficiently reduce the off-state current of a transistor is used, the semiconductor device can hold data for a long period. In addition, by providing a capacitor or a noise removal circuit electrically connected to a write word line, a signal such as a short pulse or a noise input to a memory cell can be reduced or removed. Accordingly, a malfunction in which data written into the memory cell is erased when a transistor in the memory cell is instantaneously turned on can be prevented.
摘要翻译： 即使在不提供电力的情况下也可以保存存储的数据，并且没有限制写入操作的数量的半导体装置。 使用可以充分降低诸如作为宽间隙半导体的氧化物半导体材料的晶体管的截止电流的材料形成半导体器件。 当使用可以充分降低晶体管的截止电流的半导体材料时，半导体器件可以长期保存数据。 此外，通过提供电连接到写字线的电容器或噪声去除电路，可以减少或去除诸如短脉冲或输入到存储器单元的噪声的信号。 因此，可以防止当存储单元中的晶体管瞬间导通时擦除写入存储单元的数据的故障。
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公开(公告)号：US08654566B2
公开(公告)日：2014-02-18
申请号：US13221947
申请日：2011-08-31
IPC分类号： G11C11/24
CPC分类号： G11C11/403 , G11C16/0433 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1156 , H01L27/1225 , H01L29/7869
摘要： The semiconductor device includes a memory cell including a first transistor including a first channel formation region, a first gate electrode, and first source and drain regions; a second transistor including a second channel formation region provided so as to overlap with at least part of either of the first source region or the first drain region, a second source electrode, a second drain electrode electrically connected to the first gate electrode, and a second gate electrode; and an insulating layer provided between the first transistor and the second transistor. In a period during which the second transistor needs in an off state, at least when a positive potential is supplied to the first source region or the first drain region, a negative potential is supplied to the second gate electrode.
摘要翻译： 半导体器件包括存储单元，其包括第一晶体管，第一晶体管包括第一沟道形成区，第一栅电极以及第一源区和漏区; 第二晶体管，包括设置成与第一源极区域或第一漏极区域中的至少一部分重叠的第二沟道形成区域，第二源极电极，电连接到第一栅极电极的第二漏极电极，以及 第二栅电极; 以及设置在第一晶体管和第二晶体管之间的绝缘层。 在第二晶体管需要处于截止状态的期间中，至少当向第一源极区域或第一漏极区域提供正电位时，向第二栅电极提供负电位。
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公开(公告)号：US08582348B2
公开(公告)日：2013-11-12
申请号：US13195089
申请日：2011-08-01
CPC分类号： G11C16/0408 , G11C11/405 , G11C16/02
摘要： It is an object to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied, and does not have a limitation on the number of writing operations. A semiconductor device includes a plurality of memory cells each including a transistor including a first semiconductor material, a transistor including a second semiconductor material that is different from the first semiconductor material, and a capacitor, and a potential switching circuit having a function of supplying a power supply potential to a source line in a writing period. Thus, power consumption of the semiconductor device can be sufficiently suppressed.
摘要翻译： 本发明的目的是提供一种具有新颖结构的半导体器件，其中即使在未提供电力的情况下也可以保持存储的数据，并且对写入操作的数量没有限制。 半导体器件包括多个存储单元，每个存储单元包括包括第一半导体材料的晶体管，包括与第一半导体材料不同的第二半导体材料的晶体管，以及电容器，以及电位切换电路， 在写作期间的电源供应潜力。 因此，可以充分地抑制半导体器件的功耗。
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公开(公告)号：US08451651B2
公开(公告)日：2013-05-28
申请号：US13027543
申请日：2011-02-15
IPC分类号： G11C11/24
CPC分类号： G11C16/0408 , H01L27/11519 , H01L27/11521 , H01L27/1156
摘要： An object is to provide a semiconductor device with a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device is formed using a material capable of sufficiently reducing the off-state current of a transistor, such as an oxide semiconductor material that is a widegap semiconductor. The use of a semiconductor material capable of sufficiently reducing the off-state current of a transistor allows data to be held for a long time. In addition, the timing of potential change in a signal line is delayed relative to the timing of potential change in a write word line. This makes it possible to prevent a data writing error.
摘要翻译： 目的是提供一种具有新颖结构的半导体器件，其即使在未被供电且具有无限数量的写周期的情况下也可以保存存储的数据。 使用能够充分降低诸如大孔半导体的氧化物半导体材料的晶体管的截止电流的材料形成半导体器件。 能够充分降低晶体管的截止电流的半导体材料的使用允许长时间保持数据。 此外，信号线中的电位变化的定时相对于写入字线的电位变化的定时被延迟。 这使得可以防止数据写入错误。
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公开(公告)号：US08406038B2
公开(公告)日：2013-03-26
申请号：US13094863
申请日：2011-04-27
IPC分类号： G11C11/24
CPC分类号： H01L29/78 , G11C11/403 , G11C11/406 , G11C16/0416 , G11C2211/4065 , H01L27/11521 , H01L27/1156 , H01L27/1207 , H01L27/1225
摘要： A semiconductor device includes a plurality of memory cells including a first transistor and a second transistor, a reading circuit including an amplifier circuit and a switch element, and a refresh control circuit. A first channel formation region and a second channel formation region contain different materials as their respective main components. A first gate electrode is electrically connected to one of a second source electrode and a second drain electrode. The other of the second source electrode and the second drain electrode is electrically connected to one of input terminals of the amplifier circuit. An output terminal of the amplifier circuit is connected to the other of the second source electrode and the second drain electrode through the switch element. The refresh control circuit is configured to control whether the switch element is turned on or off.
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公开(公告)号：US08339837B2
公开(公告)日：2012-12-25
申请号：US13206547
申请日：2011-08-10
IPC分类号： G11C11/24
CPC分类号： G11C16/0433 , G11C11/404
摘要： A semiconductor device with a novel structure and a driving method thereof are provided. A semiconductor device includes a non-volatile memory cell including a writing transistor including an oxide semiconductor, a reading p-channel transistor including a semiconductor material different from that of the writing transistor, and a capacitor. Data is written to the memory cell by turning on the writing transistor so that a potential is supplied to a node where a source electrode of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of electric charge is held in the node. In a holding period, the memory cell is brought into a selected state and a source electrode and a drain electrode of the reading transistor are set to the same potential, whereby the electric charge stored in the node is held.
摘要翻译： 提供具有新颖结构的半导体器件及其驱动方法。 一种半导体器件包括：非易失性存储单元，包括包括氧化物半导体的写入晶体管，包括与写入晶体管的半导体材料不同的半导体材料的读取P沟道晶体管，以及电容器。 通过接通写入晶体管将数据写入存储单元，使得电位被提供给写入晶体管的源电极，电容器的一个电极和读取晶体管的栅极电连接的节点，以及 然后关闭写入晶体管，使得节点中保持预定量的电荷。 在保持期间，将存储单元置于选择状态，将读取晶体管的源电极和漏电极设定为相同的电位，由此保存存储在节点中的电荷。
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公开(公告)号：US20120033510A1
公开(公告)日：2012-02-09
申请号：US13197839
申请日：2011-08-04
IPC分类号： G11C7/00
CPC分类号： G11C7/00 , G11C11/403 , G11C11/4087 , H01L27/11517 , H01L27/1156 , H01L27/1207 , H01L27/1225
摘要： An object is to provide a semiconductor device with a novel structure, which can hold stored data even when power is not supplied and which has an unlimited number of write cycles. The semiconductor device is formed using a memory cell including a wide band gap semiconductor such as an oxide semiconductor. The semiconductor device includes a potential change circuit having a function of outputting a potential lower than a reference potential for reading data from the memory cell. When the wide band gap semiconductor which allows a sufficient reduction in of state current of a transistor included in the memory cell is used, a semiconductor device which can hold data for a long period can be provided.
摘要翻译： 目的是提供具有新颖结构的半导体器件，其即使在不提供电力且具有无限数量的写周期的情况下也可以保存存储的数据。 使用包括诸如氧化物半导体的宽带隙半导体的存储单元形成半导体器件。 半导体器件包括具有输出低于用于从存储单元读取数据的参考电位的电位的功能的电位变化电路。 当使用允许存储单元中包括的晶体管的状态电流充分降低的宽带隙半导体时，可以提供能够长期保存数据的半导体器件。
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公开(公告)号：US20120014157A1
公开(公告)日：2012-01-19
申请号：US13175090
申请日：2011-07-01
IPC分类号： G11C5/06
CPC分类号： H01L27/1156 , G11C11/404 , G11C16/0441 , H01L27/1207
摘要： A plurality of memory cells included in a memory cell array are divided into a plurality of blocks every plural rows. A common bit line is electrically connected to the divided bit lines through selection transistors in the blocks. One of the memory cells includes a first transistor, a second transistor, and a capacitor. The first transistor includes a first channel formation region. The second transistor includes a second channel formation region. The first channel formation region includes a semiconductor material different from the semiconductor material of the second channel formation region.
摘要翻译： 包括在存储单元阵列中的多个存储单元被分成多个块，每个多行。 公共位线通过块中的选择晶体管电连接到分割位线。 一个存储单元包括第一晶体管，第二晶体管和电容器。 第一晶体管包括第一沟道形成区。 第二晶体管包括第二沟道形成区域。 第一沟道形成区域包括与第二沟道形成区域的半导体材料不同的半导体材料。
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公开(公告)号：US08563973B2
公开(公告)日：2013-10-22
申请号：US13041581
申请日：2011-03-07
IPC分类号： H01L29/786
CPC分类号： H01L27/11521 , G11C16/0408 , H01L27/11551 , H01L27/1156 , H01L27/1207 , H01L27/1225 , H01L28/60
摘要： A semiconductor device including a nonvolatile memory cell including a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor is provided. Data is written to the memory cell by turning on the writing transistor and supplying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected to each other, and then turning off the writing transistor so that a predetermined amount of charge is held at the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.
摘要翻译： 提供一种半导体器件，其包括包括具有氧化物半导体的写入晶体管的非易失性存储单元，包括与写入晶体管不同的半导体材料的读取晶体管和电容器。 通过接通写入晶体管并将电位提供给写入晶体管的源极（或电极），电容器的一个电极和读取晶体管的栅电极的节点，将数据写入存储单元 彼此电连接，然后关闭写入晶体管，使得在节点处保持预定量的电荷。 此外，当使用p沟道晶体管作为读取晶体管时，读取电位为正电位。
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公开(公告)号：US08502292B2
公开(公告)日：2013-08-06
申请号：US13182488
申请日：2011-07-14
IPC分类号： H01L27/108 , H01L29/94
CPC分类号： H01L27/11517 , G11C16/0433 , G11C16/26 , H01L27/1156 , H01L29/78
摘要： A semiconductor device with a novel structure is provided, which can hold stored data even when no power is supplied and which has no limitations on the number of writing operations. A semiconductor device is formed using a material which enables off-state current of a transistor to be reduced significantly; e.g., an oxide semiconductor material which is a wide-gap semiconductor. With use of a semiconductor material which enables off-state current of a transistor to be reduced significantly, the semiconductor device can hold data for a long period. In a semiconductor device with a memory cell array, parasitic capacitances generated in the nodes of the first to the m-th memory cells connected in series are substantially equal, whereby the semiconductor device can operate stably.
摘要翻译： 提供具有新颖结构的半导体器件，其即使在没有供电的情况下也可以保存存储的数据，并且对写入操作的数量没有限制。 使用能够显着降低晶体管的截止电流的材料形成半导体器件; 例如，作为宽间隙半导体的氧化物半导体材料。 通过使用能够显着降低晶体管的截止电流的半导体材料，半导体器件可以长期保存数据。 在具有存储单元阵列的半导体器件中，在串联连接的第一至第m存储器单元的节点中产生的寄生电容基本相等，由此半导体器件可以稳定地工作。
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