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公开(公告)号：US07689845B2
公开(公告)日：2010-03-30
申请号：US12245360
申请日：2008-10-03
摘要： A system may include acquisition of a supply voltage information representing past supply voltages supplied to an electrical component, acquisition of a temperature information representing past temperatures of the electrical component, and control of a performance characteristic of the electrical component based on the supply voltage information and the temperature information. Some embodiments may further include determination of a reliability margin based on the supply voltage information, the temperature information, and on a reliability specification of the electrical component, and change of the performance characteristic based on the reliability margin.
摘要翻译： 系统可以包括获取表示提供给电气部件的过去电源电压的电源电压信息，基于电源电压信息获取表示电气部件的过去温度的温度信息和电气部件的性能特性的控制，以及 温度信息。 一些实施例还可以包括基于电源电压信息，温度信息以及电气部件的可靠性规格以及基于可靠性裕度的性能特性的改变来确定可靠性裕度。
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公开(公告)号：US06763484B2
公开(公告)日：2004-07-13
申请号：US09894465
申请日：2001-06-28
申请人： James W. Tschanz , Siva G. Narendra , Vivek K. De
发明人： James W. Tschanz , Siva G. Narendra , Vivek K. De
IPC分类号： G01R3128
CPC分类号： G01R31/318575 , H03K2217/0018
摘要： A logic unit and method incorporating body biasing using scan chains, the logic unit comprising a functional unit block including a body and a scan chain, and a variable voltage source coupled to the scan chain to receive control signals from the scan chain and coupled to the body to provide a bias voltage to the body, and the method comprising identifying a preferred body bias voltage for a functional unit block having a body; and permanently programming a plurality of control signals coupled to a variable voltage source that provides the preferred body bias voltage to the body.
摘要翻译： 一种包括使用扫描链的主体偏置的逻辑单元和方法，所述逻辑单元包括包括主体和扫描链的功能单元块，以及耦合到所述扫描链的可变电压源，以从所述扫描链接收控制信号并耦合到所述扫描链 以向身体提供偏置电压，并且该方法包括识别具有身体的功能单元块的优选身体偏置电压; 并且永久地编程耦合到可变电压源的多个控制信号，所述可变电压源向身体提供优选的身体偏置电压。
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公开(公告)号：US09484917B2
公开(公告)日：2016-11-01
申请号：US13718372
申请日：2012-12-18
CPC分类号： H03K19/0016 , G05F1/10 , G05F1/461 , G05F1/59 , G06F1/3287 , G06F1/3296 , H03K3/0377 , H03K19/0008
摘要： Described is an apparatus which comprises: a clamp coupled between a first power supply and a second power supply; and a circuit to operate with the second power supply, wherein the clamp is operable to adjust the second power supply when the apparatus enters a low power mode.
摘要翻译： 描述了一种装置，其包括：耦合在第一电源和第二电源之间的夹具; 以及用于与第二电源操作的电路，其中当所述设备进入低功率模式时，所述钳位器可操作以调节所述第二电源。
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24.发明授权Method and apparatus for reducing power consumption through dynamic control of supply voltage and body bias including maintaining a substantially constant operating frequency 有权用于通过动态控制电源电压和身体偏压来降低功耗的方法和装置，包括保持基本恒定的工作频率公开(公告)号：US07120804B2
公开(公告)日：2006-10-10
申请号：US10328573
申请日：2002-12-23
申请人： James W. Tschanz , Yibin Ye , Liqiong Wei , Vivek K. De
发明人： James W. Tschanz , Yibin Ye , Liqiong Wei , Vivek K. De
CPC分类号： G06F1/3296 , G06F1/3203 , H03K2217/0018 , Y02D10/126 , Y02D10/172
摘要： An approach for power reduction of an integrated circuit device. In response to detecting a change in an activity factor associated with an integrated circuit device from a first activity factor to a second activity factor, a supply voltage and a body bias associated with the integrated circuit device are adjusted based on the second activity factor to reduce power consumption. For one aspect, the supply voltage and body bias are adjusted to maintain a substantially constant operating frequency for the integrated circuit device.
摘要翻译： 一种用于集成电路装置的功率降低的方法。 响应于检测到与集成电路器件相关联的活动因素从第一活动因素到第二活动因素的变化，基于第二活动因素来调整与集成电路设备相关联的电源电压和身体偏差以减少 能量消耗。 一方面，调整电源电压和体偏置以保持集成电路器件的基本恒定的工作频率。
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公开(公告)号：US06784688B2
公开(公告)日：2004-08-31
申请号：US10334410
申请日：2002-12-30
申请人： Muhammad M. Khellah , James W. Tschanz , Yibin Ye , Vivek K. De
发明人： Muhammad M. Khellah , James W. Tschanz , Yibin Ye , Vivek K. De
IPC分类号： H03K19003
CPC分类号： H04L25/14
摘要： According to some embodiments, provided are a first signal line, the first signal line coupled to a first repeater, the first repeater to convert a first signal from a received signal level to an output signal level, the first repeater to convert from a first signal level to a second signal level slower than from the second signal level to the first signal level, and a second signal line adjacent to the first signal line, the second signal line coupled to a second repeater adjacent to the first repeater, the second repeater to convert a second signal from a second received signal level to a second output signal level, the second repeater to convert from the first signal level to the second signal level slower than from the second signal level to the first signal level, wherein the received signal level is substantially equivalent to the second output signal level and wherein the second received signal level is substantially equivalent to the output signal level.
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公开(公告)号：US06642765B2
公开(公告)日：2003-11-04
申请号：US10010046
申请日：2001-12-06
申请人： Dejan Markovic , James W. Tschanz , Vivek K. De
发明人： Dejan Markovic , James W. Tschanz , Vivek K. De
IPC分类号： H03K3356
CPC分类号： H03K3/356156 , H03K3/0372 , H03K3/35625
摘要： Flip-flop circuitry having an input configured to receive an input signal and an output configured to deliver an output signal corresponding to the input signal; a clock terminal configured to provide timing signals for reception of the input signal at the input and transmission of the output signal at the output; two on-path inverters connected serially between the input and output, and configured not to respond to the timing signals; and two feedback inverters respectively connected in parallel with the two on-path inverters, the first and second feedback inverters being configured to respond to the timing signals.
摘要翻译： 触发器电路具有被配置为接收输入信号的输入和被配置为传送对应于输入信号的输出信号的输出; 时钟端子，其被配置为在输出处提供输入和输出输出信号时提供用于接收输入信号的定时信号; 两个通路反相器串联连接在输入和输出之间，并且被配置成不响应定时信号; 以及分别与两个通路反相器并联连接的两个反馈反相器，第一和第二反馈反相器被配置为响应于定时信号。
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27.发明申请RESILIENT REGISTER FILE CIRCUIT FOR DYNAMIC VARIATION TOLERANCE AND METHOD OF OPERATING THE SAME 有权用于动态变化公差的弹性寄存器文件电路及其操作方法公开(公告)号：US20140032980A1
公开(公告)日：2014-01-30
申请号：US13976859
申请日：2011-12-28
IPC分类号： G06F11/07
CPC分类号： G06F11/1068 , G06F9/30141 , G06F9/3861 , G06F11/0751 , G06F11/1008 , G11C7/18 , G11C29/42 , G11C29/52
摘要： The disclosed system and method detect and correct register file read path errors that may occur as a result of reducing or eliminating supply voltage guardbands and/or frequency guardbands for a CPU, thereby increasing overall energy efficiency of the system.
摘要翻译： 所公开的系统和方法检测并校正由于减少或消除CPU的电源电压保护带和/或频率保护带而可能发生的寄存器文件读取路径错误，从而提高了系统的总体能量效率。
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公开(公告)号：US20140003132A1
公开(公告)日：2014-01-02
申请号：US13536521
申请日：2012-06-28
申请人： Jaydeep P. Kulkarni , Muhammad M Khellah , James W. Tschanz , Bibiche M. Geuskens , Vivek K. De
发明人： Jaydeep P. Kulkarni , Muhammad M Khellah , James W. Tschanz , Bibiche M. Geuskens , Vivek K. De
CPC分类号： G11C11/419 , G11C7/227 , G11C11/412 , G11C11/413
摘要： Described is an apparatus for self-induced reduction in write minimum supply voltage for a memory element. The apparatus comprises: a memory element having cross-coupled inverters coupled to a first supply node; a power device coupled to the first supply node and a second supply node, the second supply node coupled to power supply; and an access device having a gate terminal coupled to a word-line, a first terminal coupled to the memory element, and a second terminal coupled to a bit-line which is operable to be pre-discharged to a logical low level prior to write operation.
摘要翻译： 描述了一种用于存储元件的写入最小电源电压的自感应降低的装置。 该装置包括：具有耦合到第一电源节点的交叉耦合的反相器的存储元件; 耦合到第一电源节点和第二电源节点的电源设备，第二电源节点耦合到电源; 以及具有耦合到字线的栅极端子，耦合到存储器元件的第一端子和耦合到位线的第二端子的存取装置，该位线可操作以在写入之前预放电到逻辑低电平 操作。
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公开(公告)号：US20130003469A1
公开(公告)日：2013-01-03
申请号：US13174352
申请日：2011-06-30
IPC分类号： G11C7/00
CPC分类号： G11C7/02 , G11C11/419
摘要： Embodiments for data dependent boosted (DDB) bit cells that may allow for smaller minimum cell supplies (Vmin) without necessarily having to increase device dimensions are presented.
摘要翻译： 呈现可能允许更小的最小电池电源（Vmin）的数据相关升压（DDB）位单元的实施例，而不必增加器件尺寸。
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公开(公告)号：US07400186B2
公开(公告)日：2008-07-15
申请号：US11324628
申请日：2006-01-03
申请人： James W. Tschanz , Victor Zia , Vivek K. De , Joseph Shor
发明人： James W. Tschanz , Victor Zia , Vivek K. De , Joseph Shor
IPC分类号： G05F1/10
CPC分类号： H03K19/00384
摘要： A system may include detection of a direction of transistor body current flow, and control of a regulator transistor to regulate a transistor body voltage based on the detected direction. In some aspects, a first regulator transistor is controlled if the direction of current flow is into a transistor body and a second regulator transistor is controlled if the direction of current flow is out of the transistor body.
摘要翻译： 系统可以包括检测晶体管体电流的方向，以及控制调节晶体管，以基于检测到的方向调节晶体管体电压。 在一些方面，如果电流方向进入晶体管体，则控制第一调节晶体管，如果电流方向流出晶体管体，则控制第二调节晶体管。
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