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公开(公告)号:US20210183915A1
公开(公告)日:2021-06-17
申请号:US16716652
申请日:2019-12-17
Applicant: Texas Instruments Incorporated
Inventor: Scott Robert Summerfelt , Hassan Omar Ali , Benjamin Stassen Cook
IPC: H01L27/146
Abstract: In described examples an integrated circuit (IC) has multiple layers of dielectric material overlying at least a portion of a surface of a substrate. A trench is etched through the layers of dielectric material to expose a portion the substrate to form a trench floor, the trench being surrounded by a trench wall formed by the layers of dielectric material. A metal perimeter band surrounds the trench adjacent the trench wall, the perimeter band being embedded in one of the layers of the dielectric material.
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公开(公告)号:US10969746B2
公开(公告)日:2021-04-06
申请号:US16730332
申请日:2019-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Abstract: In described examples, a physics cell includes: a laser source configured to emit light towards an atomic chamber containing an atomic gas; a photodetector configured to receive emissions from the atomic chamber; and a field coil for generating a magnetic field in the atomic chamber. An electronics circuit includes: a controller circuit coupled to the photodetector output and having control outputs to a digital to analog converter circuit; the digital to analog converter circuit having a coil current output to adjust the magnetic field, a modulation control output to control a modulation of the light, and having an output to control a voltage controlled oscillator; and a radio-frequency output circuit having a voltage controlled oscillator coupled to the output of the digital to analog converter circuit outputting a radio frequency signal to the laser source in the physics cell.
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公开(公告)号:US20210098331A1
公开(公告)日:2021-04-01
申请号:US16586720
申请日:2019-09-27
Applicant: Texas Instruments Incorporated
Inventor: Benjamin Stassen Cook , Nazila Dadvand , Daniel Lee Revier , Archana Venugopal
IPC: H01L23/373 , H01L23/00 , H01L23/498 , H01L21/48 , H01L21/285
Abstract: In described examples, a circuit (e.g., an integrated circuit) includes a semiconductor substrate that includes a frontside surface and a backside surface. A circuit element is included at the frontside surface. An optional electrical insulator layer can be included adjacent to the backside surface. A distributor layer is included adjacent to the backside surface. In some examples, the distributor layer includes a distributor material that includes a matrix of cohered nanoparticles and metallic particles embedded by the cohered nanoparticles.
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公开(公告)号:US20210013133A1
公开(公告)日:2021-01-14
申请号:US17039080
申请日:2020-09-30
Applicant: Texas Instruments Incorporated
Inventor: Benjamin Stassen Cook , Nazila Dadvand , Sreenivasan Koduri
IPC: H01L23/495 , H01L23/00 , H01L23/31 , C25D3/38
Abstract: A leadless packaged semiconductor device includes a metal substrate having at least a first through-hole aperture having a first outer ring and a plurality of cuts through the metal substrate to define spaced apart metal pads on at least two sides of the first through-hole aperture. A semiconductor die that has a back side metal (BSM) layer on its bottom side and a top side with circuitry coupled to bond pads is mounted top side up on the first outer ring. A metal die attach layer is directly between the BSM layer and walls of the metal substrate bounding the first through-hole aperture that provides a die attachment that fills a bottom portion of the first through-hole aperture. Bond wires are between metal pads and the bond pads. A mold compound is also provided including between adjacent ones of the metal pads.
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公开(公告)号:US10861763B2
公开(公告)日:2020-12-08
申请号:US15361397
申请日:2016-11-26
Applicant: Texas Instruments Incorporated
Inventor: Benjamin Stassen Cook , Archana Venugopal , Luigi Colombo , Robert Reid Doering
IPC: H01L23/34 , H01L23/495 , H01L23/48 , H01L23/52 , H01L23/367 , H01L27/02 , H01L21/3205 , H01L21/324 , H01L21/768 , H01L23/373 , H01L23/522 , H01L23/528 , H01L23/532 , H01L21/74
Abstract: An integrated circuit has a substrate which includes a semiconductor material, and an interconnect region disposed on the substrate. The integrated circuit includes a thermal routing trench in the substrate. The thermal routing trench includes a cohered nanoparticle film in which adjacent nanoparticles are cohered to each other. The thermal routing trench has a thermal conductivity higher than the semiconductor material contacting the thermal routing trench. The cohered nanoparticle film is formed by an additive process.
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公开(公告)号:US10801985B2
公开(公告)日:2020-10-13
申请号:US15173468
申请日:2016-06-03
Applicant: Texas Instruments Incorporated
Inventor: Benjamin Stassen Cook , Mehmet Aslan
IPC: G01N27/22 , B82Y30/00 , G01N31/22 , H01L21/02 , H01L21/288 , H01L21/321 , H01L49/02
Abstract: An integrated circuit (IC) with an impedance sensor fabricated on a surface of the substrate is disclosed. The impedance sensor includes a bottom conductive plate formed on the substrate. A sensing membrane is formed on the bottom conductive plate. A top conductive plate is formed on the sensing membrane, in which the top conductive plate is a fusion of conductive nanoparticles having a random three dimensional porosity that is permeable to a reagent.
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公开(公告)号:US20200212166A1
公开(公告)日:2020-07-02
申请号:US16236106
申请日:2018-12-28
Applicant: Texas Instruments Incorporated
Inventor: Benjamin Stassen Cook , Daniel Lee Revier
Abstract: In described examples, a method for fabricating a semiconductor device and a three dimensional structure, and packaging them together, includes: fabricating the integrated circuit on a substrate, immersing the substrate in a liquid encapsulation material, and illuminating the liquid encapsulation material to polymerize the liquid encapsulation material. Immersing the semiconductor device is performed to cover a layer of a platform in the liquid encapsulation material. The platform is a lead frame, a packaging substrate, or the substrate. The illuminating step targets locations of the liquid encapsulation material covering the layer. Illuminated encapsulation material forms solid encapsulation material that is fixedly coupled to contiguous portions of the semiconductor device and of the solid encapsulation material. The immersing and illuminating steps are repeated until a three dimensional structure is formed. The integrated circuit and the three dimensional structure are encapsulated in a single package.
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公开(公告)号:US20200211798A1
公开(公告)日:2020-07-02
申请号:US16234243
申请日:2018-12-27
Applicant: Texas Instruments Incorporated
Abstract: A switch that includes a droplet capable of spreading between two conductors to allow them to be coupled when a voltage is applied. The droplet can be enclosed by a cap that is bonded to a wafer that the droplet is placed upon, and include metallic properties. The cap can create a cavity that may be filled by a fluid, gas, or vapor. The cavity can have multiple conductors that extend partially or fully through it. The droplet can couple the conductors when specific voltages, or frequencies are applied to them. At the specific voltage and frequency the droplet can spread allowing at least two conductors to be coupled.
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公开(公告)号:US10551265B2
公开(公告)日:2020-02-04
申请号:US15698445
申请日:2017-09-07
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Benjamin Stassen Cook , Django Trombley , Adam Joseph Fruehling , Juan Alejandro Herbsommer
Abstract: A pressure transducer includes a cavity, a first dipolar molecule disposed within the cavity, and a second dipolar molecule disposed within the cavity. The first dipolar molecule exhibits a quantum rotational state transition at a fixed frequency with respect to cavity pressure. The second dipolar molecule exhibits a quantum rotation state transition at a frequency that varies with cavity pressure.
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公开(公告)号:US20200035550A1
公开(公告)日:2020-01-30
申请号:US16048821
申请日:2018-07-30
Applicant: Texas Instruments Incorporated
Inventor: Paul Merle Emerson , Benjamin Stassen Cook
IPC: H01L21/768 , H01L27/02 , H01L21/66 , H01L21/78 , H01L23/522
Abstract: Electronic device manufacturing and configuration methods include performing an additive deposition process that deposits a conductive, resistive, magnetic, semiconductor and/or thermally conductive material over a surface of a processed wafer metallization structure to set or adjust a circuit of a capacitor, an inductor, a resistor, an antenna and/or a thermal component of the metallization structure.
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