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公开(公告)号:US20200303455A1
公开(公告)日:2020-09-24
申请号:US16559254
申请日:2019-09-03
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Masahiko NAKAYAMA , Toshihiko NAGASE , Tomomi FUNAYAMA , Hironobu FURUHASHI , Kazumasa SUNOUCHI
Abstract: A nonvolatile storage device includes first and second interconnections and a memory cell between the first and second interconnections. The memory cell includes a storage element, a first switch, and a second switch. The first switch has two terminals and transitions from an off-state to an on-state when a first threshold voltage is applied between its terminals and then voltage between the terminals falls to a first hold voltage. The second switch has two terminals and transitions from an off-state to an on-state when a second threshold voltage is applied between its terminals and then voltage between the terminals falls to a second hold voltage. An off-current of the first switch is less than an off-current of the second switch. The first threshold voltage is greater than the second threshold voltage, which is greater than the first hold voltage, which is greater than or equal to the second hold voltage.
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公开(公告)号:US20200075072A1
公开(公告)日:2020-03-05
申请号:US16291484
申请日:2019-03-04
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Toshihiko NAGASE , Daisuke WATANABE
Abstract: According to one embodiment, a device includes an element including: a first stacked; a first nonmagnet on the first stacked; a second stacked on the first nonmagnet; a second nonmagnet on the second stacked; and a first magnet on the second nonmagnet. The second stacked including: a second magnet in contact with the second nonmagnet, including Fe and Co; a third nonmagnet at an opposite side of the second nonmagnet relative to the second magnet, including Mo or W; and a third magnet on the first nonmagnet, in contact with the third nonmagnet, including Fe and Co. An atomic ratio of Fe in the third magnet is lower than an atomic ratio of Fe in the second magnet.
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公开(公告)号:US20190079873A1
公开(公告)日:2019-03-14
申请号:US16186231
申请日:2018-11-09
Applicant: SK hynix Inc. , Toshiba Memory Corporation
Inventor: Yang-Kon KIM , Ki-Seon PARK , Bo-Mi LEE , Won-Joon CHOI , Guk-Cheon KIM , Daisuke WATANABE , Makoto NAGAMINE , Young-Min EEH , Koji UEDA , Toshihiko NAGASE , Kazuya SAWADA
IPC: G06F12/0875 , H01L43/08 , G11C11/16 , H01L43/10
Abstract: An electronic device includes semiconductor memory, the semiconductor memory including an under layer; a first magnetic layer located over the under layer and having a variable magnetization direction; a tunnel barrier layer located over the first magnetic layer; and a second magnetic layer located over the tunnel barrier layer and having a pinned magnetization direction, wherein the under layer includes a first metal nitride layer having a NaCl crystal structure and a second metal nitride layer containing a light metal.
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公开(公告)号:US20180205006A1
公开(公告)日:2018-07-19
申请号:US15917936
申请日:2018-03-12
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Daisuke WATANABE , Toshihiko NAGASE , Youngmin EEH , Kazuya SAWADA , Makoto NAGAMINE , Tadaaki OIKAWA , Kenichi YOSHINO , Hiroyuki OHTORI
CPC classification number: H01L43/08 , G11C11/161 , H01L27/222 , H01L27/228 , H01L43/02 , H01L43/10
Abstract: A magnetoresistive memory device includes a first magnetic layer having a variable magnetization direction; a second magnetic layer, a magnetization direction of the second magnetic layer being invariable; a first nonmagnetic layer provided between the first magnetic layer and the second magnetic layer; and a second nonmagnetic layer provided on the first magnetic layer, which is opposite the first nonmagnetic layer. The first magnetic layer having a stacked layer structure in which amorphous magnetic material layer is sandwiched between crystalline magnetic material layers.
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公开(公告)号:US20180198060A1
公开(公告)日:2018-07-12
申请号:US15843674
申请日:2017-12-15
Applicant: SK hynix Inc. , Toshiba Memory Corporation
Inventor: Yang-Kon KIM , Guk-Cheon KIM , Jae-Hyoung LEE , Jong-Koo LIM , Ku-Youl JUNG , Toshihiko NAGASE , Youngmin EEH
CPC classification number: H01L43/02 , G06F3/0604 , G06F3/0659 , G06F3/0679 , G11C11/161 , G11C11/165 , H01F10/30 , H01F10/3213 , H01F10/3254 , H01F10/3286 , H01F10/329 , H01L27/228 , H01L43/08 , H01L43/10 , H01L43/12
Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; a tunnel barrier layer interposed between the free layer and the pinned layer; and an under layer which is in contact with the free layer and includes a rare earth metal nitride.
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