公开(公告)号：US06664174B2

公开(公告)日：2003-12-16

申请号：US09928489

申请日：2001-08-14

申请人： Taiji Ema ,  Edward J. Swenson ,  Thomas W. Richardson ,  Yunlong Sun

发明人： Taiji Ema ,  Edward J. Swenson ,  Thomas W. Richardson ,  Yunlong Sun

IPC分类号： H01L2144

CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device includes a blocking layer 12 formed on a substrate 10, an insulation film 14 formed on the blocking layer 12, and a fuse 22 formed on the insulation film 14. The blocking layer 12 is formed below the fuse 22, whereby the fuse is disconnected by laser ablation, and the laser ablation can be stopped by the blocking layer 12 with good controllability without damaging the substrate. The fuses to be disconnected can be arranged at a very small pitch, which can improve integration of the fuse circuit.

摘要翻译： 该半导体器件包括形成在基板10上的阻挡层12，形成在阻挡层12上的绝缘膜14以及形成在绝缘膜14上的保险丝22。阻挡层12形成在保险丝22的下方，从而保险丝 通过激光烧蚀断开，并且激光烧蚀可以通过阻挡层12以良好的可控性而停止，而不损坏衬底。 要断开的保险丝可以以非常小的间距布置，这可以提高保险丝电路的集成度。

公开(公告)号：US5907773A

公开(公告)日：1999-05-25

申请号：US598427

申请日：1996-02-08

申请人： Shinichiro Ikemasu ,  Taiji Ema ,  Masaya Katayama

发明人： Shinichiro Ikemasu ,  Taiji Ema ,  Masaya Katayama

IPC分类号： H01L21/02 ,  H01L21/768 ,  H01L21/8242 ,  H01L27/108

CPC分类号： H01L28/87 ,  H01L27/10817 ,  H01L27/10852 ,  H01L21/76816 ,  Y10S148/106 ,  Y10S438/948

摘要： A method of producing a semiconductor device includes the steps of (a) preparing a substrate having a semiconductor element formed in a predetermined region of a surface of the substrate, (b) forming a first layer on the substrate, where the first layer is made of silicon oxide including at least one of boron and phosphor, (c) forming a second layer on a surface of the first layer, where the second layer is made of a material selected from a group consisting of silicon nitride and silicon oxide nitride, (d) coating a resist layer on the entire surface of the substrate, (e) exposing and developing a predetermined region of the resist layer using a reticle having a first opening so as to form a second opening in the resist layer, where the first opening has a polygonal shape having n corners respectively having obtuse angles and n is a natural number satisfying n.gtoreq.5, and (f) etching the second and first layers via the second opening.

公开(公告)号：US5874332A

公开(公告)日：1999-02-23

申请号：US683543

申请日：1996-07-15

申请人： Taiji Ema

发明人： Taiji Ema

IPC分类号： G11C11/404 ,  G11C11/4097 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

CPC分类号： H01L27/10882 ,  G11C11/4097 ,  H01L27/10894

摘要： A method for fabricating a dynamic random access memory comprises the steps of determining a design rule for word lines and bit lines and further for a pattern that extends from a memory cell array region to a peripheral region across a stepped boundary, determining a step height of the stepped boundary based upon the design rule, determining a capacitance of the memory cell capacitor based upon the step height of the stepped boundary, determining a parasitic capacitance of a bit line such that a ratio of the parasitic capacitance to the capacitance of the memory cell is smaller than a predetermined factor, and determining the number of the memory cells that are connected to one bit line based upon the parasitic capacitance of the bit line.

公开(公告)号：US5763910A

公开(公告)日：1998-06-09

申请号：US715327

申请日：1996-09-18

申请人： Taiji Ema

发明人： Taiji Ema

IPC分类号： H01L21/8242 ,  H01L27/108

CPC分类号： H01L27/10852 ,  H01L27/10873 ,  Y10S257/903 ,  Y10S438/911 ,  Y10S438/97

摘要： The present invention relates to a semiconductor device whose through-holes are formed by self-alignment and a method for fabricating the same. The through-holes formed on the gate electrodes can be formed simultaneously with SACs without complicating the fabrication process. The semiconductor device comprises a semiconductor substrate, a device isolation film defining devices regions on the semiconductor substrate, a pair of diffused layers formed in the device regions, gate electrodes formed through a first insulation film on the semiconductor substrate between the pair of diffused layers, and an etching stopper film covering side walls of the gate electrodes and parts of top surfaces of the gate electrodes which are extended inward by a prescribed distance from peripheral edges thereof. Whereby through-holes of an SAC structure can be formed in a later step, and the through-holes can be formed to expose the gate electrodes without removing the etching stopper film.

摘要翻译： 本发明涉及一种通过自对准形成通孔的半导体器件及其制造方法。 形成在栅电极上的通孔可以与SAC同时形成，而不会使制造过程复杂化。 半导体器件包括半导体衬底，在半导体衬底上限定器件区域的器件隔离膜，在器件区域中形成的一对扩散层，通过半导体衬底上的一对扩散层之间的第一绝缘膜形成的栅电极， 以及覆盖所述栅电极的侧壁和所述栅电极的上表面的从其周缘向内延伸规定距离的蚀刻停止膜。 由此可以在后面的步骤中形成SAC结构的通孔，并且可以形成通孔以暴露栅电极而不去除蚀刻停止膜。

公开(公告)号：US5696013A

公开(公告)日：1997-12-09

申请号：US463928

申请日：1995-06-05

申请人： Taiji Ema

发明人： Taiji Ema

IPC分类号： H01L21/82 ,  H01L21/3205 ,  H01L21/70 ,  H01L27/02 ,  H05K3/00 ,  H01L21/308 ,  H01L21/77

CPC分类号： G03F7/70433 ,  G03F7/70466 ,  H01L21/70 ,  H01L27/0207 ,  H05K3/0079

摘要： A semiconductor device having two or more unit circuit-blocks is produced by (a) forming in a chip area on a substrate two or more circuit-blocks by repeating, a required number of times, a process comprising exposing in sequence each block section within each chip area coated with a resist film, using masks for making respective circuit-blocks, developing a resist pattern, and a subsequent process using the pattern, and (b) forming external interconnections between the circuit-blocks using a resist pattern formed over the circuit-blocks.

摘要翻译： 具有两个或多个单元电路块的半导体器件通过以下步骤来产生：（a）通过重复所需次数的步骤，在基板上的芯片区域中形成两个或更多个电路块，所述过程包括依次暴露每个块部分内的每个块部分 每个芯片区域涂覆有抗蚀剂膜，使用用于制造各个电路块的掩模，显影抗蚀剂图案，以及使用该图案的后续处理，以及（b）在电路块之间形成外部互连， 电路块。

公开(公告)号：US5610854A

公开(公告)日：1997-03-11

申请号：US561287

申请日：1995-11-21

申请人： Taiji Ema

发明人： Taiji Ema

IPC分类号： H01L27/10 ,  H01L21/8242 ,  H01L27/105 ,  H01L27/108 ,  G11C11/24

CPC分类号： H01L27/10844 ,  H01L27/108 ,  H01L27/105 ,  Y10S438/965

摘要： A method for fabricating a semiconductor memory device includes the steps of forming, in a semiconductor substrate of a first conductivity type, a well of a second opposite conductivity type by protecting the substrate surface except for a part where the well of the second conductivity type is to be formed, oxidizing the exposed surface of the semiconductor substrate while using the same mask pattern to form a thick oxide film on the surface of the well, and removing the thick oxide film by an etching process to form a recessed surface on the well.

摘要翻译： 一种制造半导体存储器件的方法包括以下步骤：在第一导电类型的半导体衬底中，通过保护衬底表面，除了第二导电类型的阱是 以形成氧化半导体衬底的暴露表面，同时使用相同的掩模图案在阱的表面上形成厚的氧化膜，并且通过蚀刻工艺去除厚氧化膜，以在阱上形成凹陷表面。

公开(公告)号：US5539224A

公开(公告)日：1996-07-23

申请号：US264764

申请日：1994-06-23

申请人： Taiji Ema

发明人： Taiji Ema

IPC分类号： H01L21/82 ,  H01L21/3205 ,  H01L21/70 ,  H01L27/02 ,  H05K3/00 ,  H01L27/10

CPC分类号： G03F7/70433 ,  G03F7/70466 ,  H01L21/70 ,  H01L27/0207 ,  H05K3/0079

摘要： A semiconductor device of two or more unit circuit-blocks is formed in a common chip, as a first layer and which has no electrical interconnections between the unit circuit-blocks of the device. An upper, second interconnection layer is formed on the first layer and is patterned to include electrical interconnections between the unit circuit-blocks formed in the first, lower layer.

摘要翻译： 两个或多个单元电路块的半导体器件形成在公共芯片中作为第一层，并且在器件的单元电路块之间不具有电互连。 上部第二互连层形成在第一层上，并被图案化以包括形成在第一下层中的单元电路块之间的电互连。

公开(公告)号：US5514615A

公开(公告)日：1996-05-07

申请号：US441441

申请日：1995-05-15

申请人： Taiji Ema ,  Kazuo Itabashi

发明人： Taiji Ema ,  Kazuo Itabashi

IPC分类号： H01L27/11 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L27/1108

摘要： A method of producing a memory cell on a semiconductor substrate. The memory cell includes two transfer transistors, two driver transistors, two thin film transistor loads, and two memory capacitors. A field insulator layer is formed on the semiconductor substrate. A gate insulator layer is formed above the field insulator layer. A gate electrode of a driver transistor is produced by forming a first conductor layer above the gate insulator layer. Impurity regions are formed in the semiconductor substrate using the field insulator layer and the first conductor layer as masks. A first insulator layer is then formed. Source, drain and channel regions of a thin film transistor load are produced by forming a second conductor layer and injecting impurities into the second conductor layer. A second insulator layer is formed above the second conductor layer. A contact hole is formed to extend from the second insulator layer, through the second conductor layer, and to the first conductor layer. A storage electrode of a memory capacitor is produced by forming a third conductor layer which makes contact with the first conductor layer and the second conductor layer through the contact hole. A dielectric layer covering the storage electrode of the memory capacitor and a fourth conductor layer forming an opposing electrode of the memory capacitor are then successively produced.

摘要翻译： 一种在半导体衬底上制造存储单元的方法。 存储单元包括两个传输晶体管，两个驱动晶体管，两个薄膜晶体管负载和两个存储电容器。 在半导体衬底上形成场绝缘体层。 栅极绝缘体层形成在场绝缘体层的上方。 通过在栅极绝缘体层上形成第一导体层来制造驱动晶体管的栅电极。 使用场绝缘体层和第一导体层作为掩模在半导体衬底中形成杂质区域。 然后形成第一绝缘体层。 通过形成第二导体层并将杂质注入到第二导体层中来制造薄膜晶体管负载的源极，漏极和沟道区域。 第二绝缘体层形成在第二导体层的上方。 形成从第二绝缘体层穿过第二导电层延伸到第一导体层的接触孔。 通过形成通过接触孔与第一导体层和第二导体层接触的第三导体层来制造存储电容器的存储电极。 然后连续地制造覆盖存储电容器的存储电极的介质层和形成存储电容器的相对电极的第四导体层。

公开(公告)号：US5496758A

公开(公告)日：1996-03-05

申请号：US355489

申请日：1994-12-14

申请人： Taiji Ema

发明人： Taiji Ema

IPC分类号： H01L27/10 ,  H01L21/8242 ,  H01L27/105 ,  H01L27/108 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L27/10844 ,  H01L27/108 ,  H01L27/105 ,  Y10S438/965

摘要： A method for fabricating a semiconductor memory device includes the steps of forming, in a semiconductor substrate of a first conductivity type, a well of a second opposite conductivity type by protecting the substrate surface except for a part where the well of the second conductivity type is to be formed, oxidizing the exposed surface of the semiconductor substrate while using the same mask pattern to form a thick oxide film on the surface of the well, and removing the thick oxide film by an etching process to form a recessed surface on the well.

摘要翻译： 一种制造半导体存储器件的方法包括以下步骤：在第一导电类型的半导体衬底中，通过保护衬底表面，除了第二导电类型的阱是 以形成氧化半导体衬底的暴露表面，同时使用相同的掩模图案在阱的表面上形成厚的氧化膜，并且通过蚀刻工艺去除厚氧化膜，以在阱上形成凹陷表面。

公开(公告)号：US5424237A

公开(公告)日：1995-06-13

申请号：US159776

申请日：1993-12-02

申请人： Taiji Ema

发明人： Taiji Ema

IPC分类号： H01L21/3205 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L21/8232

CPC分类号： H01L27/10852 ,  H01L27/10808

摘要： A semiconductor device includes a semiconductor substrate, an insulation film formed on the semiconductor substrate, a film formed on the insulation film having a side wall, and a side wall film formed on the insulation film so as to surround the side wall of the film. The side wall film has a slope and satisfies a condition a>d, where a is a width of a bottom surface of the side wall film which is in contact with the insulation film, and d is a thickness of the film.

摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上的绝缘膜，形成在具有侧壁的绝缘膜上的膜和形成在绝缘膜上以围绕膜的侧壁的侧壁膜。 侧壁膜具有斜率并且满足条件a> d，其中a是与绝缘膜接触的侧壁膜的底面的宽度，d是膜的厚度。