公开(公告)号：US09147710B2

公开(公告)日：2015-09-29

申请号：US13948217

申请日：2013-07-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Hsien Chou ,  Wen-I Hsu ,  Tsun-Kai Tsao ,  Chih-Yu Lai ,  Jiech-Fun Lu ,  Yeur-Luen Tu

IPC: H01L31/062 ,  H01L31/113 ,  H01L27/146 ,  H01L31/18

CPC classification number: H01L27/14614 ,  H01L27/14636 ,  H01L27/14643 ,  H01L27/14689 ,  H01L31/18

Abstract: The present disclosure relates to a method the present disclosure relates to an active pixel sensor having a gate dielectric protection layer that reduces damage to an underlying gate dielectric layer during fabrication, and an associated method of formation. In some embodiments, the active pixel sensor has a photodetector disposed within a semiconductor substrate. A transfer transistor having a first gate structure is located on a first gate dielectric layer disposed above the semiconductor substrate. A reset transistor having a second gate structure is located on the first gate dielectric layer. A gate dielectric protection layer is disposed onto the gate oxide at a position extending between the first gate structure and the second gate structure and over the photodetector. The gate dielectric protection layer protects the first gate dielectric layer from etching procedures during fabrication of the active pixel sensor.

Abstract translation: 本公开涉及一种方法，本公开涉及一种有源像素传感器，其具有栅极介电保护层，其在制造期间减小对下面的栅极介电层的损伤，以及相关联的形成方法。 在一些实施例中，有源像素传感器具有设置在半导体衬底内的光电检测器。 具有第一栅极结构的转移晶体管位于设置在半导体衬底之上的第一栅极电介质层上。 具有第二栅极结构的复位晶体管位于第一栅极介电层上。 在第一栅极结构和第二栅极结构之间并且在光电检测器上方的位置处，在栅极氧化物上设置栅极介电保护层。 栅极介质保护层在制造有源像素传感器期间保护第一栅极介电层免受蚀刻过程。

公开(公告)号：US11869761B2

公开(公告)日：2024-01-09

申请号：US17017854

申请日：2020-09-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Hung Cheng ,  Chun-Tsung Kuo ,  Jiech-Fun Lu ,  Min-Ying Tsai ,  Chiao-Chun Hsu ,  Ching I Li

IPC: H01L27/146 ,  H01L21/02 ,  H01L21/306

CPC classification number: H01L27/1463 ,  H01L21/02057 ,  H01L21/30604 ,  H01L27/1469 ,  H01L27/14634 ,  H01L27/14683 ,  H01L27/14698 ,  H01L27/1464 ,  H01L27/14636

Abstract: The present disclosure relates to an image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within an image sensing die and respectively comprises a photodiode configured to convert radiation into an electrical signal. The photodiode comprises a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type. A BDTI structure is disposed between adjacent pixel regions and extending from the back-side of the image sensing die to a position within the photodiode doping layer. The BDTI structure comprises a doped liner with the second doping type and a dielectric fill layer. The doped liner lines a sidewall surface of the dielectric fill layer.

公开(公告)号：US11600647B2

公开(公告)日：2023-03-07

申请号：US16848903

申请日：2020-04-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsun-Kai Tsao ,  Cheng-Hsien Chou ,  Jiech-Fun Lu

IPC: H01L27/146

Abstract: Various embodiments of the present disclosure are directed towards an image sensor having a photodetector disposed within a substrate. The substrate has a front-side surface and a back-side surface. An absorption enhancement structure is disposed along the back-side surface of the substrate and overlies the photodetector. The absorption enhancement structure includes a plurality of protrusions that extend outwardly from the back-side surface of the substrate. Each protrusion comprises opposing curved sidewalls.

公开(公告)号：US11450700B2

公开(公告)日：2022-09-20

申请号：US16942109

申请日：2020-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsun-Kai Tsao ,  Jiech-Fun Lu

IPC: H01L27/146

Abstract: In some embodiments, the present disclosure relates to an image sensor structure. The image sensor structure includes a substrate. The substrate includes a first side and a second side opposite the first side. A photodetector extends into the first side of the substrate. An isolation structure comprises a first isolation segment and a second isolation segment that extend through the substrate. The first isolation segment and the second isolation segment are respectively on opposite sides of the photodetector and comprise a dielectric. A first metal line is on the first side of the substrate. A dummy contact structure comprises a first dummy segment and a second dummy segment. Both the first dummy segment and the second dummy segment comprise metal and extend from the first metal line to the first isolation segment and the second isolation segment, respectively.

公开(公告)号：US11309342B2

公开(公告)日：2022-04-19

申请号：US16579726

申请日：2019-09-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsun-Kai Tsao ,  Jiech-Fun Lu ,  Shih-Pei Chou

IPC: H04N9/04 ,  H01L27/146

Abstract: Various embodiments of the present disclosure are directed towards a pixel sensor including a dummy vertical transistor structure underlying a photodetector. The pixel sensor includes a substrate having a front-side surface opposite a back-side surface. The photodetector is disposed within the substrate. A deep trench isolation (DTI) structure extends from the back-side surface of the substrate to a first point below the back-side surface. The DTI structure wraps around an outer perimeter of the photodetector. The dummy vertical transistor structure is laterally spaced between inner sidewalls of the DTI structure. The dummy vertical transistor structure includes a dummy vertical gate electrode having a dummy conductive body and a dummy embedded conductive structure. The dummy embedded conductive structure extends from the front-side surface of the substrate to a second point vertically above the first point and the dummy conductive body extends along the front-side surface of the substrate.

公开(公告)号：US11217547B2

公开(公告)日：2022-01-04

申请号：US16558556

申请日：2019-09-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Pei Chou ,  Jiech-Fun Lu

IPC: H01L23/00 ,  H01L27/146 ,  H01L27/142

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor structure including a bond pad disposed within a semiconductor substrate. The semiconductor substrate has a back-side surface and a front-side surface opposite the back-side surface. An upper surface of the semiconductor substrate is vertically below the back-side surface. The bond pad extends through the semiconductor substrate. The bond pad includes a conductive body over the upper surface of the semiconductor substrate and conductive protrusions extending from above the upper surface to below the front-side surface of the semiconductor substrate. A vertical distance between a top surface of the bond pad and the back-side surface of the semiconductor substrate is less than a height of the conductive protrusions. A first bond pad isolation structure extends through the semiconductor substrate and laterally surrounds the conductive protrusions.

公开(公告)号：US11183587B2

公开(公告)日：2021-11-23

申请号：US16924545

申请日：2020-07-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Tsung Kuo ,  Jiech-Fun Lu

IPC: H01L29/737 ,  H01L29/66 ,  H01L29/165 ,  H01L21/311 ,  H01L21/02 ,  H01L29/08 ,  H01L21/033 ,  H01L29/10

Abstract: Various embodiments of the present disclosure are directed towards a method for forming a bipolar junction transistor (BJT). A dielectric film is deposited over a substrate and comprises a lower dielectric layer, an upper dielectric layer, and an intermediate dielectric layer between the lower and upper dielectric layers. A first semiconductor layer is deposited over the dielectric film and is subsequently patterned to form an opening exposing the dielectric film. A first etch is performed into the upper dielectric layer through the opening to extend the opening to the intermediate dielectric layer. Further, the first etch stops on the intermediate dielectric layer and laterally undercuts the first semiconductor layer. Additional etches are performed to extend the opening to the substrate. A lower base structure and an emitter are formed stacked in and filling the opening, and the first semiconductor layer is patterned to form an upper base structure.

公开(公告)号：US11031434B2

公开(公告)日：2021-06-08

申请号：US16364450

申请日：2019-03-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsun-Kai Tsao ,  Jiech-Fun Lu ,  Shih-Pei Chou ,  Wei Chuang Wu

IPC: H01L27/146

Abstract: A method of fabricating self-aligned grids in a BSI image sensor is provided. The method includes depositing a first dielectric layer over a back surface of a substrate that has a plurality of photodiodes formed therein, forming a grid of trenches, and filling in the trenches with dielectric material to create a trench isolation grid. Here, a trench passes through the first dielectric layer and extends into the substrate. The method further includes etching back dielectric material in the trenches to a level that is below an upper surface of the first dielectric layer to form recesses overlaying the trench isolation grid, and filling in the recesses with metallic material to create a metallic grid that is aligned with the trench isolation grid.

公开(公告)号：US20210091127A1

公开(公告)日：2021-03-25

申请号：US16579726

申请日：2019-09-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsun-Kai Tsao ,  Jiech-Fun Lu ,  Shih-Pei Chou

IPC: H01L27/146

Abstract: Various embodiments of the present disclosure are directed towards a pixel sensor including a dummy vertical transistor structure underlying a photodetector. The pixel sensor includes a substrate having a front-side surface opposite a back-side surface. The photodetector is disposed within the substrate. A deep trench isolation (DTI) structure extends from the back-side surface of the substrate to a first point below the back-side surface. The DTI structure wraps around an outer perimeter of the photodetector. The dummy vertical transistor structure is laterally spaced between inner sidewalls of the DTI structure. The dummy vertical transistor structure includes a dummy vertical gate electrode having a dummy conductive body and a dummy embedded conductive structure. The dummy embedded conductive structure extends from the front-side surface of the substrate to a second point vertically above the first point and the dummy conductive body extends along the front-side surface of the substrate.

公开(公告)号：US10304898B2

公开(公告)日：2019-05-28

申请号：US16190608

申请日：2018-11-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ching-Chung Su ,  Hung-Wen Hsu ,  Jiech-Fun Lu ,  Shih-Pei Chou

IPC: H01L27/146

Abstract: In some embodiments, the present disclosure relates to an image sensor device. The image sensor device includes an image sensing element disposed within a substrate. A plurality of protrusions are arranged along a first side of the substrate over the image sensing element. The plurality of protrusions respectively include a sidewall having a first segment oriented at a first angle and a second segment over the first segment. The second segment is oriented at a second angle that is larger than the first angle. One or more absorption enhancement layers are arranged over and between the plurality of protrusions. The first angle and the second angle are acute angles measured through the substrate with respect to a horizontal plane that is parallel to a second side of the substrate opposite the first side.