公开(公告)号：US08749058B2

公开(公告)日：2014-06-10

申请号：US13324925

申请日：2011-12-13

申请人： Tatsuya Usami ,  Hideaki Tsuchiya ,  Yukio Miura ,  Tomoyuki Nakamura ,  Koichi Ohto ,  Chikako Ohto ,  Shinji Yokogawa

发明人： Tatsuya Usami ,  Hideaki Tsuchiya ,  Yukio Miura ,  Tomoyuki Nakamura ,  Koichi Ohto ,  Chikako Ohto ,  Shinji Yokogawa

IPC分类号： H01L29/72

CPC分类号： H01L23/53295 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/76826 ,  H01L21/76834 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device includes an interlayer insulating film, a wiring provided in the interlayer insulating film, and a SiN film provided over the interlayer insulating film and over the wiring. The peak positions of Si—N bonds of the SiN film, which are measured by FTIR, are within the range of 845 cm−1 to 860 cm−1. This makes it possible to inhibit current leakage in a silicon nitride film, which is a barrier insulating film for preventing the diffusion of wiring metal.

摘要翻译： 半导体器件包括层间绝缘膜，设置在层间绝缘膜中的布线以及设置在层间绝缘膜上并在布线上的SiN膜。 通过FTIR测量的SiN膜的Si-N键的峰位置在845cm -1至860cm -1的范围内。 这使得可以抑制作为用于防止布线金属扩散的阻挡绝缘膜的氮化硅膜中的电流泄漏。

公开(公告)号：US20120181694A1

公开(公告)日：2012-07-19

申请号：US13324925

申请日：2011-12-13

申请人： Tatsuya Usami ,  Hideaki Tsuchiya ,  Yukio Miura ,  Tomoyuki Nakamura ,  Koichi Ohto ,  Chikako Ohto ,  Shinji Yokogawa

发明人： Tatsuya Usami ,  Hideaki Tsuchiya ,  Yukio Miura ,  Tomoyuki Nakamura ,  Koichi Ohto ,  Chikako Ohto ,  Shinji Yokogawa

IPC分类号： H01L23/532 ,  H01L21/768

CPC分类号： H01L23/53295 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/76826 ,  H01L21/76834 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device includes an interlayer insulating film, a wiring provided in the interlayer insulating film, and a SiN film provided over the interlayer insulating film and over the wiring. The peak positions of Si—N bonds of the SiN film, which are measured by FTIR, are within the range of 845 cm−1 to 860 cm−1. This makes it possible to inhibit current leakage in a silicon nitride film, which is a barrier insulating film for preventing the diffusion of wiring metal.

摘要翻译： 半导体器件包括层间绝缘膜，设置在层间绝缘膜中的布线以及设置在层间绝缘膜上并在布线上的SiN膜。 通过FTIR测量的SiN膜的Si-N键的峰位置在845cm -1至860cm -1的范围内。 这使得可以抑制作为用于防止布线金属扩散的阻挡绝缘膜的氮化硅膜中的电流泄漏。

公开(公告)号：US07268087B2

公开(公告)日：2007-09-11

申请号：US10900355

申请日：2004-07-28

申请人： Hidemitsu Aoki ,  Hiroaki Tomimori ,  Norio Okada ,  Tatsuya Usami ,  Koichi Ohto ,  Takamasa Tanikuni

发明人： Hidemitsu Aoki ,  Hiroaki Tomimori ,  Norio Okada ,  Tatsuya Usami ,  Koichi Ohto ,  Takamasa Tanikuni

IPC分类号： H01L21/324

CPC分类号： H01L21/02074 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3143 ,  H01L21/3144 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/3185 ,  H01L21/321 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76883

摘要： In order to provide a manufacturing method of a semiconductor device which can improve the interconnection lifetime, while controlling the increase in resistance thereof, and, in addition, can raise the manufacturing stability; by applying a plasma treatment to the surface of a copper interconnection 17 with a source gas comprising a nitrogen element being used, a copper nitride layer 24 is formed, and thereafter a silicon nitride film 18 is formed. Hereat, under the copper nitride layer 24, a thin copper silicide layer 25 is formed.

摘要翻译： 为了提供能够提高互连寿命的半导体器件的制造方法，同时控制其电阻的增加，并且还可以提高制造稳定性; 通过使用包含氮元素的源气体在铜互连17的表面上施加等离子体处理，形成氮化铜层24，然后形成氮化硅膜18。 此时，在氮化铜层24的下方形成有薄的硅化铜层25。

公开(公告)号：US07842602B2

公开(公告)日：2010-11-30

申请号：US11750116

申请日：2007-05-17

申请人： Koichi Ohto ,  Toshiyuki Takewaki ,  Tatsuya Usami ,  Nobuyuki Yamanishi

发明人： Koichi Ohto ,  Toshiyuki Takewaki ,  Tatsuya Usami ,  Nobuyuki Yamanishi

IPC分类号： H01L21/4763

CPC分类号： H01L21/022 ,  H01L21/02074 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3124 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/318 ,  H01L21/3185 ,  H01L21/32136 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L21/76889 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-diffused metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-diffused metal layer and the insulating interlayer.

摘要翻译： 在半导体器件中，在绝缘底层上形成具有凹槽的绝缘中间层。 不含金属硅化物的硅扩散金属层埋入槽内。 在硅扩散金属层和绝缘中间层上形成金属扩散阻挡层。

公开(公告)号：US06787480B2

公开(公告)日：2004-09-07

申请号：US10071184

申请日：2002-02-11

申请人： Hidemitsu Aoki ,  Hiroaki Tomimori ,  Norio Okada ,  Tatsuya Usami ,  Koichi Ohto ,  Takamasa Tanikuni

发明人： Hidemitsu Aoki ,  Hiroaki Tomimori ,  Norio Okada ,  Tatsuya Usami ,  Koichi Ohto ,  Takamasa Tanikuni

IPC分类号： H01L21324

CPC分类号： H01L21/02074 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3143 ,  H01L21/3144 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/3185 ,  H01L21/321 ,  H01L21/3212 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76883

摘要： In order to provide a manufacturing method of a semiconductor device which can improve the interconnection lifetime, while controlling the increase in resistance thereof, and, in addition, can raise the manufacturing stability; by applying a plasma treatment to the surface of a copper interconnection 17 with a source gas comprising a nitrogen element being used, a copper nitride layer 24 is formed, and thereafter a silicon nitride film 18 is formed. Hereat, under the copper nitride layer 24, a thin copper silicide layer 25 is formed.

摘要翻译： 为了提供能够提高互连寿命的半导体器件的制造方法，同时控制其电阻的增加，并且还可以提高制造稳定性; 通过使用包含氮元素的源气体在铜互连17的表面上施加等离子体处理，形成氮化铜层24，然后形成氮化硅膜18。 此时，在氮化铜层24的下方形成有薄的硅化铜层25。

公开(公告)号：US07687917B2

公开(公告)日：2010-03-30

申请号：US10650193

申请日：2003-08-28

申请人： Koichi Ohto ,  Toshiyuki Takewaki ,  Tatsuya Usami ,  Nobuyuki Yamanishi

发明人： Koichi Ohto ,  Toshiyuki Takewaki ,  Tatsuya Usami ,  Nobuyuki Yamanishi

IPC分类号： H01L23/48

CPC分类号： H01L21/022 ,  H01L21/02074 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3124 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/318 ,  H01L21/3185 ,  H01L21/32136 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L21/76889 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-diffused metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-diffused metal layer and the insulating interlayer.

摘要翻译： 在半导体器件中，在绝缘底层上形成具有凹槽的绝缘中间层。 不含金属硅化物的硅扩散金属层埋入槽内。 在硅扩散金属层和绝缘中间层上形成金属扩散阻挡层。

公开(公告)号：US07564132B2

公开(公告)日：2009-07-21

申请号：US11368671

申请日：2006-03-07

申请人： Koichi Ohto ,  Tatsuya Usami

发明人： Koichi Ohto ,  Tatsuya Usami

IPC分类号： H01L23/48

CPC分类号： H01L23/5329 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/31633 ,  H01L21/78 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor chip 100 includes a semiconductor substrate (not shown), and a stacked film 150 formed over the semiconductor substrate, which includes carbon-containing insulating films such as a first interlayer insulating film 106, and carbon-free insulating films such as an underlying layer 102 and a top cover film 124. The end faces of the carbon-free insulating films herein are located on the outer side of the end faces of the carbon-containing insulating films. The carbon composition of the carbon-containing insulating films is lowered in the end portions thereof than in the inner portions. The film density of the carbon-containing insulating films is raised in the end portions thereof than in the inner portions.

摘要翻译： 半导体芯片100包括半导体衬底（未示出）和形成在半导体衬底上的叠层膜150，其包括含碳绝缘膜如第一层间绝缘膜106和无碳绝缘膜，例如底层 层102和顶盖膜124.这里的无碳绝缘膜的端面位于含碳绝缘膜的端面的外侧。 含碳绝缘膜的碳组成在其端部比在内部降低。 含碳绝缘膜的膜密度在其端部比在内部部分高。

公开(公告)号：US07557447B2

公开(公告)日：2009-07-07

申请号：US11702074

申请日：2007-02-05

申请人： Tatsuya Usami ,  Koichi Ohto

发明人： Tatsuya Usami ,  Koichi Ohto

IPC分类号： H01L23/48

CPC分类号： H01L23/53238 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76838 ,  H01L2924/0002 ,  H01L2924/00

摘要： An improved migration resistance of the interconnect is provided and a diffusion of silicon into the inside of the interconnect is suppressed. A semiconductor device includes a silicon substrate, a first insulating film provided on the silicon substrate and composed of an SiCN film, an SiOC film and an SiO2 film, and a first copper interconnect provided in the first insulating film and essentially composed of a copper-containing metal. An Si—O unevenly distributed layer doped with injected silicon is included in the vicinity of the surface in the inside of the first copper interconnect, and injected atomic silicon at least partially creates Si—O bond.

摘要翻译： 提供了互连的改进的耐迁移电阻，并且抑制了硅扩散到互连的内部。 半导体器件包括硅衬底，设置在硅衬底上并由SiCN膜，SiOC膜和SiO 2膜构成的第一绝缘膜，以及设置在第一绝缘膜中并且基本上由铜 - 含金属。 掺杂有注入硅的Si-O不均匀分布层包含在第一铜互连内部表面附近，并且注入的原子硅至少部分地形成Si-O键。

公开(公告)号：US20060208361A1

公开(公告)日：2006-09-21

申请号：US11368671

申请日：2006-03-07

申请人： Koichi Ohto ,  Tatsuya Usami

发明人： Koichi Ohto ,  Tatsuya Usami

IPC分类号： H01L23/52

CPC分类号： H01L23/5329 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/31633 ,  H01L21/78 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor chip 100 includes a semiconductor substrate (not shown), and a stacked film 150 formed over the semiconductor substrate, which includes carbon-containing insulating films such as a first interlayer insulating film 106, and carbon-free insulating films such as an underlying layer 102 and a top cover film 124. The end faces of the carbon-free insulating films herein are located on the outer side of the end faces of the carbon-containing insulating films. The carbon composition of the carbon-containing insulating films is lowered in the end portions thereof than in the inner portions. The film density of the carbon-containing insulating films is raised in the end portions thereof than in the inner portions.

摘要翻译： 半导体芯片100包括半导体衬底（未示出）和形成在半导体衬底上的叠层膜150，其包括含碳绝缘膜如第一层间绝缘膜106和无碳绝缘膜，例如底层 层102和顶盖膜124。 这里的无碳绝缘膜的端面位于含碳绝缘膜的端面的外侧。 含碳绝缘膜的碳组成在其端部比在内部降低。 含碳绝缘膜的膜密度在其端部比在内部部分高。

公开(公告)号：US20060186549A1

公开(公告)日：2006-08-24

申请号：US11355003

申请日：2006-02-16

申请人： Tatsuya Usami ,  Koichi Ohto ,  Toshiyuki Takewaki

发明人： Tatsuya Usami ,  Koichi Ohto ,  Toshiyuki Takewaki

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L21/76867 ,  H01L21/02203 ,  H01L21/02329 ,  H01L21/3143 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76849 ,  H01L21/76886

摘要： A first gas including a silicon-containing compound is introduced into a vacuum chamber, to expose a semiconductor substrate placed in the chamber to the first gas atmosphere (silicon processing step). Then the pressure inside the vacuum chamber is reduced to a level lower than the pressure at the time of starting the silicon processing step (depressurizing step). Thereafter, a second gas including a nitrogen-containing compound is introduced into the vacuum chamber, and the semiconductor substrate is irradiated with the second gas plasma (nitrogen plasma step).

摘要翻译： 将包含含硅化合物的第一气体引入真空室中，以将放置在室内的半导体衬底暴露于第一气体气氛（硅处理步骤）。 然后将真空室内的压力降低到低于开始硅处理步骤（减压步骤）时的压力的水平。 此后，将包含含氮化合物的第二气体引入真空室中，并用第二气体等离子体（氮等离子体步骤）照射半导体衬底。