公开(公告)号：US08463089B2

公开(公告)日：2013-06-11

申请号：US13318638

申请日：2010-05-19

申请人： Norio Okada

发明人： Norio Okada

IPC分类号： G02B6/12

摘要： A temperature control module and a support block are mounted on a metal stem. A dielectric substrate is mounted on a side surface of the support block. A support block is mounted on a cooling surface of the temperature control module. A dielectric substrate is mounted on a side surface of the support block. A semiconductor optical modulation element is mounted on the dielectric substrate. A lead pin and a signal line are connected through a bonding wire. The signal line and a signal conductor are connected through a bonding wire. The signal conductor and the semiconductor optical modulation element are connected through a bonding wire.

公开(公告)号：USD622245S1

公开(公告)日：2010-08-24

申请号：US29346744

申请日：2009-11-05

申请人： Norio Okada ,  Jong-Seong Lee ,  Yusuru Masuda

设计人： Norio Okada ,  Jong-Seong Lee ,  Yusuru Masuda

公开(公告)号：US20100060390A1

公开(公告)日：2010-03-11

申请号：US12392504

申请日：2009-02-25

申请人： Norio OKADA

发明人： Norio OKADA

IPC分类号： H01P3/08

CPC分类号： H01P3/081 ,  H05K1/0219 ,  H05K1/0227 ,  H05K1/0231 ,  H05K1/0239 ,  H05K1/025 ,  H05K1/162 ,  H05K1/167 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09663

摘要： A transmission line substrate comprises: a dielectric substrate; a signal line formed on the upper surface of the dielectric substrate; first and second ground conductors formed on the upper surface of the dielectric substrate, field-coupled to the signal line, having potentials different from each other; a dielectric film formed between a part of the overlapping first ground conductor and a part of the second ground conductor to constitute a MIM capacitor; a capacitor connected between the first ground conductor and the second ground conductor in parallel with the dielectric film; and a resistor connected between the first ground conductor and the second ground conductor in series with the capacitor.

摘要翻译： 传输线基板包括：电介质基板; 形成在电介质基板的上表面上的信号线; 第一和第二接地导体，其形成在电介质基板的上表面上，场耦合到信号线，具有彼此不同的电位; 形成在重叠的第一接地导体的一部分和第二接地导体的一部分之间的电介质膜，以构成MIM电容器; 电容器，其与所述电介质膜平行地连接在所述第一接地导体和所述第二接地导体之间; 以及连接在与电容器串联的第一接地导体和第二接地导体之间的电阻器。

公开(公告)号：US07301244B2

公开(公告)日：2007-11-27

申请号：US11153619

申请日：2005-06-16

申请人： Yutaka Tsutsui ,  Norio Okada

发明人： Yutaka Tsutsui ,  Norio Okada

IPC分类号： H01L23/48

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L2224/02166 ,  H01L2224/05082 ,  H01L2224/05093 ,  H01L2224/05095 ,  H01L2224/05096 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/04941 ,  H01L2924/00014 ,  H01L2224/05552

摘要： A semiconductor device should have a structure that allows locating electronic components in a region under a bonding pad. The semiconductor device includes a bonding pad constituting the external connection terminal; a region under the bonding pad including at least two copper layers and a connection via plug, under said bonding pad, disposed so as to connect copper layers that form a pair out of the at least two copper layers; a seal ring constituted of an annular conductor, disposed so as to surround the region under the bonding pad, and to connect a lower one of the copper layers that form said pair to copper layer to form a pair with the lower copper layer; and an interconnect connected to the bonding pad outside the seal ring.

摘要翻译： 半导体器件应当具有允许将电子部件定位在焊盘下方的区域中的结构。 半导体器件包括构成外部连接端子的接合焊盘; 在所述接合焊盘下方具有包括至少两个铜层和至少两个铜层的接合焊盘下方的区域，所述接合焊盘设置成将形成所述至少两个铜层的铜层连接; 由环状导体构成的密封环，其设置为围绕接合焊盘下方的区域，并且将形成所述一对的铜层的下部一个铜层与铜层连接，与下部铜层形成一对; 以及连接到密封环外的接合焊盘的互连。

公开(公告)号：US20070195397A1

公开(公告)日：2007-08-23

申请号：US11530533

申请日：2006-09-11

申请人： Norio OKADA

发明人： Norio OKADA

IPC分类号： G02F1/01

CPC分类号： G02F1/025 ,  G02F1/0121 ,  G02F1/0344

摘要： A semiconductor optical modulation device includes a semiconductor optical modulator, an input terminal which is connected to a drive circuit for supplying an electrical signal to the semiconductor optical modulator, an output terminal which is connected to a terminating resistor, an input wire which connects the input terminal to an electrode of the semiconductor optical modulator, and an output wire which connects the output terminal to the electrode of the semiconductor optical modulator. In addition, an additional capacitor or an additional resistor is disposed between the input terminal and the output terminal, and connected in parallel with a series circuit including the input wire and the output wire.

摘要翻译： 一种半导体光调制装置，包括半导体光调制器，连接到用于向半导体光调制器提供电信号的驱动电路的输入端，连接到终端电阻的输出端，连接输入端的输入线 端子连接到半导体光调制器的电极，以及输出线，其将输出端子连接到半导体光调制器的电极。 此外，在输入端子和输出端子之间设置附加电容器或附加电阻器，并且与包括输入线和输出线的串联电路并联连接。

公开(公告)号：USD542286S1

公开(公告)日：2007-05-08

申请号：US29222940

申请日：2005-02-04

申请人： Satoru Taniyama ,  Norio Okada ,  Yoshito Ishikawa

设计人： Satoru Taniyama ,  Norio Okada ,  Yoshito Ishikawa

公开(公告)号：USD539277S1

公开(公告)日：2007-03-27

申请号：US29222939

申请日：2005-02-04

申请人： Norio Okada ,  Satoru Taniyama ,  Yoshito Ishikawa

设计人： Norio Okada ,  Satoru Taniyama ,  Yoshito Ishikawa

公开(公告)号：USD520980S1

公开(公告)日：2006-05-16

申请号：US29224251

申请日：2005-02-25

申请人： Satoru Taniyama ,  Norio Okada ,  Yoshito Ishikawa

设计人： Satoru Taniyama ,  Norio Okada ,  Yoshito Ishikawa

公开(公告)号：US06268279B1

公开(公告)日：2001-07-31

申请号：US09320466

申请日：1999-05-27

申请人： Norio Okada

发明人： Norio Okada

IPC分类号： H01L214763

CPC分类号： H01L21/76829 ,  H01L21/7681

摘要： A first interlayer insulating film and an etching stopper film are sequentially formed on a semiconductor substrate with a surface area on which first wiring is formed. The etching stopper film is patterned so as to correspond to a pattern of via hole formed on the first interlayer insulating film and a pattern of forming a second wiring. A second interlayer insulating film is formed on the etching stopped film for forming the second wiring, a wiring trench is formed by etching the second interlayer insulating film. Continuously, the via hole is formed by etching the first interlayer insulating film while having the etching stopper film as a photomask. Conductive materials are laid in the via hole and the wiring trench so that the second wiring connected to the first wiring is formed.

摘要翻译： 第一层间绝缘膜和蚀刻阻挡膜依次形成在其上形成有第一布线的表面积的半导体基板上。 蚀刻停止膜被图案化以对应于形成在第一层间绝缘膜上的通孔的图案和形成第二布线的图案。 在用于形成第二布线的蚀刻停止膜上形成第二层间绝缘膜，通过蚀刻第二层间绝缘膜形成布线沟槽。 连续地，通过蚀刻第一层间绝缘膜同时具有蚀刻停止膜作为光掩模来形成通孔。 导电材料铺设在通孔和布线沟槽中，从而形成连接到第一布线的第二布线。

公开(公告)号：US09070959B2

公开(公告)日：2015-06-30

申请号：US13571961

申请日：2012-08-10

申请人： Norio Okada

发明人： Norio Okada

IPC分类号： H05K1/00 ,  H01P5/02 ,  H01R13/6474 ,  H01R12/62 ,  H05K3/36 ,  H05K1/02 ,  H05K1/03

CPC分类号： H01P5/028 ,  H01R12/62 ,  H01R13/6474 ,  H05K1/0218 ,  H05K1/0219 ,  H05K1/025 ,  H05K1/0306 ,  H05K3/361 ,  H05K3/366 ,  H05K2201/0715 ,  H05K2201/1034

摘要： A connection unit includes: a ceramic substrate; a first signal line on the ceramic substrate; a first grounded conductor on the ceramic substrate and electromagnetically coupled to the first signal line; a first lead pin having a first end connected to an upper surface of the first signal line and a second end protruding beyond the ceramic substrate; a second lead pin having a first end connected to an upper surface of the first grounded conductor and a second end protruding beyond the ceramic substrate; a flexible substrate including an insulating layer through which the first and second lead pins penetrate, a second signal line on a first major surface of the insulating layer and connected to the second end of the first lead pin, and a second grounded conductor on a second major surface of the insulating layer and connected to the second end of the second lead pin.

摘要翻译： 连接单元包括：陶瓷基板; 陶瓷基板上的第一信号线; 陶瓷衬底上的第一接地导体，并与第一信号线电磁耦合; 第一引脚，其具有连接到第一信号线的上表面的第一端和突出超过陶瓷基板的第二端; 第二引脚，其具有连接到第一接地导体的上表面的第一端和突出超过陶瓷基板的第二端; 柔性基板，其包括第一和第二引线引脚穿过的绝缘层，绝缘层的第一主表面上并连接到第一引脚的第二端的第二信号线，以及在第二引脚的第二引脚上的第二接地导体 绝缘层的主表面并连接到第二引脚的第二端。