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51 条记录 (耗时 0.031 秒)

    Digital data modulator-demodulator
    21.
    发明授权
    Digital data modulator-demodulator 失效
    数字数据调制解调器

    公开(公告)号：US07974162B2

    公开(公告)日：2011-07-05

    申请号：US12141149

    申请日：2008-06-18

    申请人： Makoto Okazaki ,  Yasushi Ueda

    发明人： Makoto Okazaki ,  Yasushi Ueda

    IPC分类号： G11B20/12 ,  G11B20/10

    CPC分类号： G11B20/1426

    摘要： A digital data demodulator which can reduce a loss of decodable digital data, and increase capability of reproducing digital data inputted through a transmission line even when an error occurs in the transmission line. In the digital data demodulator, a specific pattern detector (113) detects a specific pattern to be included in a modulation code, from a bit string inputted through a transmission line (104). A modulation code identifying unit (117) generates a demodulation data strobe signal (119) according to a phase of the modulation code including the specific pattern. An error corrector (121) samples demodulation data (109) in response to the demodulation data strobe signal (119) and reproduces the data to the original digital data.

    摘要翻译： 一种数字数据解调器，其可以减少可解码的数字数据的损失，并且即使在传输线路中发生错误，也增加了通过传输线路输入的数字数据的再现能力。 在数字数据解调器中，特定模式检测器（113）从通过传输线（104）输入的比特串检测要包括在调制码中的特定模式。 调制码识别单元（117）根据包含特定模式的调制码的相位生成解调数据选通信号（119）。 误差校正器（121）响应于解调数据选通信号（119）对解调数据（109）进行采样，并将数据再现到原始数字数据。

    Optical disc recording and reproduction apparatus having automatic gate signal generation modes
    23.
    发明授权
    Optical disc recording and reproduction apparatus having automatic gate signal generation modes 失效
    具有自动门信号生成模式的光盘记录和再现装置

    公开(公告)号：US07508741B2

    公开(公告)日：2009-03-24

    申请号：US11641886

    申请日：2006-12-20

    申请人： Yukio Iijima ,  Nobuaki Minakuchi ,  Hidemi Takahashi ,  Yasushi Ueda ,  Makoto Okazaki

    发明人： Yukio Iijima ,  Nobuaki Minakuchi ,  Hidemi Takahashi ,  Yasushi Ueda ,  Makoto Okazaki

    IPC分类号： G11B15/02

    CPC分类号： G11B19/04 ,  G11B7/0037 ,  G11B7/0053 ,  G11B7/00745 ,  G11B19/122 ,  G11B20/10 ,  G11B20/10009 ,  G11B20/10222 ,  G11B20/1403 ,  G11B20/1426 ,  G11B27/19 ,  G11B27/24 ,  G11B27/3027 ,  G11B2020/10888 ,  G11B2020/1269 ,  G11B2020/1274 ,  G11B2220/20 ,  G11B2220/2537

    摘要： An optical disc recording and reproducing apparatus for recording and reproducing data in and from an optical disc by the use of the optical disc as a recording medium, comprises analog processing means including a binarization unit for subjecting a signal read from the optical disc to binarization and a servo unit for controlling recording and reproducing a signal in and from the optical disc; synchronous clock generating means for generating a synchronous clock signal which is synchronized with the signal read from the optical disc; address detecting means for detecting address information indicating a physical position on the optical disc based on the signal read from the optical disc, and outputting a signal indicating the address information and a signal indicating that the address has been detected when the address information has been detected; a sector counter for holding a sector count value of a sector as a recording unit on the optical disc, and updating the sector count value according to the synchronous clock signal and the signal output from the address detecting means; and gate signal generation switching means for generating gate a signal which controls the analog processing means, based on one of the sector count value held in the sector counter and information obtained from the analog processing means, according to the signal indicating that the address has been detected, which is output from the address detecting means.

    摘要翻译： 一种用于通过使用光盘作为记录介质来记录和从光盘再现数据的光盘记录和再现装置，包括模拟处理装置，包括用于对从光盘读取的信号进行二值化的二值化单元，以及 用于控制在光盘中记录和再现信号的伺服单元; 同步时钟发生装置，用于产生与从光盘读取的信号同步的同步时钟信号; 地址检测装置，用于基于从光盘读取的信号检测表示光盘上的物理位置的地址信息，并且当检测到地址信息时，输出指示地址信息的信号和指示已经检测到地址的信号 ; 用于将光盘的扇区计数值保持为记录单位的扇区计数器，并根据同步时钟信号和从地址检测装置输出的信号来更新扇区计数值; 以及门信号产生切换装置，用于根据表示地址已经被信号的信号，基于扇区计数器中保存的扇区计数值和从模拟处理装置获得的信息，产生控制模拟处理装置的信号 从地址检测装置输出。

    Optical disc recording and reproduction apparatus having automatic gate signal generation modes
    24.
    发明申请
    Optical disc recording and reproduction apparatus having automatic gate signal generation modes 有权
    具有自动门信号生成模式的光盘记录和再现装置

    公开(公告)号：US20080037388A1

    公开(公告)日：2008-02-14

    申请号：US11798713

    申请日：2007-05-16

    申请人： Yukio Iijima ,  Nobuaki Minakuchi ,  Hidemi Takahashi ,  Yasushi Ueda ,  Makoto Okazaki

    发明人： Yukio Iijima ,  Nobuaki Minakuchi ,  Hidemi Takahashi ,  Yasushi Ueda ,  Makoto Okazaki

    IPC分类号： G11B7/00

    CPC分类号： G11B19/04 ,  G11B7/0037 ,  G11B7/0053 ,  G11B7/00745 ,  G11B19/122 ,  G11B20/10 ,  G11B20/10009 ,  G11B20/10222 ,  G11B20/1403 ,  G11B20/1426 ,  G11B27/19 ,  G11B27/24 ,  G11B27/3027 ,  G11B2020/10888 ,  G11B2020/1269 ,  G11B2020/1274 ,  G11B2220/20 ,  G11B2220/2537

    摘要： An optical disc recording and reproducing apparatus for recording and reproducing data in and from an optical disc by the use of the optical disc as a recording medium, comprises analog processing means including a binarization unit for subjecting a signal read from the optical disc to binarization and a servo unit for controlling recording and reproducing a signal in and from the optical disc; synchronous clock generating means for generating a synchronous clock signal which is synchronized with the signal read from the optical disc; address detecting means for detecting address information indicating a physical position on the optical disc based on the signal read from the optical disc, and outputting a signal indicating the address information and a signal indicating that the address has been detected when the address information has been detected; a sector counter for holding a sector count value of a sector as a recording unit on the optical disc, and updating the sector count value according to the synchronous clock signal and the signal output from the address detecting means; and gate signal generation switching means for generating gate a signal which controls the analog processing means, based on one of the sector count value held in the sector counter and information obtained from the analog processing means, according to the signal indicating that the address has been detected, which is output from the address detecting means.

    摘要翻译： 一种用于通过使用光盘作为记录介质来记录和从光盘再现数据的光盘记录和再现装置，包括模拟处理装置，包括用于对从光盘读取的信号进行二值化的二值化单元，以及 用于控制在光盘中记录和再现信号的伺服单元; 同步时钟发生装置，用于产生与从光盘读取的信号同步的同步时钟信号; 地址检测装置，用于基于从光盘读取的信号检测表示光盘上的物理位置的地址信息，并且当检测到地址信息时，输出指示地址信息的信号和指示已经检测到地址的信号 ; 用于将光盘的扇区计数值保持为记录单位的扇区计数器，并根据同步时钟信号和从地址检测装置输出的信号来更新扇区计数值; 以及门信号产生切换装置，用于根据表示地址已经被信号的信号，基于扇区计数器中保存的扇区计数值和从模拟处理装置获得的信息，产生控制模拟处理装置的信号 从地址检测装置输出。

    Optical disk reproduction apparatus and method for controlling optical disk reproduction apparatus
    26.
    发明授权
    Optical disk reproduction apparatus and method for controlling optical disk reproduction apparatus 失效
    光盘再生装置及其控制方法

    公开(公告)号：US06606288B1

    公开(公告)日：2003-08-12

    申请号：US09554408

    申请日：2000-07-11

    申请人： Makoto Okazaki ,  Yasushi Ueda

    发明人： Makoto Okazaki ,  Yasushi Ueda

    IPC分类号： G11B509

    CPC分类号： G11B20/18 ,  G11B19/04 ,  G11B20/10527 ,  G11B2020/10731 ,  G11B2020/1074 ,  G11B2020/10814

    摘要： An optical disk reproduction apparatus comprising a microcomputer (7) for resuming reading data from an optical disk (1) when buffering to a memory (6) is interrupted, a continuous data detector (55) for dividing first data buffered in the memory (6) before the buffering interruption and second data read out in accordance with an instruction from the microcomputer (7) into “n” groups, respectively, and detecting whether the first data and the second data are in coincidence for each group, and a buffering resumption request generating circuit (56) for instructing a timing of buffering resumption on the basis of a result of the continuous data detector (55).

    摘要翻译： 一种光盘再生装置，其特征在于，包括微型计算机（7），用于在向存储器（6）进行缓冲时恢复从光盘读取数据;连续数据检测器（55），用于分割缓存在存储器 ），并且分别根据来自微计算机（7）的指令将第二数据读出为“n”组，并且检测第一数据和第二数据是否与每组相符，并且缓冲恢复 请求生成电路（56），用于根据连续数据检测器（55）的结果指示缓冲恢复的定时。

    Bus interchange apparatus and dual system for accessing a fault information register without regard to buffer conditions
    27.
    发明授权
    Bus interchange apparatus and dual system for accessing a fault information register without regard to buffer conditions 失效
    总线互换装置和双系统，用于访问故障信息寄存器，而不考虑缓冲条件

    公开(公告)号：US06345332B1

    公开(公告)日：2002-02-05

    申请号：US09243386

    申请日：1999-02-01

    申请人： Makoto Okazaki

    发明人： Makoto Okazaki

    IPC分类号： G06F1338

    CPC分类号： G06F11/1443 ,  G06F11/2038 ,  G06F13/4059

    摘要： A dual system has system buses that are connected to each other through bus interchange apparatuses and a cross bus to transfer information between the system buses. Each of the bus interchange apparatuses has a first bus controller (1) having a reception controller (6) and a transmission controller (8) that are connected to one (10) of the system buses, a second bus controller (2) having a reception controller (7) and a transmission controller (9) that are connected to the cross bus (11), buffers (3, 4) for relaying information between the first and second bus controllers (1, 2), and a register (5) directly accessible from the first and second bus controllers (1, 2) to write fault information thereto.

    摘要翻译： 双系统具有通过总线交换装置和交叉总线相互连接以在系统总线之间传送信息的系统总线。 每个总线交换装置具有第一总线控制器（1），其具有连接到一个（10）系统总线的接收控制器（6）和传输控制器（8），第二总线控制器（2）具有 接收控制器（7）和连接到交叉总线（11）的传输控制器（9），用于在第一和第二总线控制器（1,2）之间中继信息的缓冲器（3,4）和寄存器（5） ）可以从第一和第二总线控制器（1,2）直接访问以向其写入故障信息。

    Bus control system in a multi-processor system
    29.
    发明授权
    Bus control system in a multi-processor system 失效
    总线控制系统在多处理器系统中

    公开(公告)号：US5526495A

    公开(公告)日：1996-06-11

    申请号：US110752

    申请日：1993-08-23

    申请人： Yuji Shibata ,  Makoto Okazaki ,  Hisamitsu Tanihira

    发明人： Yuji Shibata ,  Makoto Okazaki ,  Hisamitsu Tanihira

    IPC分类号： G06F13/16 ,  G06F13/364 ,  G06F13/40 ,  G06F15/167 ,  G06F13/42 ,  G06F13/00 ,  G06F13/36 ,  G06F15/16

    CPC分类号： G06F13/4018 ,  G06F13/1678 ,  G06F13/364 ,  G06F15/167

    摘要： A bus arbiter permits an answer transfer request to utilize a system bus with higher priority than a command transfer request, thereby increasing the processing efficiency of CPU boards. A multi-processor system utilize the system bus with a time split transfer system in which the data width of a unit is inserted into a command and an answer transmitted and received between processors and transmitted as bus width information, thus making it possible to interconnect a unit, which processes data of an arbitrary data width, to the system bus. Local memories of a plurality of units connected to the system bus can be accessed via a bus interface of an input and output unit.

    摘要翻译： 总线仲裁器允许应答传送请求利用比命令传输请求更高优先级的系统总线，从而提高CPU板的处理效率。 多处理器系统利用具有时间分割传送系统的系统总线，其中将单元的数据宽度插入到处理器之间发送和接收的命令和应答中，并作为总线宽度信息发送，从而可以将 将处理任意数据宽度的数据的单元传送到系统总线。 连接到系统总线的多个单元的本地存储器可以经由输入和输出单元的总线接口访问。