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    Falling sensor and the information processing device making use of it
    21.
    发明授权
    Falling sensor and the information processing device making use of it 失效
    落下的传感器和使用它的信息处理设备

    公开(公告)号：US06995939B2

    公开(公告)日：2006-02-07

    申请号：US10882327

    申请日：2004-07-02

    申请人： Tatsuya Ito ,  Tadashi Okumura ,  Tsuyoshi Takahashi ,  Masatoshi Ishikawa ,  Yuji Nishimura ,  Tetsuo Yuki

    发明人： Tatsuya Ito ,  Tadashi Okumura ,  Tsuyoshi Takahashi ,  Masatoshi Ishikawa ,  Yuji Nishimura ,  Tetsuo Yuki

    IPC分类号： G11B21/02

    CPC分类号： G01P15/0891 ,  G11B5/54 ,  G11B19/04 ,  G11B21/12

    摘要： A falling sensor is provided, which detects a falling of a magnetic disk drive or an information processing device installed with the magnetic disk drive and which is effective for avoiding physical damage of magnetic heads and magnetic disk media. The magnetic disk drive or the information processing device, include an unload mechanism moving or evacuating the magnetic head from a surface of the magnetic disk media, and a falling sensor comprising a conductive flexible beam or member having a compatible function, a conductive weight supported by these beams and a conductive wall arranged to be made in contact or non-contact with the weight. The sensor can detect a falling of the magnetic disk drive or the information processing device, which is typically a notebook personal computer installed with the magnetic disk drive, and evacuate the magnetic head by the unload mechanism.

    摘要翻译： 提供了一种下降传感器，其检测磁盘驱动器或安装有磁盘驱动器的信息处理装置的下落，并且其有效地避免磁头和磁盘介质的物理损坏。 磁盘驱动器或信息处理装置包括从磁盘介质的表面移动或抽出磁头的卸载机构，以及包括具有兼容功能的导电柔性梁或构件的下落传感器，由 这些梁和导电壁布置成与重物接触或不接触。 该传感器可以检测磁盘驱动器或信息处理装置的下落，该装置通常是安装有磁盘驱动器的笔记本个人计算机，并通过卸载机构排出磁头。

    High-speed vision sensor
    22.
    发明申请
    High-speed vision sensor 失效
    高速视觉传感器

    公开(公告)号：US20050280728A1

    公开(公告)日：2005-12-22

    申请号：US11205001

    申请日：2005-08-17

    申请人： Masatoshi Ishikawa ,  Haruyoshi Toyoda

    发明人： Masatoshi Ishikawa ,  Haruyoshi Toyoda

    IPC分类号： G06T1/00 ,  G06T1/20 ,  H04N5/335 ,  H04N5/341 ,  H04N5/374 ,  H04N5/378

    CPC分类号： G06T1/20 ,  G06T1/0007 ,  H04N5/378

    摘要： A high-speed vision sensor includes: an analog-to-digital converter array 13, in which one analog-to-digital converter 210 is provided in correspondence with all the photodetector elements 120 that are located on each row in a photodetector array 11; a parallel processing system 14 that includes processor elements 400 and shift registers 410, both of which form a one-to-one correspondence with the photodetector elements 120; and data buses 17, 18 and data buffers 19 and 20 for data transfer to processing elements 400. The processing elements 400 perform high-speed image processing between adjacent pixels by parallel processings. By using the data buses 17, 18, it is possible to attain, at a high rate of speed, such calculation processing that requires data supplied from outside.

    摘要翻译： 高速视觉传感器包括：模数转换器阵列13，其中一个模数转换器210与位于光电检测器阵列11中的每行上的所有光检测器元件120对应地设置; 并行处理系统14，其包括处理器元件400和移位寄存器410，二者与光电检测器元件120形成一一对应关系; 数据总线17,18和数据缓冲器19和20，用于将数据传送到处理元件400.处理元件400通过并行处理执行相邻像素之间的高速图像处理。 通过使用数据总线17,18，可以以高速度获得需要从外部提供的数据的计算处理。

    Thin film magnetic memory device with magnetic tunnel junction
    23.
    发明授权
    Thin film magnetic memory device with magnetic tunnel junction 失效
    具有磁性隧道结的薄膜磁存储器件

    公开(公告)号：US06862209B2

    公开(公告)日：2005-03-01

    申请号：US10361770

    申请日：2003-02-11

    申请人： Hideto Hidaka ,  Masatoshi Ishikawa ,  Tsukasa Ooishi

    发明人： Hideto Hidaka ,  Masatoshi Ishikawa ,  Tsukasa Ooishi

    IPC分类号： G11C11/15 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/105 ,  H01L43/08 ,  G11C11/00 ,  G11C11/14

    CPC分类号： G11C11/16

    摘要： An access transistor in an MTJ memory cell, which is one of transistors connected to a read current path, is fabricated with a semiconductor layer formed on an insulating film on a semiconductor substrate SUB, and includes impurity regions, a gate region and a body region. That is, the access transistor is fabricated with an SOI (Silicon On Insulator) structure in order to reduce an off-leak current.

    摘要翻译： 在连接到读取电流路径的晶体管之一的MTJ存储单元中的存取晶体管由在半导体衬底SUB上的绝缘膜上形成的半导体层制成，并且包括杂质区域，栅极区域和体区域 。 也就是说，存取晶体管是用SOI（绝缘体上硅）结构制造的，以便减少漏电流。

    Thin film magnetic memory device sharing an access element by a plurality of memory cells
    24.
    发明授权
    Thin film magnetic memory device sharing an access element by a plurality of memory cells 失效
    薄膜磁存储器件通过多个存储单元共享存取元件

    公开(公告)号：US06757191B2

    公开(公告)日：2004-06-29

    申请号：US10222793

    申请日：2002-08-19

    申请人： Tsukasa Ooishi ,  Hideto Hidaka ,  Masatoshi Ishikawa

    发明人： Tsukasa Ooishi ,  Hideto Hidaka ,  Masatoshi Ishikawa

    IPC分类号： G11C1114

    CPC分类号： G11C11/16

    摘要： A tunneling magneto-resistance element of each MTJ (magnetic tunnel junction) memory cell is connected between a bit line and a strap. Each strap is shared by a plurality of tunneling magneto-resistance elements that are located adjacent to each other in the row direction in the same sub array. Each access transistor is connected between a corresponding strap and a ground voltage, and turned ON/OFF in response to a corresponding word line. Since data read operation can be conducted with the structure that does not have an access transistor for every tunneling magneto-resistance element, the array area can be reduced.

    摘要翻译： 每个MTJ（磁性隧道结）存储单元的隧道磁阻元件连接在位线和带之间。 每个带由多个相同子阵列中的行方向上彼此相邻的隧道磁阻元件共享。 每个存取晶体管连接在对应的带和接地电压之间，并响应于相应的字线而导通/截止。 由于可以对每个隧道磁阻元件不具有存取晶体管的结构进行数据读取操作，因此可以减小阵列面积。

    Data transfer circuit with reduced current consumption
    25.
    发明授权
    Data transfer circuit with reduced current consumption 失效
    数据传输电路具有降低的电流消耗

    公开(公告)号：US06452976B1

    公开(公告)日：2002-09-17

    申请号：US09397142

    申请日：1999-09-16

    申请人： Masatoshi Ishikawa ,  Hiroaki Tanizaki

    发明人： Masatoshi Ishikawa ,  Hiroaki Tanizaki

    IPC分类号： H04B300

    CPC分类号： H04L25/45

    摘要： In a DRAM, a data transfer circuit includes a control circuit which selects a data transfer line to be discharged from high to low and a data transfer line to be precharged from low to high for the subsequent data transfer period and turn on an n channel MOS transistor between the selected two data transfer lines for a predetermined period. A positive charge of a data transfer line can be effectively used to reduce current consumption.

    摘要翻译： 在DRAM中，数据传输电路包括控制电路，其选择要从高到低放电的数据传输线，以及在随后的数据传送周期中从低到高预充电的数据传送线，并且打开n沟道MOS 晶体管在所选择的两条数据传输线之间预定的时间段。 数据传输线的正电荷可以有效地用于减少电流消耗。

    Semiconductor memory device with restrained scale of decoding circuit used in shift redundancy
    26.
    发明授权
    Semiconductor memory device with restrained scale of decoding circuit used in shift redundancy 有权

    公开(公告)号：US06373775B1

    公开(公告)日：2002-04-16

    申请号：US09784135

    申请日：2001-02-16

    申请人： Masatoshi Ishikawa

    发明人： Masatoshi Ishikawa

    IPC分类号： G11C700

    摘要： Shift switches are divided into a plurality of shift switch groups each having the same number of shift switches. The connection direction of each shift switch is switched at the shift switch corresponding to the shift position. The designation of the shift position is carried out by decoding an upper predecoding signal for designating what shift switch group the shift switch corresponding to the shift position belongs to and a lower predecoding signal for designating where the shift switch corresponding to the shift position is located in the shift switches belonging to the same shift switch group. Since the lower predecoding signal can be used as a common signal for each shift switch group, the scale of the decoding circuit for decoding the designation of the shift position can be restrained.

    Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation
    27.
    发明授权
    Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation 有权

    公开(公告)号：US06292015B1

    公开(公告)日：2001-09-18

    申请号：US09272316

    申请日：1999-03-19

    申请人： Tsukasa Ooishi ,  Masatoshi Ishikawa

    发明人： Tsukasa Ooishi ,  Masatoshi Ishikawa

    IPC分类号： H03K1716

    CPC分类号： G11C5/147 ,  H03K19/0016

    摘要： A semiconductor integrated circuit device has a hierarchical power supply system for a logic circuit. Inverters are provided with power supply from a main power supply line and a sub-power supply line of a higher potential and a main ground line and a sub-ground line of a lower potential. An internal power supply voltage-down converter is placed to set the voltage of the main power supply line higher than a normal operation voltage of the higher potential. An internal supply voltage boosting circuit is placed to set the voltage of the main ground line lower than a normal operation voltage of the lower potential. When respective power supply lines are short-circuited by a switching transistor, the voltage of each power supply line can be maintained at an operation supply voltage.

    Data transfer circuit transferring complementary data signals
    28.
    发明授权
    Data transfer circuit transferring complementary data signals 失效
    数据传输电路传输互补数据信号

    公开(公告)号：US6147544A

    公开(公告)日：2000-11-14

    申请号：US270051

    申请日：1999-03-16

    申请人： Hiroaki Tanizaki ,  Hideto Hidaka ,  Masatoshi Ishikawa

    发明人： Hiroaki Tanizaki ,  Hideto Hidaka ,  Masatoshi Ishikawa

    IPC分类号： G11C11/417 ,  G11C7/10 ,  G11C11/401 ,  G11C11/409 ,  G11C16/06 ,  H03K17/693 ,  H04L25/02 ,  H03K17/62 ,  H03K17/735 ,  H03K17/76

    CPC分类号： H04L25/0272 ,  G11C7/1006 ,  G11C7/1012 ,  G11C7/1048 ,  H03K17/693 ,  H04L25/028 ,  H04L25/0292

    摘要： First and second pairs of input/output lines transfer mutually complementary data signals respectively. First and second selection circuits select a signal transfer line having the same potential as that of a signal transfer line not precedently selected from two precedently selected signal transfer lines among first to third signal transfer lines and the signal transfer line not precedently selected and connect first ends thereof to the first pair of input/output lines respectively while connecting second ends thereof to the second pair of input/output lines respectively. Thus, no precharging may be performed for equalizing the potentials of the two signal transfer lines selected for present data transfer with each other, and hence reduction of a data transfer rate can be prevented.

    摘要翻译： 第一和第二对输入/输出线分别传输互补的数据信号。 第一选择电路和第二选择电路选择与第一至第三信号传输线之间的两个先前选择的信号传送线之前未选择的信号传输线具有相同电位的信号传输线，并且先前选择信号传送线并且连接第一端 分别连接到第一对输入/输出线，同时分别将第二对输入/输出线的第二端连接到第二对输入/输出线。 因此，为了均衡用于当前数据传送选择的两个信号传送线的电位，可以不执行预充电，因此可以防止数据传送速率的降低。

    Imaging methods and systems for controlling equipment in remote environments
    30.
    发明授权
    Imaging methods and systems for controlling equipment in remote environments 有权
    用于在远程环境中控制设备的成像方法和系统

    公开(公告)号：US09584711B2

    公开(公告)日：2017-02-28

    申请号：US13439824

    申请日：2012-04-04

    申请人： Theodorus Tjhang ,  Masatoshi Ishikawa

    发明人： Theodorus Tjhang ,  Masatoshi Ishikawa

    IPC分类号： H04N7/18 ,  H04N5/232

    CPC分类号： H04N5/23206 ,  H04N5/23229

    摘要： Imaging methods and systems for controlling equipment in remote environments are disclosed herein. An example system disclosed herein to control equipment in a remote environment includes an imaging assembly to determine feedback data based on measurement data obtained from a plurality of remote imaging systems controllable to process different respective optical fields-of-view in the remote environment, a flushing assembly controllable to project fluid to clear the optical fields-of-view in the remote environment, and a controller to process the feedback data to determine a control signal to control operation of at least one of (1) the plurality of remote imaging systems or (2) the flushing assembly.

    摘要翻译： 本文公开了用于控制远程环境中的设备的成像方法和系统。 本文公开的用于控制远程环境中的设备的示例系统包括成像组件，其基于从可控制以在远程环境中处理不同的相应光学视场的多个远程成像系统获得的测量数据来确定反馈数据，冲洗 组件可控制以投影流体以清除远程环境中的光学视场;以及控制器，用于处理反馈数据以确定控制信号，以控制（1）多个远程成像系统或 （2）冲洗组件。