公开(公告)号：US09305852B1

公开(公告)日：2016-04-05

申请号：US14537943

申请日：2014-11-11

Applicant: Texas Instruments Incorporated

Inventor： Osvaldo Jorge Lopez ,  Jonathan Almeria Noquil ,  Thomas Eugene Grebs ,  Simon John Molloy

IPC: H01L23/48 ,  H01L23/06 ,  H01L25/18 ,  H01L25/00 ,  H01L23/053 ,  H01L21/52 ,  H01L23/00 ,  H01L21/82 ,  H01L21/48

CPC classification number: H01L25/0657 ,  H01L21/50 ,  H01L23/053 ,  H01L23/06 ,  H01L23/13 ,  H01L23/147 ,  H01L23/49844 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/071 ,  H01L25/074 ,  H01L25/18 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/06181 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/83851 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/00 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06589 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/04642 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/10155 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/1032 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/1037 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/1425 ,  H01L2924/1427 ,  H01L2924/15156 ,  H01L2924/157 ,  H01L2224/83

Abstract: An electronic system comprises a first chip (101) of single-crystalline semiconductor including a first electronic device embedded in a second chip (102) of single-crystalline semiconductor shaped as a container having a slab (104) bordered by ridges (103), and including a second electronic device. The nested chips are assembled in a container of low-grade silicon shaped as a slab 130 bordered by retaining walls 131 and including conductive traces and terminals. The first electronic device is connected to the second electronic device by attaching the first chip onto the slab of the second chip; and the first and second electronic devices are connected to the container by embedding the second chip in the container, wherein the nested first and second chips operate as an electronic system and the container operates as the package of the system. For first and second devices as field effect transistors, the system is a power block.

Abstract translation: 电子系统包括单晶半导体的第一芯片（101），其包括第一电子器件，该第一电子器件嵌入单晶半导体的第二芯片（102）中，所述第一芯片形成为具有由脊（103）界定的板（104）的容器， 并且包括第二电子设备。 嵌套芯片组装在低档硅片的容器中，该容器由板状物130与挡板壁131相邻并且包括导电迹线和端子。 第一电子设备通过将第一芯片附接到第二芯片的板上而连接到第二电子设备; 并且第一和第二电子设备通过将第二芯片嵌入容器而连接到容器，其中嵌套的第一和第二芯片作为电子系统操作，并且容器作为系统的封装进行操作。 对于作为场效应晶体管的第一和第二器件，该系统是功率块。