公开(公告)号：US10811362B2

公开(公告)日：2020-10-20

申请号：US16243083

申请日：2019-01-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Wei Cheng ,  Bo-Jou Lu ,  Chun-Chi Yu

IPC: H01L23/544 ,  H01L21/66

Abstract: An overlay mark structure includes a plurality of first patterns of a previous layer and a plurality of second patterns of a current layer. Each of the second patterns includes a first section and a second section. The first section is disposed corresponding to one of the first patterns in a vertical direction. The first section partially overlaps the first pattern corresponding to the first section in the vertical direction. The second section is separated from the first section in an elongation direction of the second pattern. A part of the first pattern corresponding to the first section is disposed between the first section and the second section in the elongation direction of the second pattern. A measurement method of the overlay mark structure includes performing a diffraction-based overlay measurement between each of the first sections and the first pattern overlapping the first section.

公开(公告)号：US20200266285A1

公开(公告)日：2020-08-20

申请号：US16276642

申请日：2019-02-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Tsang Chen ,  Wen-Liang Huang ,  Chun-Chi Yu

IPC: H01L29/66 ,  H01L21/027 ,  H01L21/28

Abstract: A method of forming gates includes the following steps. Dummy gates are formed on a substrate. A spacer material is deposited to conformally cover the dummy gates. A removing process is performed to remove parts of the spacer material and the dummy gates, thereby forming spacers and recesses in the spacers.

公开(公告)号：US20200219821A1

公开(公告)日：2020-07-09

申请号：US16243083

申请日：2019-01-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Wei Cheng ,  Bo-Jou Lu ,  Chun-Chi Yu

IPC: H01L23/544 ,  H01L21/66

Abstract: An overlay mark structure includes a plurality of first patterns of a previous layer and a plurality of second patterns of a current layer. Each of the second patterns includes a first section and a second section. The first section is disposed corresponding to one of the first patterns in a vertical direction. The first section partially overlaps the first pattern corresponding to the first section in the vertical direction. The second section is separated from the first section in an elongation direction of the second pattern. A part of the first pattern corresponding to the first section is disposed between the first section and the second section in the elongation direction of the second pattern. A measurement method of the overlay mark structure includes performing a diffraction-based overlay measurement between each of the first sections and the first pattern overlapping the first section.

公开(公告)号：US09400435B2

公开(公告)日：2016-07-26

申请号：US14457136

申请日：2014-08-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： En-Chiuan Liou ,  Chia-Chang Hsu ,  Teng-Chin Kuo ,  Chia-Hung Wang ,  Tuan-Yen Yu ,  Yuan-Chi Pai ,  Chun-Chi Yu

IPC: G03F7/20 ,  G03F9/00 ,  G05B19/18 ,  G03F1/42

CPC classification number: G03F7/70633 ,  G03F1/42 ,  G03F7/70491 ,  G05B19/188 ,  G05B2219/45027 ,  G05B2219/45031

Abstract: A method of correcting an overlay error includes the following steps. First, an overlay mark disposed on a substrate is captured so as to generate overlay mark information. The overlay mark includes at least a pair of first mark patterns and at least a second mark pattern above the first mark patterns. Then, the overlay mark information is calculated to generate an offset value between two first mark patterns and to generate a shift value between the second mark pattern and one of the first mark patterns. Finally, the offset value is used to compensate the shift value so as to generate an amended shift value.

Abstract translation: 校正重叠错误的方法包括以下步骤。 首先，捕获设置在基板上的覆盖标记，以生成重叠标记信息。 覆盖标记包括至少一对第一标记图案和至少第一标记图案上方的第二标记图案。 然后，计算叠加标记信息以产生两个第一标记图案之间的偏移值，并产生第二标记图案与第一标记图案之一之间的偏移值。 最后，偏移值用于补偿偏移值，以产生修正的移位值。

公开(公告)号：US20150276382A1

公开(公告)日：2015-10-01

申请号：US14226834

申请日：2014-03-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： En-Chiuan Liou ,  Kuei-Chun Hung ,  Chun-Chi Yu

IPC: G01B11/14 ,  G01B11/28

CPC classification number: G03F9/7076

Abstract: A measurement mark structure includes a mark pattern and a pair of assistant bars positioned at two opposite sides of the mark pattern. The mark pattern includes a plurality of segments. The segments of the mark pattern are arranged along a first direction and the pair of the assistant bars are expend along the first direction.

Abstract translation: 测量标记结构包括标记图案和位于标记图案的两个相对侧的一对辅助条。 标记图案包括多个片段。 标记图案的区段沿着第一方向布置，并且一对辅助条沿着第一方向消耗。

公开(公告)号：US20150072532A1

公开(公告)日：2015-03-12

申请号：US14025524

申请日：2013-09-12

Applicant: United Microelectronics Corp.

Inventor： Wen-Liang Huang ,  Chia-Hung Lin ,  Chun-Chi Yu

IPC: H01L21/308

CPC classification number: H01L21/3086 ,  H01L21/0271 ,  H01L21/0337 ,  H01L21/3088

Abstract: A patterning method is provided. First, a material layer is formed over a substrate. Thereafter, a plurality of directed self-assembly (DSA) patterns are formed on the material layer. Afterwards, a patterned photoresist layer is formed by using a single lithography process. The patterned photoresist layer covers a first portion of the DSA patterns and exposes a second portion of the DSA patterns. Further, the material layer is patterned by an etching process, using the patterned photoresist layer and the second portion of the DSA patterns as a mask.

Abstract translation: 提供了图案化方法。 首先，在基板上形成材料层。 此后，在材料层上形成多个定向自组装（DSA）图案。 之后，通过使用单个光刻工艺形成图案化的光致抗蚀剂层。 图案化的光致抗蚀剂层覆盖DSA图案的第一部分并且暴露DSA图案的第二部分。 此外，通过蚀刻工艺，使用图案化的光致抗蚀剂层和DSA图案的第二部分作为掩模来对材料层进行图案化。