公开(公告)号：US20060216862A1

公开(公告)日：2006-09-28

申请号：US11430735

申请日：2006-05-09

申请人： Sidney Rigg ,  Charles Watkins ,  Kyle Kirby ,  Peter Benson ,  Salman Akram

发明人： Sidney Rigg ,  Charles Watkins ,  Kyle Kirby ,  Peter Benson ,  Salman Akram

IPC分类号： H01L21/00

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Microelectronic devices, methods for packaging microelectronic devices, and methods for forming vias and conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes forming a bond-pad on a die having an integrated circuit, the bond-pad being electrically coupled to the integrated circuit. A conductive line is then formed on the die, the conductive line having a first end portion attached to the bond-pad and a second end portion spaced apart from the bond-pad. The method can further include forming a via or passage through the die, the bond-pad, and the first end portion of the conductive line, and depositing an electrically conductive material in at least a portion of the passage to form a conductive interconnect extending at least generally through the microelectronic device.

公开(公告)号：US20050104228A1

公开(公告)日：2005-05-19

申请号：US10713878

申请日：2003-11-13

申请人： Sidney Rigg ,  Charles Watkins ,  Kyle Kirby ,  Peter Benson ,  Salman Akram

发明人： Sidney Rigg ,  Charles Watkins ,  Kyle Kirby ,  Peter Benson ,  Salman Akram

IPC分类号： H01L21/768 ,  H01L23/48 ,  H01L25/065 ,  H01L21/44

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Microelectronic devices, methods for packaging microelectronic devices, and methods for forming vias and conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes forming a bond-pad on a die having an integrated circuit, the bond-pad being electrically coupled to the integrated circuit. A conductive line is then formed on the die, the conductive line having a first end portion attached to the bond-pad and a second end portion spaced apart from the bond-pad. The method can further include forming a via or passage through the die, the bond-pad, and the first end portion of the conductive line, and depositing an electrically conductive material in at least a portion of the passage to form a conductive interconnect extending at least generally through the microelectronic device.

摘要翻译： 本文公开了微电子器件，用于封装微电子器件的方法，以及用于在微特征工件和管芯中形成通路和导电互连的方法。 在一个实施例中，一种方法包括在具有集成电路的管芯上形成接合焊盘，所述接合焊盘电耦合到集成电路。 然后在管芯上形成导线，导电线具有附接到接合焊盘的第一端部和与接合焊盘间隔开的第二端部。 该方法还可以包括形成通过管芯，接合焊盘和导电线的第一端部的通孔或通道，以及在通道的至少一部分中沉积导电材料以形成延伸在 最不通常地通过微电子器件。

公开(公告)号：US20070262464A1

公开(公告)日：2007-11-15

申请号：US11781083

申请日：2007-07-20

申请人： Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  Salman Akram ,  Warren Farnworth

发明人： Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  Salman Akram ,  Warren Farnworth

IPC分类号： H01L21/302 ,  H01L23/48 ,  H01L21/461 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76898

摘要： Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from the active surface through a conductive element thereon and a portion of the substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from the back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by laser ablation or drilling from the back surface of the substrate followed by dry etching to complete the through via.

摘要翻译： 公开了在半导体衬底中形成贯通孔的方法和所得到的结构。 在一个实施例中，通孔可以通过从其上的导电元件和导电元件下面的基底的一部分从活性表面形成部分通孔来形成通孔。 然后可以通过从后表面的激光烧蚀或钻孔来完成通孔。 在另一个实施例中，部分通孔可以通过激光烧蚀或从衬底的背面钻孔到其中的预定距离来形成。 通孔可以通过形成延伸通过导电元件和下面的衬底以与激光钻孔的部分通孔相交的部分通孔从活性表面完成。 在另一个实施例中，可以首先通过激光烧蚀或从衬底的背面进行钻孔形成部分通孔，然后通过干蚀刻来完成通孔。

公开(公告)号：US20060046463A1

公开(公告)日：2006-03-02

申请号：US11140402

申请日：2005-05-27

申请人： Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  Salman Akram ,  Warren Farnworth

发明人： Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  Salman Akram ,  Warren Farnworth

IPC分类号： H01L21/4763

CPC分类号： H01L21/76898

摘要： Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from the active surface through a conductive element thereon and a portion of the semiconductor substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from the back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a semiconductor substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying semiconductor substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by ablation or drilling from the back surface of the semiconductor substrate followed by dry etching to complete the through via and expose the underside of the conductive element.

公开(公告)号：US20070088451A1

公开(公告)日：2007-04-19

申请号：US11545067

申请日：2006-10-06

申请人： Salman Akram ,  Warren Farnworth ,  Derek Gouchnour ,  David Hembree ,  Michael Hess ,  John Jacobson ,  James Wark ,  Alan Wood

发明人： Salman Akram ,  Warren Farnworth ,  Derek Gouchnour ,  David Hembree ,  Michael Hess ,  John Jacobson ,  James Wark ,  Alan Wood

IPC分类号： G06F19/00

CPC分类号： G03F7/7065 ,  G06F11/006 ,  H01L2223/5444

摘要： An inventive method in an integrated circuit (IC) manufacturing process for using data regarding repair procedures conducted on ICs at probe to determine whether any further repairs will be conducted later in the manufacturing process includes storing the data in association with a fuse ID of each of the ICs. The ID codes of the ICs are automatically read, for example, at an opens/shorts test during the manufacturing process. The data stored in association with the ID codes of the ICs is then accessed, and additional repair procedures the ICs may undergo are selected in accordance with the accessed data. Thus, for example, the accessed data may indicate that an IC is unrepairable, so the IC can proceed directly to a scrap bin without having to be queried to determine whether it is repairable, as is necessary in traditional IC manufacturing processes.

摘要翻译： 在集成电路（IC）制造过程中的创造性方法，用于使用关于在探针上的IC进行的修复程序的数据，以确定是否在制造过程中稍后进行进一步的修理，包括将数据与每个的熔丝ID相关联地存储 IC。 IC的ID代码在制造过程中例如在打开/短路测试中自动读取。 然后访问与IC的ID代码相关联存储的数据，并且根据所访问的数据选择IC可能经历的附加修复过程。 因此，例如，访问的数据可以指示IC不可修复，因此IC可以直接进入废料仓，而不必被查询以确定其是否可修复，如在传统IC制造过程中所必需的。

公开(公告)号：US20060255826A1

公开(公告)日：2006-11-16

申请号：US11409060

申请日：2006-04-24

申请人： Salman Akram ,  William Hiatt ,  Alan Wood ,  Charles Watkins ,  Kyle Kirby

发明人： Salman Akram ,  William Hiatt ,  Alan Wood ,  Charles Watkins ,  Kyle Kirby

IPC分类号： G01R31/26

CPC分类号： G01R31/2635 ,  G01R31/2831

摘要： Systems and methods for testing microelectronic imagers and microfeature devices are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece including a substrate having a front side, a backside, and a plurality of microelectronic dies. The individual dies include an integrated circuit and a plurality of contact pads at the backside of the substrate operatively coupled to the integrated circuit. The method includes contacting individual contact pads with corresponding pins of a probe card. The method further includes testing the dies. In another embodiment, the individual dies can further comprise an image sensor at the front side of the substrate and operatively coupled to the integrated circuit. The image sensors are illuminated while the dies are tested.

摘要翻译： 本文公开了用于测试微电子成像器和微特征器件的系统和方法。 在一个实施例中，一种方法包括提供微功能工件，其包括具有正面，背面和多个微电子管芯的衬底。 各个管芯包括集成电路和在衬底的背面可操作地耦合到集成电路的多个接触焊盘。 该方法包括使各个接触垫与探针卡的相应引脚接触。 该方法还包括测试模具。 在另一个实施例中，各个管芯还可以包括在衬底的前侧的图像传感器，并可操作地耦合到集成电路。 在测试模具时，图像传感器被照亮。

公开(公告)号：US20050285154A1

公开(公告)日：2005-12-29

申请号：US10879398

申请日：2004-06-29

申请人： Salman Akram ,  Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  William Hiatt

发明人： Salman Akram ,  Charles Watkins ,  Kyle Kirby ,  Alan Wood ,  William Hiatt

IPC分类号： H01L27/146 ,  H01L27/148 ,  H01L31/02 ,  H01L21/00

CPC分类号： H01L27/146 ,  H01L21/76898 ,  H01L27/14618 ,  H01L27/148 ,  H01L31/02016 ,  H01L2224/48227 ,  H01L2924/01046 ,  H01L2924/01066 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/00

摘要： Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

摘要翻译： 本文公开了微电子成像器，用于封装微电子成像器的方法，以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中，微电子成像管芯可以包括微电子衬底，集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连延伸穿过衬底并与接合焊盘接触。 互连可以包括完全延伸穿过衬底和接合焊盘的通道，沉积到通道中并与衬底接触的电介质衬垫，沉积在电介质衬垫的至少一部分上的第一和第二导电层以及导电 在第二导电层的至少一部分上沉积到通道中并且电耦合到接合焊盘的填充材料。

公开(公告)号：US20050270055A1

公开(公告)日：2005-12-08

申请号：US10860699

申请日：2004-06-02

申请人： Salman Akram ,  William Hiatt ,  Alan Wood ,  Charles Watkins ,  Kyle Kirby

发明人： Salman Akram ,  William Hiatt ,  Alan Wood ,  Charles Watkins ,  Kyle Kirby

IPC分类号： G01R31/26 ,  G01R31/28

CPC分类号： G01R31/2635 ,  G01R31/2831

摘要： Systems and methods for testing microelectronic imagers and microfeature devices are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece including a substrate having a front side, a backside, and a plurality of microelectronic dies. The individual dies include an integrated circuit and a plurality of contact pads at the backside of the substrate operatively coupled to the integrated circuit. The method includes contacting individual contact pads with corresponding pins of a probe card. The method further includes testing the dies. In another embodiment, the individual dies can further comprise an image sensor at the front side of the substrate and operatively coupled to the integrated circuit. The image sensors are illuminated while the dies are tested.

摘要翻译： 本文公开了用于测试微电子成像器和微特征器件的系统和方法。 在一个实施例中，一种方法包括提供微功能工件，其包括具有正面，背面和多个微电子管芯的衬底。 各个管芯包括集成电路和在衬底的背面可操作地耦合到集成电路的多个接触焊盘。 该方法包括使各个接触垫与探针卡的相应引脚接触。 该方法还包括测试模具。 在另一个实施例中，各个管芯还可以包括在衬底的前侧的图像传感器，并可操作地耦合到集成电路。 在测试模具时，图像传感器被照亮。

公开(公告)号：US20060035415A1

公开(公告)日：2006-02-16

申请号：US10919604

申请日：2004-08-16

申请人： Alan Wood ,  Kyle Kirby ,  Warren Farnworth ,  Salman Akram

发明人： Alan Wood ,  Kyle Kirby ,  Warren Farnworth ,  Salman Akram

IPC分类号： H01L21/50

CPC分类号： H01L27/14618 ,  B33Y80/00 ,  H01L27/14625 ,  H01L2224/48091 ,  H01L2924/00014

摘要： A semiconductor package such as an image sensor package, and methods for fabrication. A frame structure includes an array of frames, each having an aperture therethrough, into which an image sensor die in combination with a cover glass, filter, lens or other components may be installed in precise mutual alignment. Singulated image sensor dice and other components may be picked and placed into each frame of the frame structure. Alternatively, the frame structure may be configured to be aligned with and joined to a wafer bearing a plurality of image sensor dice, wherein optional, downwardly protruding skirts along peripheries of the frames may be received into kerfs cut along streets between die locations on the wafer, followed by installation of other package components. In either instance, the frame structure in combination with singulated image sensor dice or a joined wafer is singulated into individual image sensor packages. Various external connection approaches may be used for the packages.

摘要翻译： 诸如图像传感器封装的半导体封装以及制造方法。 框架结构包括每个具有穿过其中的孔的框架阵列，图像传感器与盖玻片，过滤器，透镜或其它部件组合的模具可以精确相互对准地安装在该框架中。 单片图像传感器骰子和其他组件可以被拾取并放置在框架结构的每个帧中。 或者，框架结构可以被配置为与承载多个图像传感器骰子的晶片对准并且连接到其上，其中沿着框架的周边的任选的向下突出的裙边可以被接收到沿着晶片上的模具位置之间沿着街道切割的切口 ，然后安装其他包装组件。 在任一情况下，将帧结构与单独的图像传感器芯片或连接的晶片组合成单独的图像传感器封装。 各种外部连接方法可用于包装。

公开(公告)号：US20060192230A1

公开(公告)日：2006-08-31

申请号：US11411265

申请日：2006-04-26

申请人： Alan Wood ,  Kyle Kirby ,  Warren Farnworth ,  Salman Akram

发明人： Alan Wood ,  Kyle Kirby ,  Warren Farnworth ,  Salman Akram

IPC分类号： H01L27/148 ,  H01L31/0203

CPC分类号： H01L27/14618 ,  B33Y80/00 ,  H01L27/14625 ,  H01L2224/48091 ,  H01L2924/00014

摘要： A semiconductor package such as an image sensor package. A frame structure includes an array of frames, each having an aperture therethrough, into which an image sensor die in combination with a cover glass, filter, lens or other components may be installed in precise mutual alignment. Singulated image sensor dice and other components may be picked and placed into each frame of the frame structure. Alternatively, the frame structure may be configured to be aligned with and joined to a wafer bearing a plurality of image sensor dice, wherein optional, downwardly protruding skirts along peripheries of the frames may be received into kerfs cut along streets between die locations on the wafer, followed by installation of other package components. In either instance, the frame structure in combination with singulated image sensor dice or a joined wafer is singulated into individual image sensor packages. Various external connection approaches may be used.

摘要翻译： 诸如图像传感器封装的半导体封装。 框架结构包括每个具有穿过其中的孔的框架阵列，图像传感器与盖玻片，过滤器，透镜或其它部件组合的模具可以精确相互对准地安装在该框架中。 单片图像传感器骰子和其他组件可以被拾取并放置在框架结构的每个帧中。 或者，框架结构可以被配置为与承载多个图像传感器骰子的晶片对准并且连接到其上，其中沿着框架的周边的任选的向下突出的裙边可以被接收到沿着晶片上的模具位置之间沿着街道切割的切口 ，然后安装其他包装组件。 在任一情况下，将帧结构与单独的图像传感器芯片或连接的晶片组合成单独的图像传感器封装。 可以使用各种外部连接方法。