Novel process for erase improvement in a non-volatile memory device
    21.
    发明申请
    Novel process for erase improvement in a non-volatile memory device 有权
    用于擦除非易失性存储器件中的擦除的新方法

    公开(公告)号:US20060170029A1

    公开(公告)日:2006-08-03

    申请号:US11045850

    申请日:2005-01-28

    IPC分类号: H01L29/788

    摘要: A method of making embedded non-volatile memory devices includes forming a first mask layer overlying a polycrystalline silicon layer in a cell region and a peripheral region on a semiconductor substrate wherein the first mask layer has a plurality of openings in the cell region. Portions of the polycrystalline silicon layer exposed in the plurality of openings can be oxidized to form a plurality of poly-oxide regions, and the first mask layer can then be removed. The polycrystalline silicon layer not covered by the plurality of poly-oxide regions can be etched to form a plurality of floating gates, wherein etching the polycrystalline silicon layer is accompanied by a sputtering. A dielectric layer can then be formed, as well as a second mask layer in both the cell region and the peripheral region. The second mask layer in the cell region is partially etched back after a photoresist layer is formed over the second mask layer in the peripheral region. The dielectric layer is partially etched to form multiple thicknesses of the dielectric layer. The second mask layer is removed and a plurality of control gates are formed partially overlying the plurality of floating gates in the cell region.

    摘要翻译: 一种制造嵌入式非易失性存储器件的方法包括形成覆盖单元区域中的多晶硅层的第一掩模层和半导体衬底上的外围区域,其中第一掩模层在单元区域中具有多个开口。 在多个开口中暴露的多晶硅层的一部分可以被氧化以形成多个多晶氧化物区域,然后可以去除第一掩模层。 可以蚀刻不被多个多晶氧化物区域覆盖的多晶硅层以形成多个浮栅,其中蚀刻多晶硅层伴随着溅射。 然后可以形成电介质层,以及在电池区域和周边区域中形成第二掩模层。 在周边区域中的第二掩模层上形成光致抗蚀剂层之后,单元区域中的第二掩模层被部分地回蚀。 电介质层被部分蚀刻以形成介电层的多个厚度。 去除第二掩模层,并且多个控制栅极部分地覆盖在单元区域中的多个浮动栅极上。

    Methods for fabricating image sensor devices
    23.
    发明授权
    Methods for fabricating image sensor devices 有权
    图像传感器装置的制造方法

    公开(公告)号:US07883926B2

    公开(公告)日:2011-02-08

    申请号:US12710441

    申请日:2010-02-23

    IPC分类号: H01L21/00

    摘要: Image sensor devices and methods for fabricating the same are provided. An exemplary embodiment of an image sensor device comprises a support substrate. A passivation structure is formed over the support substrate. An interconnect structure is formed over the passivation structure. A first semiconductor layer is formed over the interconnect structure, having a first and second surfaces, wherein the first and second surfaces are opposing surfaces. At least one light-sensing device is formed over/in the first semiconductor layer from a first surface thereof. A color filter layer is formed over the first semiconductor layer from a second surface thereof. At least one micro lens is formed over the color filter layer.

    摘要翻译: 提供了图像传感器装置及其制造方法。 图像传感器装置的示例性实施例包括支撑衬底。 在支撑衬底上形成钝化结构。 在钝化结构上形成互连结构。 第一半导体层形成在互连结构上,具有第一和第二表面,其中第一和第二表面是相对的表面。 至少一个感光装置从其第一表面形成在第一半导体层之上/之中。 滤色器层从其第二表面形成在第一半导体层上。 在滤色器层上形成至少一个微透镜。

    Methods for fabricating image sensor devices
    24.
    发明授权
    Methods for fabricating image sensor devices 有权
    图像传感器装置的制造方法

    公开(公告)号:US07709872B2

    公开(公告)日:2010-05-04

    申请号:US11531290

    申请日:2006-09-13

    IPC分类号: H01L31/0232

    摘要: Image sensor devices and methods for fabricating the same are provided. An exemplary embodiment of an image sensor device comprises a support substrate. A passivation structure is formed over the support substrate. An interconnect structure is formed over the passivation structure. A first semiconductor layer is formed over the interconnect structure, having a first and second surfaces, wherein the first and second surfaces are opposing surfaces. At least one light-sensing device is formed over/in the first semiconductor layer from a first surface thereof. A color filter layer is formed over the first semiconductor layer from a second surface thereof. At least one micro lens is formed over the color filter layer.

    摘要翻译: 提供了图像传感器装置及其制造方法。 图像传感器装置的示例性实施例包括支撑衬底。 在支撑衬底上形成钝化结构。 在钝化结构上形成互连结构。 第一半导体层形成在互连结构上,具有第一和第二表面,其中第一和第二表面是相对的表面。 至少一个感光装置从其第一表面形成在第一半导体层之上/之中。 滤色器层从其第二表面形成在第一半导体层上。 在滤色器层上形成至少一个微透镜。

    Image sensor device suitable for use with logic-embedded CIS chips and methods for making the same
    25.
    发明申请
    Image sensor device suitable for use with logic-embedded CIS chips and methods for making the same 有权
    适用于逻辑嵌入式CIS芯片的图像传感器装置及其制造方法

    公开(公告)号:US20080087921A1

    公开(公告)日:2008-04-17

    申请号:US11542064

    申请日:2006-10-03

    IPC分类号: H01L29/76 H01L29/745

    摘要: An image sensor device is provided. A substrate has a photosensor region formed therein and/or thereon. An interconnection structure is formed over the substrate, and includes metal lines formed in inter-metal dielectric (IMD) layers. At least one IMD-level micro-lens is/are formed in at least one of the IMD layers over the photosensor region. Preferably, barrier layers are located between the IMD layers. Preferably, each of the barrier layers at each level has a net thickness limited to 100 angstroms or less at locations over the photosensor region, except at locations where the IMD-level micro-lenses are located. The IMD-level micro-lenses and the etch stop layers preferably have a refractive index greater than that of the IMD layers. A cap layer is preferably formed on the metal lines, especially when the metal lines include copper. An upper-level micro-lens may be located on a level that is above the interconnection structure.

    摘要翻译: 提供图像传感器装置。 衬底在其中和/或其上形成有光电传感器区域。 在衬底上形成互连结构,并且包括在金属间电介质(IMD)层中形成的金属线。 在光电传感器区域中的至少一个IMD层中形成至少一个IMD级微透镜。 优选地,阻挡层位于IMD层之间。 优选地,除了在IMD级微透镜所在的位置之外,每个级别的每个阻挡层的净厚度在光电传感器区域之外的位置处具有限制在100埃或更小的净厚度。 IMD级微透镜和蚀刻停止层优选具有大于IMD层的折射率的折射率。 优选在金属线上形成覆盖层,特别是当金属线包括铜时。 上级微透镜可以位于互连结构之上的层上。

    METHODS OF AVOIDING WAFER BREAKAGE DURING MANUFACTURE OF BACKSIDE ILLUMINATED IMAGE SENSORS
    26.
    发明申请
    METHODS OF AVOIDING WAFER BREAKAGE DURING MANUFACTURE OF BACKSIDE ILLUMINATED IMAGE SENSORS 审中-公开
    在背光照明图像传感器制造过程中避免浪涌破裂的方法

    公开(公告)号:US20080044984A1

    公开(公告)日:2008-02-21

    申请号:US11465047

    申请日:2006-08-16

    IPC分类号: H01L21/30 H01L21/46

    摘要: A process for forming backside illuminated devices is disclosed. Specifically, the process reduces processing damage to wafers caused by poor bond quality at the wafer edge ring. In one embodiment, a wafer edge trimming step is implemented prior to bonding the wafer to the substrate. A pre-grind blade is used to create a straight edge around the wafer perimeter, eliminating any sharp edges. In another embodiment, edge trimming is performed after the wafer has been bonded to the substrate, and a pre-grind blade is used to remove portion of the wafer edge ring subject to poor bonding quality before grinding. The final thickness of the ground wafer is about 50 microns in either case.

    摘要翻译: 公开了一种用于形成背面照明装置的工艺。 具体地说,该方法减少了由于晶片边缘环上的接合质量差而导致的对晶片的加工损坏。 在一个实施例中,在将晶片接合到基板之前实现晶片边缘修剪步骤。 预磨刀片用于在晶片周边周围创建直边,消除任何尖锐边缘。 在另一个实施例中,在晶片已经结合到基板之后进行边缘修整,并且在研磨之前使用预研磨刀片来去除在接合质量差的条件下的部分晶片边缘环。 在任一情况下,接地晶片的最终厚度为约50微米。

    Process for erase improvement in a non-volatile memory device
    27.
    发明授权
    Process for erase improvement in a non-volatile memory device 有权
    在非易失性存储器件中擦除改进的过程

    公开(公告)号:US07297598B2

    公开(公告)日:2007-11-20

    申请号:US11045850

    申请日:2005-01-28

    IPC分类号: H01L21/8247

    摘要: A method of making embedded non-volatile memory devices includes forming a first mask layer overlying a polycrystalline silicon layer in a cell region and a peripheral region on a semiconductor substrate wherein the first mask layer has a plurality of openings in the cell region. Portions of the polycrystalline silicon layer exposed in the plurality of openings can be oxidized to form a plurality of poly-oxide regions, and the first mask layer can then be removed. The polycrystalline silicon layer not covered by the plurality of poly-oxide regions can be etched to form a plurality of floating gates, wherein etching the polycrystalline silicon layer is accompanied by a sputtering. A dielectric layer can then be formed, as well as a second mask layer in both the cell region and the peripheral region. The second mask layer in the cell region is partially etched back after a photoresist layer is formed over the second mask layer in the peripheral region. The dielectric layer is partially etched to form multiple thicknesses of the dielectric layer. The second mask layer is removed and a plurality of control gates are formed partially overlying the plurality of floating gates in the cell region.

    摘要翻译: 一种制造嵌入式非易失性存储器件的方法包括形成覆盖单元区域中的多晶硅层的第一掩模层和半导体衬底上的外围区域,其中第一掩模层在单元区域中具有多个开口。 在多个开口中暴露的多晶硅层的一部分可以被氧化以形成多个多晶氧化物区域,然后可以去除第一掩模层。 可以蚀刻不被多个多晶氧化物区域覆盖的多晶硅层以形成多个浮栅,其中蚀刻多晶硅层伴随着溅射。 然后可以形成电介质层,以及在电池区域和周边区域中形成第二掩模层。 在周边区域中的第二掩模层上形成光致抗蚀剂层之后,单元区域中的第二掩模层被部分地回蚀。 电介质层被部分蚀刻以形成介电层的多个厚度。 去除第二掩模层,并且多个控制栅极部分地覆盖在单元区域中的多个浮动栅极上。

    Manufacturing Techniques for Workpieces with Varying Topographies
    28.
    发明申请
    Manufacturing Techniques for Workpieces with Varying Topographies 有权
    具有不同形貌的工件制造技术

    公开(公告)号:US20130181320A1

    公开(公告)日:2013-07-18

    申请号:US13350010

    申请日:2012-01-13

    IPC分类号: H01L29/00 B44C1/22 H01L21/311

    摘要: Some embodiments relate to a method for processing a workpiece. In the method, an anti-reflective coating layer is provided over the workpiece. A first patterned photoresist layer, which has a first photoresist tone, is provided over the anti-reflective coating layer. A second patterned photoresist layer, which has a second photoresist tone opposite the first photoresist tone, is provided over the first patterned photoresist layer. An opening extends through the first and second patterned photoresist layers to allow a treatment to be applied to the workpiece through the opening. Other embodiments are also disclosed.

    摘要翻译: 一些实施例涉及用于处理工件的方法。 在该方法中,在工件上方设有抗反射涂层。 具有第一光致抗蚀剂色调的第一图案化光致抗蚀剂层设置在抗反射涂层上。 在第一图案化光致抗蚀剂层上提供具有与第一光致抗蚀剂色调相反的第二光致抗蚀剂色调的第二图案化光致抗蚀剂层。 开口延伸穿过第一和第二图案化的光致抗蚀剂层,以允许通过开口对工件施加处理。 还公开了其他实施例。

    MANUFACTURING TECHNIQUES TO LIMIT DAMAGE ON WORKPIECE WITH VARYING TOPOGRAPHIES
    29.
    发明申请
    MANUFACTURING TECHNIQUES TO LIMIT DAMAGE ON WORKPIECE WITH VARYING TOPOGRAPHIES 有权
    制造技术限制工件损坏与变化的地形

    公开(公告)号:US20130137266A1

    公开(公告)日:2013-05-30

    申请号:US13306299

    申请日:2011-11-29

    IPC分类号: H01L21/311

    摘要: Some embodiments relate to a method for processing a workpiece. In the method, a first photoresist layer is provided over the workpiece, wherein the first photoresist layer has a first photoresist tone. The first photoresist layer is patterned to provide a first opening exposing a first portion of the workpiece. A second photoresist layer is then provided over the patterned first photoresist layer, wherein the second photoresist layer has a second photoresist tone opposite the first photoresist tone. The second photoresist layer is then patterned to provide a second opening that at least partially overlaps the first opening to define a coincidentally exposed workpiece region. A treatment is then performed on the coincidentally exposed workpiece region. Other embodiments are also disclosed.

    摘要翻译: 一些实施例涉及用于处理工件的方法。 在该方法中,在工件上设置第一光致抗蚀剂层,其中第一光致抗蚀剂层具有第一光致抗蚀剂色调。 图案化第一光致抗蚀剂层以提供暴露工件的第一部分的第一开口。 然后在图案化的第一光刻胶层上提供第二光致抗蚀剂层,其中第二光致抗蚀剂层具有与第一光致抗蚀剂色调相反的第二光致抗蚀剂色调。 然后对第二光致抗蚀剂层进行图案化以提供与第一开口至少部分重叠的第二开口,以限定重合的工件区域。 然后对同时暴露的工件区域进行处理。 还公开了其他实施例。

    Method of measurement in semiconductor fabrication
    30.
    发明授权
    Method of measurement in semiconductor fabrication 有权
    半导体制造中的测量方法

    公开(公告)号:US08178422B2

    公开(公告)日:2012-05-15

    申请号:US12415005

    申请日:2009-03-31

    摘要: Provided is a method of fabricating a semiconductor device. The method includes providing a device substrate having a front side and a back side, the device substrate having a first refractive index, forming an embedded target over the front side of the device substrate, forming a reflective layer over the embedded target, forming a media layer over the back side of the device substrate, the media layer having a second refractive index less than the first refractive index, and projecting radiation through the media layer and the device substrate from the back side so that the embedded target is detected for a semiconductor process.

    摘要翻译: 提供一种制造半导体器件的方法。 该方法包括提供具有前侧和后侧的器件衬底,器件衬底具有第一折射率,在器件衬底的前侧上形成嵌入的靶,在嵌入的靶上形成反射层,形成介质 所述介质层具有小于所述第一折射率的第二折射率,并且从所述背面将辐射从所述介质层和所述器件基板突出以使得所述嵌入的靶被检测为半导体 处理。