公开(公告)号：US10665579B2

公开(公告)日：2020-05-26

申请号：US15045228

申请日：2016-02-16

Applicant: Xilinx, Inc.

Inventor： Stephen M. Trimberger ,  Mohsen H. Mardi ,  David M. Mahoney

IPC: H01L23/00 ,  H01L25/18 ,  H01L25/065 ,  H01L23/538 ,  H01L25/16 ,  H01L23/13

Abstract: A chip package assembly is provided that includes a substrate, at least one integrated circuit (IC) die and a power management integrated circuit (PMIC). In one example, the IC die of the chip package assembly is disposed on a first surface of the substrate. The PMIC die has a first surface having outputs electrically coupled to the second surface of the IC die. The PMIC die also has a second surface facing away from the first surface. The second surface of the PMIC die has inputs that are electrically coupled to the first surface of the substrate.

公开(公告)号：US10147666B1

公开(公告)日：2018-12-04

申请号：US14449052

申请日：2014-07-31

Applicant: Xilinx, Inc.

Inventor： Stephen M. Trimberger ,  Austin H. Lesea

IPC: H05K7/20 ,  G06F1/20 ,  H01L23/467 ,  H01L33/64 ,  H01L31/024 ,  H01S5/024 ,  H01L23/473 ,  H01L23/544 ,  H01L23/00

Abstract: A method and apparatus are provided that includes an electronic device, a chip package and a method for cooling a chip package in an electronic device. In one example, the chip package includes an interposer or package substrate having a first IC die and a second IC die mounted thereon. The second IC die has a maximum safe operating temperature that is greater than a maximum safe operating temperature of the first IC die. An indicia is disposed on the chip package. The indicia designates an installation orientation of the interposer or package substrate which positions the first IC die upstream of the second IC die relative to a direction of cooling fluid flow.

公开(公告)号：US10038503B2

公开(公告)日：2018-07-31

申请号：US14459070

申请日：2014-08-13

Applicant: Xilinx, Inc.

Inventor： Austin H. Lesea ,  Stephen M. Trimberger

IPC: H04B10/12 ,  H04B10/00 ,  H04B10/04 ,  H04B10/2507 ,  H04B10/2575 ,  H04B10/07 ,  H04B10/58

CPC classification number: H04B10/2507 ,  H04B10/07 ,  H04B10/2575 ,  H04B10/58

Abstract: In an adaptation module relating generally to adaptive optical channel compensation, an analysis module is coupled to receive a first data signal and a second data signal and coupled to provide first information and second information. A comparison module is coupled to compare the first information and the second information to provide third information. An adjustment module is coupled to receive the third information to provide fourth information to compensate for distortion in the second data signal with reference to the first data signal. The second data signal is associated with a conversion of the first data signal to an optical signal for communication via an optical channel.

公开(公告)号：US09270469B2

公开(公告)日：2016-02-23

申请号：US14185780

申请日：2014-02-20

Applicant: Xilinx, Inc.

Inventor： Jason J. Moore ,  Steven E. McNeil ,  Stephen M. Trimberger

IPC: H04L29/06 ,  H04L9/32

CPC classification number: H04L9/3247 ,  G06F21/572 ,  G06F21/575 ,  G06F21/71 ,  G06F21/76 ,  H04L9/0825 ,  H04L9/0891 ,  H04L9/3236

Abstract: One approach for authenticating data includes storing a plurality of combinations of representations of public keys and session key IDs in a non-volatile memory. A payload and accompanying public key, session key ID, and signature of the payload are input. The signature is a function of the payload and a private key of a key pair that includes the accompanying public key and the private key. Authenticity of the payload is determined based on the accompanying public key and session key ID and the combinations stored in the non-volatile memory, and from the signature and the payload. In response to determining that the payload is authentic, the payload is processed, and in response to determining that the payload is not authentic, processing of the payload is disabled.

Abstract translation: 用于认证数据的一种方法包括将公共密钥和会话密钥ID的表示的多个组合存储在非易失性存储器中。 输入有效载荷和伴随的公钥，会话密钥ID和有效载荷的签名。 签名是有效载荷和密钥对的私钥的功能，包括伴随的公钥和私钥。 基于附带的公钥和会话密钥ID以及存储在非易失性存储器中的组合，以及从签名和有效载荷来确定有效载荷的真实性。 响应于确定有效载荷是真实的，处理有效载荷，并且响应于确定有效载荷不可靠，禁用有效载荷的处理。

公开(公告)号：US09225512B1

公开(公告)日：2015-12-29

申请号：US13875156

申请日：2013-05-01

Applicant: Xilinx, Inc.

Inventor： Stephen M. Trimberger

IPC: H04L9/24 ,  H04L9/08

CPC classification number: H04L9/0866

Abstract: Approaches for using a physically unclonable function (PUF) as a key-encrypting key are disclosed. Data is encrypted using a session key, and at least one PUF value is generated from a PUF. The session key and a correctness indicator are encrypted into a corresponding session key pair using the PUF value. Each session key pair is added to the encrypted data. Subsequent decryption, using a subsequently generated PUF value, of the correctness indicator to an expected value indicates a valid decryption. Decryption may be repeated using a different PUF value if the correctness indicator does not match the expected value. In another approach, the session key may be omitted and the payload data may be encrypted with the different PUF values and paired with correctness indicators.

Abstract translation: 公开了使用物理不可克隆功能（PUF）作为密钥加密密钥的方法。 使用会话密钥对数据进行加密，并且从PUF生成至少一个PUF值。 会话密钥和正确性指示符使用PUF值加密成对应的会话密钥对。 每个会话密钥对被添加到加密数据。 使用随后生成的PUF值将正确性指示符进行后续解密，表示有效的解密。 如果正确性指示符与预期值不匹配，可以使用不同的PUF值重复解密。 在另一种方法中，可以省略会话密钥，并且可以用不同的PUF值加密有效载荷数据并与正确性指示符配对。

公开(公告)号：US20150236856A1

公开(公告)日：2015-08-20

申请号：US14185780

申请日：2014-02-20

Applicant: Xilinx, Inc.

Inventor： Jason J. Moore ,  Steven E. McNeil ,  Stephen M. Trimberger

IPC: H04L9/32

CPC classification number: H04L9/3247 ,  G06F21/572 ,  G06F21/575 ,  G06F21/71 ,  G06F21/76 ,  H04L9/0825 ,  H04L9/0891 ,  H04L9/3236

Abstract: One approach for authenticating data includes storing a plurality of combinations of representations of public keys and session key IDs in a non-volatile memory. A payload and accompanying public key, session key ID, and signature of the payload are input. The signature is a function of the payload and a private key of a key pair that includes the accompanying public key and the private key. Authenticity of the payload is determined based on the accompanying public key and session key ID and the combinations stored in the non-volatile memory, and from the signature and the payload. In response to determining that the payload is authentic, the payload is processed, and in response to determining that the payload is not authentic, processing of the payload is disabled.

Abstract translation: 用于认证数据的一种方法包括将公共密钥和会话密钥ID的表示的多个组合存储在非易失性存储器中。 输入有效载荷和伴随的公钥，会话密钥ID和有效载荷的签名。 签名是有效载荷和密钥对的私钥的功能，包括伴随的公钥和私钥。 基于附带的公钥和会话密钥ID以及存储在非易失性存储器中的组合，以及从签名和有效载荷来确定有效载荷的真实性。 响应于确定有效载荷是真实的，处理有效载荷，并且响应于确定有效载荷不可靠，禁用有效载荷的处理。

公开(公告)号：US08981810B1

公开(公告)日：2015-03-17

申请号：US13867574

申请日：2013-04-22

Applicant: Xilinx, Inc.

Inventor： Stephen M. Trimberger ,  Austin H. Lesea

IPC: H03K19/00

CPC classification number: H03K19/003

Abstract: A method, non-transitory computer readable medium, and apparatus for preventing accelerated aging of a physically unclonable function (PUF) circuit are disclosed. For example, the method monitors an environmental condition associated with the physically unclonable function circuit, detects a change in the environmental condition associated with the physically unclonable function circuit, and, in response to the change in the environmental condition, implements a security function for preventing the accelerated aging of the physically unclonable function circuit.

Abstract translation: 公开了一种用于防止物理不可克隆功能（PUF）电路的加速老化的方法，非暂时性计算机可读介质和装置。 例如，该方法监视与物理不可克隆功能电路相关联的环境条件，检测与物理不可克隆功能电路相关联的环境状况的变化，并且响应于环境条件的变化，实现防止 物理不可克隆功能电路的加速老化。

公开(公告)号：US11024583B2

公开(公告)日：2021-06-01

申请号：US16773501

申请日：2020-01-27

Applicant: XILINX, INC.

Inventor： Austin H. Lesea ,  Sundararajarao Mohan ,  Stephen M. Trimberger

IPC: G06F15/78 ,  H01L23/538 ,  H01L23/50

Abstract: An example integrated circuit (IC) package includes: a processing system and a programmable IC disposed on a substrate, the processing system coupled to the programmable IC through interconnect of the substrate; the processing system including components coupled to a ring interconnect, the components including a processor and an interface controller. The programmable IC includes: an interface endpoint coupled to the interface controller through the interconnect; and at least one peripheral coupled to the interface endpoint and configured for communication with the ring interconnect of the processing system through the interconnect endpoint and the interface controller.

公开(公告)号：US11018772B1

公开(公告)日：2021-05-25

申请号：US16586408

申请日：2019-09-27

Applicant: Xilinx, Inc.

Inventor： Austin H. Lesea ,  Stephen M. Trimberger

IPC: H04B10/50 ,  H04B10/508

Abstract: Various apparatuses, circuits, systems, and methods for optical communication are disclosed. In some implementations, an apparatus includes multiple lasers that input an electronic signal. Each laser encodes and outputs a respective optical data signal based on the electronic signal. Each laser has a different configuration of one or more first optical parameters. A first selection circuit selects the respective optical data signal from one of the lasers. Multiple optical components configure second optical parameters of an input optical data signal. A second selection circuit inputs the selected optical data signal from the first selection circuit and provides the selected optical data signal to one of the optical components. A third selection circuit selects the optical data signal output from the one optical component.

公开(公告)号：US10014949B1

公开(公告)日：2018-07-03

申请号：US15346985

申请日：2016-11-09

Applicant: Xilinx, Inc.

Inventor： Stephen M. Trimberger ,  Austin H. Lesea

IPC: H04B10/50 ,  H04B10/516

CPC classification number: H04B10/503 ,  H04B10/5161 ,  H04B10/548

Abstract: Various apparatuses, circuits, systems, and methods for optical communication are disclosed. In some implementations an optical communication device includes an optical data port configured to support an optical fiber in a fixed position. The optical communication device may further include a plurality of optical communication circuits, each oriented to communicate optical signals at a respective position of a cross section of the optical fiber connected to the optical data port and a control circuit, responsive to optical signals communicated on the optical fiber connected to the optical data port and configured to determine ones of the plurality of optical communication circuits that are misaligned with the optical fiber and disable the determined ones of the plurality of optical communication circuits.