摘要:
An information processing apparatus having an address translation system includes a plurality of processors in each of which an addressing is carried out by translating a logical address into a real address in the virtual storage system for data processing. The plurality of processors include a scalar processor for translating a logical address into a real address by using an address translation table; and a vector processor for determining if the logical address to be relocated lies within a predetermined address range, for address-relocating the logical address to the real address based on a relocation table when the logical address lies within the predetermined address range, and using the logical address as a real address when the logical address lies outside of the predetermined address range. The predetermined address range and the content of the relocation table are set by the scalar processor which supervises the program storage area.
摘要:
A light source unit is used in a multiply combined manner, and includes a light source element having a substrate and one or more light emitting elements disposed on the substrate. The light source unit is configured such that when a plurality of the light source units are arranged in cascade, the light source element in the light source unit comes to in electric connection with another light source element in an adjacent light source unit. Thereby, the plurality of light source units may emit light at the same time. Thus, the structure similar to rod-shaped light source such as CCFL is achieved.
摘要:
According to one embodiment, an ontology updating apparatus includes a generation unit, an updating unit, a detection unit and a notification unit. The generation unit generates updating reference relationship. The updating unit updates a first class and a first package. The detection unit detects, using the updating reference relationship, whether at least one of target packages are comprised in the updating reference packages of the updated first package, the target packages each indicating a package to be updated and associated with the updated first class. The notification unit generates, if there is the target package, an update notice that the target package needs to be updated.
摘要:
A method for stabilizing ornithine transcarbamylase (OTC) and a method of immunologically assaying OTC are provided. More specifically, the application provides a stabilized OTC solution having a pH of 5.5 to 7.0 as well as an immunological assay method of OTC including reacting an OTC antigen with an anti-OTC antibody at a pH of 7.5 to 10.5 or an immunological assay method of OTC including reacting an OTC antigen with an anti-OTC antibody at a pH of 6.5 to 10.5 in the presence of ProClin. According to the method of the present application, OTC level of a sample can be determined within a short period of time at high sensitivity. Thus, the method is useful for, for example, diagnosis of liver disease or follow-up after the onset of the disease.
摘要:
A stage device has guide members (2, 3) for guiding each of two moving bodies (4, 5) in one axis direction on a level block (1) and has a beam (6) laid across the two moving bodies (4, 5) so as to be perpendicular to the guide members (2, 3) and moving together with the moving bodies (4, 5). The two moving bodies (4, 5) are individually moved to rotate the beam (6) relative to a yaw rotation axis perpendicular to the one axis direction.
摘要:
A database apparatus stores a first contents table which includes first components including first contents data rows, and a second contents table which includes second components including second contents data rows. The first and second contents data rows each have a selection reference relationship between the first and second contents tables, and a selection reference condition is described using a selection reference type property. A selection reference processor is configured to query the second contents table under the selection reference condition to find candidates of second contents data rows. The candidates are referenced from a selected first contents data row according to the selection reference relationship. At least one second contents data row designated in the candidates displayed on the screen is selected. A combination device is configured to generate a combined contents table corresponding to a combined-type product, by combining the first and second contents data rows.
摘要:
An image layout apparatus includes: display unit for displaying a one-page image; parts layout unit for laying out a target image part PP on a one-page image, according to an instruction given by the user; mask creating unit for creating one or a plurality of cutout masks with respect to the target image part PP laid out on the one-page image, according to a specification given by the user; and drawing unit for cutting out the target image part PP with a plurality of cutout masks SM and CM created for the target image part PP and drawing the cut-out target image part on the one-page image.
摘要:
A resin composition comprising(a) a polyphenylene ether resin or a mixture of it and a polystyrene resin,(b) a co-oligomer of ethylene and an alpha-olefin,(c) optionally an elastomeric hydrogenated A-B-A block copolymer, and(d) optionally an elastomeric hydrogenated A-B block copolymer.The chemical resistance of the polyphenylene ether is improved.
摘要:
A correction signal generating circuit for a television receiver includes a counter for counting a pulse synchronized with a horizontal sync signal, a memory for storing correction data and a coefficient, and a unit for multiplying and adding contents of the counter and the memory. A signal feedback loop supplies an output from the multiplying and adding unit to an input thereof, and a control unit controls operation of the memory and the multiplying and adding unit, thereby generating a correction signal.
摘要:
A vector processing system having a main storage, a vector processor, a scalar processor, and an address translation mechanism in each processor in which data is stored in the main processor. The vector processing system includes a common memory in which processing results of vector data can be directly stored from resources such as arithmetic circuits and an operand fetch logic in the vector processor without using the address translation mechanism and from which data can be directly read out by the resources in the scalar processor without using the address translation mechanism, a common memory access control circuit for controlling the conflict among access requests issued from a plurality of resources in the processors and for controlling the access right through an assignment of a block number in a unit of a logical partition of the common memory, and a circuit for controlling, depending on set information held in the control circuit, a decode operation of an instruction specifying operations of the scalar and vector processors.