公开(公告)号：US20040263376A1

公开(公告)日：2004-12-30

申请号：US10818776

申请日：2004-04-06

申请人： Sony Corporation

发明人： Yasuhide Shimizu ,  Shigemitsu Murayama ,  Yukitoshi Yamashita ,  Junji Toyomura

IPC分类号： H03M001/12

CPC分类号： G11C27/024 ,  G11C27/026 ,  H03F3/45089 ,  H03F2203/45626 ,  H03F2203/45631 ,  H03F2203/45651 ,  H03F2203/45696 ,  H03F2203/45702 ,  H03F2203/45726 ,  H03K5/2481 ,  H03K5/249 ,  H03M1/142 ,  H03M1/206 ,  H03M1/365

摘要： A comparator includes a sampling capacitor, a first switching unit which is connected to an input end of the sampling capacitor and which applies an input signal to the input end of the sampling capacitor, a second switching unit which is connected to the input end of the sampling capacitor and which applies a reference signal to the input end of the sampling capacitor, an output transistor connected to an output end of the sampling capacitor in a source follower connection manner or an emitter follower connection manner, and a third switching unit which is connected to an output end of the sampling capacitor and which maintains maintaining a voltage at the output end of the sampling capacitor to be constant. The input signal is compared with the reference signal.

公开(公告)号：US20040227477A1

公开(公告)日：2004-11-18

申请号：US10828373

申请日：2004-04-19

申请人： ROHM CO., LTD.

发明人： Kenji Otani ,  Norio Fujii

IPC分类号： H02P007/06

CPC分类号： H03F3/45094 ,  H03F2200/456 ,  H03F2203/45134 ,  H03F2203/45646 ,  H03F2203/45651

摘要： The invention provides a differential current output unit that has a least number of capacitors and a minimized chip area on one hand, and on the other hand that is capable of providing a smoothly varying output current across a zero-crossing point in accord with an inputted difference input voltage. To do this, the differential current output unit is entirely formed of differential circuits and current mirror circuits having predetermined current mirror ratios. Thus, the unit has a stable output current characteristic. The unit has an inflow output transistor circuit and an outflow output transistor circuit that are operably separated by a delivery circuit. Thus, no penetration current will flow through the inflow- and outflow-output transistor circuits.

摘要翻译： 本发明提供了一种差分电流输出单元，其一方面具有最少数量的电容器和最小化的芯片面积，另一方面，能够根据输入的过零点在过零点上提供平滑变化的输出电流 差分输入电压。 为了做到这一点，差分电流输出单元完全由具有预定电流镜像比的差分电路和电流镜电路形成。 因此，该单元具有稳定的输出电流特性。 该单元具有通过输送电路可操作地分离的流入输出晶体管电路和流出输出晶体管电路。 因此，没有穿透电流将流过流入和流出输出晶体管电路。

公开(公告)号：US06677818B2

公开(公告)日：2004-01-13

申请号：US09920842

申请日：2001-08-03

申请人： Frank W. Singor ,  Arya R. Behzad

发明人： Frank W. Singor ,  Arya R. Behzad

IPC分类号： H03G516

CPC分类号： H03F3/45183 ,  H03F3/45381 ,  H03F3/45475 ,  H03F2200/516 ,  H03F2203/45392 ,  H03F2203/45651 ,  H03F2203/45652 ,  H03F2203/45682 ,  H03F2203/45696 ,  H03F2203/45702

摘要： A circuit and method for bridging an analog signal between two integrated circuits operating at different supply voltages. The circuit is a two stage fixed gain amplifier. The first stage is a transconductance amplifier and the second stage is an operational amplifier. The first stage converts an input signal from a voltage into a current. The second stage converts the current signal to an output voltage signal.

摘要翻译： 一种在不同电源电压下工作的两个集成电路之间桥接模拟信号的电路和方法。 该电路是两级固定增益放大器。 第一级是跨导放大器，而第二级是运算放大器。 第一阶段将输入信号从电压转换为电流。 第二级将电流信号转换为输出电压信号。

公开(公告)号：US06542033B2

公开(公告)日：2003-04-01

申请号：US10148537

申请日：2002-05-31

申请人： Toshio Maejima

发明人： Toshio Maejima

IPC分类号： H03F345

CPC分类号： H03F3/45179 ,  H03F3/3028 ,  H03F3/45192 ,  H03F2203/45028 ,  H03F2203/45292 ,  H03F2203/45651

摘要： A differential amplifier circuit of the present invention comprises an input circuit 10 for producing a difference voltage signal between a positive input signal and a negative input signal, a feedback bias circuit 20 for inputting the difference voltage signal supplied from the input circuit 10 to provide a bias voltage corresponding to the difference voltage signal and for performing a feedback control on the bias voltage by feeding back an output current, an output circuit 30 for supplying a load with the output current corresponding to the bias voltage, and a current detection circuit 40 for detecting the output current to provide it to the feedback bias circuit 20. The differential amplifier circuit performs class-AB amplification in such a way that the bias voltage provides a current value close to zero when the difference voltage signal is substantially zero.

摘要翻译： 本发明的差分放大器电路包括用于产生正输入信号和负输入信号之间的差分电压信号的输入电路10，用于输入从输入电路10提供的差分电压信号的反馈偏置电路20， 对应于差分电压信号的偏置电压，并且通过反馈输出电流来执行对偏置电压的反馈控制;输出电路30，用于向负载提供与偏置电压相对应的输出电流;以及电流检测电路40，用于 检测输出电流以将其提供给反馈偏置电路20.差分放大器电路以这样的方式执行AB类放大，使得当差分电压信号基本为零时，偏置电压提供接近零的电流值。

公开(公告)号：US20020180529A1

公开(公告)日：2002-12-05

申请号：US10148537

申请日：2002-05-31

发明人： Toshio Maejima

IPC分类号： H03F003/45

CPC分类号： H03F3/45179 ,  H03F3/3028 ,  H03F3/45192 ,  H03F2203/45028 ,  H03F2203/45292 ,  H03F2203/45651

摘要： A differential amplifier circuit of the present invention comprises an input circuit 10 for producing a difference voltage signal between a positive input signal and a negative input signal, a feedback bias circuit 20 for inputting the difference voltage signal supplied from the input circuit 10 to provide a bias voltage corresponding to the difference voltage signal and for performing a feedback control on the bias voltage by feeding back an output current, an output circuit 30 for supplying a load with the output current corresponding to the bias voltage, and a current detection circuit 40 for detecting the output current to provide it to the feedback bias circuit 20. The differential amplifier circuit performs class-AB amplification in such a way that the bias voltage provides a current value close to zero when the difference voltage signal is substantially zero.

摘要翻译： 本发明的差分放大器电路包括用于产生正输入信号和负输入信号之间的差分电压信号的输入电路10，用于输入从输入电路10提供的差分电压信号的反馈偏置电路20， 对应于差分电压信号的偏置电压，并且通过反馈输出电流来执行对偏置电压的反馈控制;输出电路30，用于向负载提供与偏置电压相对应的输出电流;以及电流检测电路40，用于 检测输出电流以将其提供给反馈偏置电路20.差分放大器电路以这样的方式执行AB类放大，使得当差分电压信号基本为零时，偏置电压提供接近零的电流值。

公开(公告)号：US20020140476A1

公开(公告)日：2002-10-03

申请号：US10106730

申请日：2002-03-26

发明人： Alfio Zanchi

IPC分类号： H03K005/12

CPC分类号： H03F3/45179 ,  H03F3/45188 ,  H03F2203/45301 ,  H03F2203/45566 ,  H03F2203/45631 ,  H03F2203/45632 ,  H03F2203/45641 ,  H03F2203/45651 ,  H03K5/2481

摘要： The opamp with a slew rate booster includes a first high side transistor 23 coupled to a first differential output node OUTnull; a second high side transistor 26 coupled to a second differential output node OUTnull; a first booster circuit 72 coupled to the control node of the first high side transistor 23; a second booster circuit 70 coupled to the control node of the second high side transistor 26. The opamp exploits the gate control available on the high side transistors 23 and 26. During the charge-discharge differential transient of the load capacitances 58 and 60, the circuit increases the current given by the high side transistor 23 or 26 that is pulling up its output OUTnull or OUTnull, and reduces by the same amount the current provided at the other output OUTnull or OUTnull that is being pulled down by a low side driver 43 or 40. The gate control is accomplished through a simple, symmetrical capacitor-resistor network that implements a basic differentiator.

摘要翻译： 具有转换速率增强器的运算放大器包括耦合到第一差分输出节点OUT-的第一高侧晶体管23; 耦合到第二差分输出节点OUT +的第二高侧晶体管26; 耦合到第一高侧晶体管23的控制节点的第一升压电路72; 耦合到第二高侧晶体管26的控制节点的第二升压电路70.运算放大器利用在高侧晶体管23和26上可用的栅极控制。在负载电容58和60的充放电差动瞬变期间， 电路增加由提升其输出OUT-或OUT +的高侧晶体管23或26给出的电流，并且减少在另一个输出OUT +或OUT-处提供的电流，该另一个输出OUT +或OUT-被下拉 驱动器43或40.门控制通过实现基本微分器的简单对称的电容器 - 电阻网络实现。

公开(公告)号：US20020105385A1

公开(公告)日：2002-08-08

申请号：US10093670

申请日：2002-03-08

发明人： Kevin Scott Buescher ,  James Harold Lauffenburger ,  John William Arachtingi

IPC分类号： H03F003/08

CPC分类号： H03G1/0088 ,  H03F3/3023 ,  H03F3/45183 ,  H03F2203/30054 ,  H03F2203/30151 ,  H03F2203/30156 ,  H03F2203/45651 ,  H03F2203/45658 ,  H03F2203/7236 ,  H03G1/0023

摘要： An amplifier circuit (20) for a photodetector includes a transconductance variable gain stage (32). The transconductance variable gain stage (32) has an input (34) capable of connecting to the photodetector and an output (40). A transconductance gain stage (44) has an input (42) connected to the output (40) of the transconductance variable gain stage (32). A feedback resistor (46) is connected between an output (48) of the transconductance gain stage (44) and the input (42) of the transconductance gain stage (44).

公开(公告)号：US06362688B1

公开(公告)日：2002-03-26

申请号：US09559246

申请日：2000-04-26

申请人： Stephen Au

发明人： Stephen Au

IPC分类号： H03F345

CPC分类号： H03F3/45188 ,  H03F3/005 ,  H03F3/45659 ,  H03F2203/45356 ,  H03F2203/45398 ,  H03F2203/45651 ,  H03F2203/45682 ,  H03F2203/45732

摘要： A system and method of biasing a telescopic cascode operational transconductance amplifier is provided to prevent or reduce the likelihood that the inputs to the amplifier do exceed the input common mode voltage range for the amplifier. The system and method provides a bias control circuit for the differential input transistors and tail current transistor of the operational amplifier such that their respective Vds−Vdsat is maintained substantially constant. To accomplish this, the biasing system and method uses a bandgap voltage source that typically produces a highly stable voltage that is substantially temperature and process invariant. The bandgap voltage source is used to generate bias voltages applied to the gates and drains of the differential input transistors that maintains their and the tail current transistor's Vds−Vdsat substantially constant. There are several advantages of the system and method for biasing a telescopic cascode OTA. First, by keeping Vds−Vdsat substantially constant for the tail current transistor, this transistor is prevented from operating in its linear region, which would otherwise cause a decrease in the bandwidth of the amplifier. Second, by keeping (i.e. Vds−Vdsat) is substantially constant for the input transistors, these transistors are prevented from operating in their linear region, which would otherwise cause a reduction in the output impedance and the DC gain of the amplifier. Third, Vds−Vdsat for the input and tail current transistors can be maintained relatively low in order to minimize the reduction of the output swing of the amplifier.

摘要翻译： 提供了一种偏置伸缩共源共栅运算跨导放大器的系统和方法，以防止或减少放大器的输入超过放大器的输入共模电压范围的可能性。 该系统和方法为运算放大器的差分输入晶体管和尾电流晶体管提供偏置控制电路，使得它们各自的Vds-Vdsat保持基本恒定。 为了实现这一点，偏置系统和方法使用通常产生基本上温度和过程不变的高度稳定的电压的带隙电压源。 带隙电压源用于产生施加到差分输入晶体管的栅极和漏极的偏置电压，其保持它们和尾电流晶体管的Vds-Vdsat基本恒定。 用于偏置可伸缩共源共栅OTA的系统和方法有几个优点。 首先，通过使Vds-Vdsat对于尾电流晶体管保持基本恒定，该晶体管被阻止在其线性区域中工作，否则会导致放大器带宽的降低。 第二，通过保持（即Vds-Vdsat）对于输入晶体管基本上是恒定的，这些晶体管被阻止在它们的线性区域中工作，这将导致放大器的输出阻抗和DC增益的降低。 第三，为了最小化放大器的输出摆幅的减小，用于输入和电流晶体管的Vds-Vdsat可以保持相对较低。

公开(公告)号：US20020024382A1

公开(公告)日：2002-02-28

申请号：US09921000

申请日：2001-08-03

申请人： Broadcom Corporation

发明人： Tom W. Kwan ,  Ralph Duncan ,  Frank W. Singor

IPC分类号： H03F001/02 ,  H03F003/45

CPC分类号： H03F3/45645 ,  H03F3/005 ,  H03F3/45179 ,  H03F3/45188 ,  H03F3/45654 ,  H03F2203/45394 ,  H03F2203/45421 ,  H03F2203/45651

摘要： Provided is a switched capacitor feedback circuit including two or more input ports configured to receive a corresponding a number of input signals and at least one output port. The output port is configured to output an adjusting signal. The input signals includes a number of primary signals and two or more reference signals that are associated with a first timing phase of operation. The adjusting signal is produced based upon a comparison between the primary signals the reference signals. Also provided is a pair of active devices having gates coupled together and structured to receive the adjusting signal. The active devices are configured to provide a gain to the adjusting signal in accordance with a predetermined gain factor, and facilitate an adjustment to the number of primary signals based upon the gain during a second timing phase of operation.

摘要翻译： 提供了一种开关电容器反馈电路，其包括被配置为接收对应的多个输入信号和至少一个输出端口的两个或多个输入端口。 输出端口配置为输出调整信号。 输入信号包括与第一定时相位相关联的多个主信号和两个或更多个参考信号。 基于主信号之间的参考信号的比较产生调整信号。 还提供了一对具有耦合在一起并被构造成接收调节信号的门的有源器件。 有源器件被配置为根据预定的增益因子向调整信号提供增益，并且有助于在操作的第二定时阶段期间基于增益来调整主信号的数量。

公开(公告)号：US5847607A

公开(公告)日：1998-12-08

申请号：US772011

申请日：1996-12-19

申请人： Laurence D. Lewicki ,  Ion E. Opris

发明人： Laurence D. Lewicki ,  Ion E. Opris

IPC分类号： H03F3/45 ,  H03F1/14

CPC分类号： H03F3/45802 ,  H03F3/45188 ,  H03F3/45286 ,  H03F3/4565 ,  H03F3/45654 ,  H03F3/45798 ,  H03F2203/45421 ,  H03F2203/45508 ,  H03F2203/45651

摘要： A high speed fully differential operational amplifier with fast settling time for switched capacitor applications includes a high gain active cascode applied to the operational amplifier's input stage transistors to improve the gain, provide a higher output impedance, and thus, reduce the Miller feedback gate drain capacitance of the input stage devices. This improves the speed of the amplifier. A biasing technique is used to keep the active cascodes biased during transient overload so that settling will not be adversely affected during the recovery of the cascodes. A pair of transistors are used to feed forward a fraction of the tail current to "keep-alive" the cascode transistors. In other words, the fraction of the tail current that is fed to the source of the cascode transistors via the keep-alive transistors effectively biases the active cascodes sufficiently so that they do not turn off completely during slewing.

摘要翻译： 具有快速建立时间的开关电容应用的高速全差分运算放大器包括一个高增益有源共源共栅，用于运算放大器的输入级晶体管，以提高增益，提供更高的输出阻抗，从而降低了米勒反馈栅极漏极电容 的输入级装置。 这提高了放大器的速度。 偏置技术用于在瞬态过载期间保持有源共源共轭偏置，从而在级联恢复期间沉降不会受到不利影响。 一对晶体管用于馈送一部分尾电流以“保持”共源共栅晶体管。 换句话说，通过保持活体晶体管馈送到共源共栅晶体管的源极的尾部电流的分数有效地有效地偏压有源级联，使得它们在回转期间不会完全关断。