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87 条记录 (耗时 0.014 秒)

    Method of equalising a channel and apparatus therefor
    21.
    发明申请
    Method of equalising a channel and apparatus therefor 审中-公开
    通道均衡方法及其设备

    公开(公告)号：US20060203899A1

    公开(公告)日：2006-09-14

    申请号：US11344337

    申请日：2006-01-31

    申请人： David Gee

    发明人： David Gee

    IPC分类号： H03H7/30

    CPC分类号： H04L25/0305 ,  H04L2025/03484 ,  H04L2025/03611 ,  H04L2025/03662 ,  H04L2025/03681

    摘要： In the field of optical communications, a number of techniques are known for channel equalisation. However, these techniques are, for various different technical and/or economic reasons, unsuitable for application in relation to optical communications at a data rate of 10 Gbps. Consequently, the present invention provides a dithered linear search algorithm adapted to change tap weights (45, 75) of a filter (15) in accordance with a heuristic tap modification scheme.

    摘要翻译： 在光通信领域中，众所周知的是用于信道均衡的技术。 然而，由于各种不同的技术和/或经济原因，这些技术不适合以10Gbps的数据速率与光通信相关的应用。 因此，本发明提供一种抖动线性搜索算法，其适于根据启发式抽头修改方案来改变滤波器（15）的抽头权重（45,75）。

    Cascade filter receiver for DS-CDMA communication systems
    22.
    发明申请
    Cascade filter receiver for DS-CDMA communication systems 审中-公开
    用于DS-CDMA通信系统的级联滤波器接收器

    公开(公告)号：US20040136444A1

    公开(公告)日：2004-07-15

    申请号：US10695444

    申请日：2003-10-29

    发明人： Daniel Massicotte ,  Adel-Omar Dahmane

    IPC分类号： H04B001/707 ,  H04K001/00

    CPC分类号： H04B1/7105 ,  H04B1/71075 ,  H04L25/03305 ,  H04L25/03331 ,  H04L2025/03464 ,  H04L2025/03484 ,  H04L2025/03509 ,  H04L2025/03617

    摘要： A description of an adaptable multiuser processing unit applied to Direct-sequence Code Division Multiple Access (DS-CDMA) is disclosed. The adaptable multiuser processing unit consists of cascade filters where each filter is adapted independently. The adaptation of a first filter is based on the error between the output of the first filter and a desired signal, in the same way for the other filters. The adaptation is realized follow a direct, without channel identification, or indirect, with channel identification, procedure. The first filter receives the input signal in Baud (1/T) or Fractionally (k/T) spaced and the last filter gives to the MUD output the decisions on the symbols estimated for each users. A decision feedback may be applied to the input of each filter such as the conventional Decision Feedback Equalizer (DFE). In more, each filter can be linear or nonlinear.

    摘要翻译： 公开了适用于直接序列码分多址（DS-CDMA）的适应性多用户处理单元的描述。 适应性多用户处理单元由级联滤波器组成，其中每个滤波器独立地适配。 对于其他滤波器，第一滤波器的适配是基于第一滤波器的输出与期望信号之间的误差，以相同的方式。 适应实现遵循直接，无通道识别或间接，具有信道识别，程序。 第一个滤波器以波特（1 / T）或分数（k / T）间隔接收输入信号，最后一个滤波器给出MUD输出对每个用户估计的符号的决定。 判决反馈可以应用于诸如传统的判决反馈均衡器（DFE）的每个滤波器的输入。 更多地，每个滤波器可以是线性或非线性的。

    Pre-equalizer, VSB transmission system using the same, and transmission method thereof
    23.
    发明申请
    Pre-equalizer, VSB transmission system using the same, and transmission method thereof 有权
    前置均衡器，VSB传输系统使用相同，及其传输方法

    公开(公告)号：US20040008764A1

    公开(公告)日：2004-01-15

    申请号：US10267818

    申请日：2002-10-10

    发明人： Jae-Hyun Seo ,  Yong-Tae Lee ,  Seung-Won Kim

    IPC分类号： H03H007/30

    CPC分类号： H04L25/03343 ,  H04L2025/03484 ,  H04L2025/03573 ,  H04L2025/03802

    摘要： Disclosed is a pre-equalizer, a vestigial sideband (VSB) transmission system using the pre-equalizer, and a VSB transmission method. A first transmit signal is stored in a first memory, and a pre-equalizer pre-equalizes the first transmit signal based on a set tap coefficient. A transmitter modulates the pre-equalized first transmit signal, and sends the modulated signal. The first transmit signal is fed back to a receiver, which demodulates the transmitted first transmit signal and stores the demodulated signal as the second transmit signal in a second memory. Subsequently, the pre-equalizer calculates a tap coefficient based on an error value as the difference between the first transmit signal and the second transmit signal, and updates the set tap coefficient based on the calculated tap coefficient.

    摘要翻译： 公开了一种预均衡器，使用前置均衡器的残留边带（VSB）传输系统和VSB传输方法。 第一发送信号存储在第一存储器中，并且预均衡器基于设定的抽头系数对第一发送信号进行预均衡。 发射机调制预均衡的第一发射信号，并发送调制信号。 将第一发送信号反馈到接收机，接收机解调所发送的第一发送信号，并将解调后的信号作为第二发送信号存储在第二存储器中。 随后，预均衡器基于作为第一发送信号和第二发送信号之间的差的误差值来计算抽头系数，并且基于计算出的抽头系数来更新设定的抽头系数。

    Timing control in data receivers and transmitters
    24.
    发明申请
    Timing control in data receivers and transmitters 有权
    数据接收机和发射机的定时控制

    公开(公告)号：US20030133467A1

    公开(公告)日：2003-07-17

    申请号：US10335909

    申请日：2003-01-03

    发明人： Alberto Molina Navarro ,  Stephen Bates ,  Philip Curran ,  Carl Damien Murray

    IPC分类号： H04L012/28

    CPC分类号： H04L7/0029 ,  H04L25/14 ,  H04L2025/03484

    摘要： A Gigabit transceiver (1) has a receiver (2) and a transmitter (3). There is an ADC (5) in the receiver (2) for each channel (A, B, C, D). The ADCs (5) oversample at a factor of 2. However the remainder of the digital circuitry and transmitter DACs (2) operate off half of the oversampling rate. In the receiver (2) fractionally spaced equalisers (FSES, 6) ensure that the optimum sampling phase is selected digitally. The invention avoids the need for a PLL in the receiver for each channel and associated interference and retiming problems.

    摘要翻译： 千兆收发器（1）具有接收器（2）和发射器（3）。 在每个通道（A，B，C，D）的接收器（2）中有一个ADC（5）。 ADC（5）以2的倍数进行过采样。然而，数字电路和发送器DAC（2）的其余部分工作在过采样率的一半。 在接收器（2）中，分数间隔的均衡器（FSES，6）可确保最佳采样相位被数字地选择。 本发明避免了每个信道对接收机中的PLL的需要以及相关的干扰和重定时问题。

    Block decision feedback equalizer
    25.
    发明授权
    Block decision feedback equalizer 失效
    阻止判决反馈均衡器

    公开(公告)号：US5790598A

    公开(公告)日：1998-08-04

    申请号：US609250

    申请日：1996-03-01

    申请人： Kenneth W. Moreland ,  Mark B. Jorgenson ,  Stewart N. Crozier

    发明人： Kenneth W. Moreland ,  Mark B. Jorgenson ,  Stewart N. Crozier

    IPC分类号： H04B7/08 ,  H04L25/03 ,  H03H7/30

    CPC分类号： H04L25/03057 ,  H04B7/0854 ,  H04L2025/03484 ,  H04L2025/03617 ,  H04L2025/03796

    摘要： A block decision feedback equalizer uses a Cholesky algorithm to factor a channel impulse response correlation matrix in order to solve for data received over a dispersive communications channel. While the Cholesky algorithm increases the computational complexity of the initial data symbol estimate (the result of a linear block estimation), its use allows the employment of a recursive update for computing successive data symbols with little additional computation. Further, the Cholesky algorithm is free of limitations that would restrict detection to cases where the channel span or memory is smaller than the probe segment following the data block to be detected. Additional functions such as diversity combining, incorporation of a time-varying channel response model and fractional baud-period sampling are provided in the block detector.

    摘要翻译： 块判决反馈均衡器使用Cholesky算法来确定信道脉冲响应相关矩阵，以便求解通过分散通信信道接收的数据。 虽然Cholesky算法增加了初始数据符号估计（线性块估计的结果）的计算复杂度，但其使用允许使用递归更新来计算连续的数据符号，同时附加计算。 此外，Cholesky算法没有限制，将限制检测到信道跨度或存储器小于要检测的数据块之后的探测段的情况。 在块检测器中提供诸如分集组合，并入时变信道响应模型和分数波特率采样的附加功能。

    Circuits for and methods of filtering inter-symbol interference for SerDes applications
    27.
    发明授权
    Circuits for and methods of filtering inter-symbol interference for SerDes applications 有权
    用于SerDes应用的滤波符号间干扰的电路和方法

    公开(公告)号：US09313054B1

    公开(公告)日：2016-04-12

    申请号：US14617015

    申请日：2015-02-09

    申请人： Xilinx, Inc.

    发明人： Yu Liao ,  Hongtao Zhang ,  Geoffrey Zhang ,  Kun-Yung Chang

    IPC分类号： H03H7/30 ,  H04L25/03

    CPC分类号： H04L25/03019 ,  H04L2025/03484

    摘要： A circuit for filtering inter-symbol interference in an integrated circuit is described. The circuit comprises a first stage coupled to receive digital samples of an input signal. The first stage generates first decision outputs based upon the digital samples. A second stage is coupled to receive the digital samples of the input signal. The second stage comprises a filter receiving the first decision outputs and generating second decision outputs based upon the digital samples of the input signal and detected inter-symbol interference associated with the first decision outputs. A method of filtering inter-symbol interference in an integrated circuit is also described.

    摘要翻译： 描述用于滤波集成电路中符号间干扰的电路。 电路包括耦合以接收输入信号的数字样本的第一级。 第一阶段基于数字样本产生第一决策输出。 第二级被耦合以接收输入信号的数字样本。 第二级包括接收第一判定输出并基于输入信号的数字样本和检测到的与第一判定输出相关联的符号间干扰的第二判定输出的滤波器。 还描述了一种对集成电路中符号间干扰进行滤波的方法。

    COMMUNICATION APPARATUS AND METHOD FOR HIGH EFFICIENCY SATELLITE SERVICE
    28.
    发明申请
    COMMUNICATION APPARATUS AND METHOD FOR HIGH EFFICIENCY SATELLITE SERVICE 有权
    通信设备和高效卫星服务的方法

    公开(公告)号：US20150333936A1

    公开(公告)日：2015-11-19

    申请号：US14609759

    申请日：2015-01-30

    申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    发明人： Pan Soo KIM ,  Deock Gil OH

    IPC分类号： H04L25/03

    CPC分类号： H04L25/03038 ,  H04L25/03057 ,  H04L25/0328 ,  H04L2025/03484 ,  H04L2025/03636 ,  H04L2025/03675 ,  H04L2025/03726

    摘要： Disclosed are a communication apparatus and a communication method capable of improving transmitting/receiving frequency efficiency of a satellite signal per bandwidth or spectral efficiency (S.E) per bandwidth by removing and improving a distortion or inter-symbol interference for applying a minimum-mean square error (MMSE) equalizer required to detect a frame synchronization and a modulation code rate in a satellite service for satellite broadcasting or communication under the variable coding and modulation (VCM) or adaptive coding and modulation (ACM) environment.

    摘要翻译： 公开了一种能够通过去除和改善用于应用最小均方误差的失真或符号间干扰来提高每个带宽的带宽或频谱效率（SE）的卫星信号的发射/接收频率效率的通信装置和通信方法 （VCM）或自适应编码和调制（ACM）环境中的用于卫星广播或通信的卫星服务中的帧同步和调制码率所需的MMSE均衡器。