公开(公告)号：US20240121976A1

公开(公告)日：2024-04-11

申请号：US18269004

申请日：2021-12-17

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Taisuke KAMADA ,  Anna TADA ,  Sachiko KAWAKAMI ,  Daisuke KUBOTA

IPC: H10K50/16 ,  H10K50/15 ,  H10K85/20 ,  H10K85/30 ,  H10K85/60

CPC classification number: H10K50/167 ,  H10K50/157 ,  H10K85/20 ,  H10K85/331 ,  H10K85/371 ,  H10K85/381 ,  H10K85/623 ,  H10K85/6572 ,  H10K85/6576 ,  H10K2102/351

Abstract: An optical device with favorable characteristics is provided. An optical device with low driving voltage is provided. An optical device with low power consumption is provided. The optical device includes a first electrode, a second electrode, an active layer, and a carrier-transport layer. The active layer is positioned between the first electrode and the second electrode. The active layer contains a first organic compound and a second organic compound, the first organic compound is represented by General Formula (G1), and the second organic compound is represented by General Formula (G2-1). The carrier-transport layer is positioned between the second electrode and the active layer and the thickness of the carrier-transport layer is greater than or equal to 10 nm and less than or equal to 300 nm.

公开(公告)号：US20240120339A1

公开(公告)日：2024-04-11

申请号：US18537929

申请日：2023-12-13

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI

IPC: H01L27/105 ,  G11C11/405 ,  G11C16/04 ,  H01L21/02 ,  H01L21/46 ,  H01L21/8258 ,  H01L27/12 ,  H01L29/06 ,  H01L29/786 ,  H10B41/10 ,  H10B41/20 ,  H10B41/30 ,  H10B41/35 ,  H10B41/70

CPC classification number: H01L27/105 ,  G11C11/405 ,  G11C16/0433 ,  H01L21/02664 ,  H01L21/46 ,  H01L21/8258 ,  H01L27/1225 ,  H01L29/06 ,  H01L29/7869 ,  H01L29/78693 ,  H10B41/10 ,  H10B41/20 ,  H10B41/30 ,  H10B41/35 ,  H10B41/70 ,  H01L27/0207

Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.

公开(公告)号：US11956981B2

公开(公告)日：2024-04-09

申请号：US18138250

申请日：2023-04-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Nobuharu Ohsawa ,  Satoshi Seo

IPC: H10K50/12 ,  C09K11/02 ,  C09K11/06 ,  H10K50/16 ,  H10K59/12 ,  H10K59/40 ,  H10K50/13 ,  H10K50/19 ,  H10K85/30 ,  H10K85/60 ,  H10K101/00 ,  H10K101/30

CPC classification number: H10K50/121 ,  C09K11/02 ,  C09K11/06 ,  H10K50/16 ,  C09K2211/1007 ,  C09K2211/1044 ,  C09K2211/185 ,  H10K50/131 ,  H10K50/19 ,  H10K59/12 ,  H10K59/40 ,  H10K85/342 ,  H10K85/60 ,  H10K85/615 ,  H10K85/622 ,  H10K85/626 ,  H10K85/636 ,  H10K85/654 ,  H10K85/657 ,  H10K85/6572 ,  H10K85/6576 ,  H10K2101/27 ,  H10K2101/30

Abstract: A light-emitting element having high emission efficiency is provided.
The light-emitting element includes a first organic compound, a second organic compound, and a third organic compound. The first organic compound has a function of converting triplet excitation energy into light emission. The second organic compound is preferably a TADF material. The third organic compound is a fluorescent compound. Light emitted from the light-emitting element is obtained from the third organic compound. Triplet excitation energy in a light-emitting layer is transferred to the third organic compound by reverse intersystem crossing caused by the second organic compound or through the first organic compound.

公开(公告)号：US11955538B2

公开(公告)日：2024-04-09

申请号：US18135793

申请日：2023-04-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Toshihiko Takeuchi ,  Naoto Yamade ,  Hiroshi Fujiki ,  Tomoaki Moriwaka ,  Shunsuke Kimura

IPC: H01L29/66 ,  H01L29/10 ,  H01L29/49

CPC classification number: H01L29/66969 ,  H01L29/1054 ,  H01L29/4966

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided.
The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.

公开(公告)号：US11955192B2

公开(公告)日：2024-04-09

申请号：US18206702

申请日：2023-06-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsushi Umezaki

IPC: G11C19/18 ,  G09G3/3266 ,  G09G3/36 ,  H01L27/12 ,  H01L29/786

CPC classification number: G11C19/184 ,  G09G3/3266 ,  G09G3/3677 ,  H01L27/1225 ,  H01L29/7869 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2340/0492

Abstract: A semiconductor device or the like with a novel structure that can change the orientation of the display is provided. A semiconductor device or the like with a novel structure, in which a degradation in transistor characteristics can be suppressed, is provided. A semiconductor device or the like with a novel structure, in which operation speed can be increased, is provided. A semiconductor device or the like with a novel structure, in which a dielectric breakdown of a transistor can be suppressed, is provided. The semiconductor device or the like has a circuit configuration capable of switching between a first operation and a second operation by changing the potentials of wirings. By switching between these two operations, the scan direction is easily changed. The semiconductor device is configured to change the scan direction.

公开(公告)号：US20240113229A1

公开(公告)日：2024-04-04

申请号：US18524259

申请日：2023-11-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Yukinori SHIMA ,  Suzunosuke HIRAISHI ,  Kenichi OKAZAKI

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78633 ,  H01L29/78696

Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive.

公开(公告)号：US20240113138A1

公开(公告)日：2024-04-04

申请号：US18473750

申请日：2023-09-25

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hajime KIMURA ,  Kentaro HAYASHI ,  Shunpei YAMAZAKI

IPC: H01L27/12

CPC classification number: H01L27/1255 ,  H01L27/1225 ,  H01L27/1259

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a capacitor, a transistor, and a first insulating layer. The capacitor includes first and second conductive layers and a second insulating layer. The second insulating layer is in contact with a side surface of the first conductive layer, and the second conductive layer covers at least part of the side surface of the first conductive layer with the second insulating layer therebetween. The transistor includes third to fifth conductive layers, a semiconductor layer, and a third insulating layer. The third conductive layer is in contact with a top surface of the first conductive layer. The first insulating layer is provided over the third conductive layer, and the fourth conductive layer is provided over the first insulating layer. The first insulating layer and the fourth conductive layer include an opening portion reaching the third conductive layer. The semiconductor layer is in contact with the third and fourth conductive layers. The semiconductor layer includes a region positioned inside the opening portion. Over the semiconductor layer, the third insulating layer and the fifth conductive layer are provided in this order so as to each include a region positioned inside the opening portion.

公开(公告)号：US20240112645A1

公开(公告)日：2024-04-04

申请号：US18378757

申请日：2023-10-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kenichi WAKIMOTO ,  Masahiko HAYAKAWA

IPC: G09G3/36 ,  H01L27/12

CPC classification number: G09G3/3648 ,  G09G3/3611 ,  H01L27/1225 ,  G09G2300/0408 ,  G09G2330/022 ,  G09G2340/0435 ,  G09G2360/14

Abstract: To reduce power consumption of a display device with the use of a simple structure and a simple operation. The display device includes an input device. Input of an image signal to a driver circuit is controlled in accordance with an image operation signal output from the input device. Specifically, input of image signals at the time when the input device is not operated is less frequent than that at the time when the input device is operated. Accordingly, display degradation (deterioration of display quality) caused when the display device is used can be prevented and power consumed when the display device is not used can be reduced.

公开(公告)号：US20240109785A1

公开(公告)日：2024-04-04

申请号：US18536313

申请日：2023-12-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI

IPC: C01G9/00 ,  H01L29/66 ,  H01L29/786

CPC classification number: C01G9/006 ,  H01L29/66969 ,  H01L29/7869 ,  B82Y30/00

Abstract: A novel material and a transistor using a novel material are provided. A composite oxide includes at least two regions, one of which includes In, Zn and an element M1 (the element M1 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu), and the other of which includes In, Zn, and an element M2 (the element M2 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu). The proportion of the element M1 to In, Zn, and the element M1 in the region including the element M1 is less than that of the element M2 to In, Zn, and the element M2 in the region including the element M2. In an analysis of the composite oxide by X-ray diffraction, the diffraction pattern result in the X-ray diffraction is asymmetric with the angle at which the peak intensity of X-ray diffraction is detected as the symmetry axis.

公开(公告)号：US11949061B2

公开(公告)日：2024-04-02

申请号：US17899759

申请日：2022-08-31

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Minoru Takahashi ,  Ryota Tajima

IPC: H01M10/04 ,  H01G9/048 ,  H01G9/145 ,  H01M50/105 ,  H01M50/116 ,  H01M50/119 ,  H01M50/121 ,  H01M50/122 ,  H01M50/124 ,  H01M50/136 ,  H01G11/78

CPC classification number: H01M10/0436 ,  H01G9/048 ,  H01G9/145 ,  H01M50/105 ,  H01M50/116 ,  H01M50/119 ,  H01M50/121 ,  H01M50/122 ,  H01M50/124 ,  H01M50/136 ,  H01G11/78 ,  H01M2220/20 ,  H01M2220/30 ,  Y02E60/13 ,  Y02T10/70

Abstract: A secondary battery, suitable for a portable information terminal or a wearable device is provided. An electronic device having a novel structure which can have various forms and a secondary battery that fits the forms of the electronic device are provided. In the secondary battery, sealing is performed using a film provided with depressions or projections that ease stress on the film due to application of external force. A pattern of depressions or projections is formed on the film by pressing, e.g., embossing.