公开(公告)号：US20240406148A1

公开(公告)日：2024-12-05

申请号：US18626354

申请日：2024-04-04

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Uria Basher ,  Michael Tahar ,  Amir Modan ,  Ben Witulski ,  Miriam Menes ,  Miri Shtaif

IPC: H04L9/40

Abstract: In one embodiment, a system includes a networking device including a network interface to receive network packets having headers including datagram transport layer security (DTLS) headers from a remote device over a packet data network, packet processing circuitry to identify first packets of the received packets for DTLS processing in the packet processing circuitry, identify second packets of the received packets to bypass DTLS processing in the packet processing circuitry and to be provided to software to perform DTLS processing on the second packets, and perform DTLS processing on the first packets, and a host interface to provide the DTLS processed first packets to the software, and provide the second packets to the software to perform DTLS processing on the second packets.

公开(公告)号：US20240396916A1

公开(公告)日：2024-11-28

申请号：US18788700

申请日：2024-07-30

Applicant: Mellanox Technologies, Ltd.

Inventor： Chen Rozenbaum ,  Shauli Arazi ,  Bartley Richardson

IPC: H04L9/40 ,  G06N3/08

Abstract: Apparatuses, systems, and techniques for detecting that a host device is subject to a malicious network attack using a machine learning (ML) detection system are described. A computing system includes a graphics processing unit (GPU) and an integrated circuit with a network interface, and a hardware acceleration engine. The integrated circuit hosts a hardware-accelerated security service to extract features from network data and metadata from the hardware acceleration engine and sends the extracted features to the GPU. Using the ML detection system, the GPU determines whether the host device is subject to a malicious network attack using the extracted features. The GPU can send an enforcement rule to the integrated circuit responsive to a determination that the host device is subject to the malicious network activity.

公开(公告)号：US20240396839A1

公开(公告)日：2024-11-28

申请号：US18201074

申请日：2023-05-23

Applicant: Mellanox Technologies, Ltd.

Inventor： Yamin Friedman ,  Omer Shabtai ,  Yuval Shpigelman ,  Rotem Levinson

IPC: H04L47/10 ,  H04L47/125 ,  H04L47/25

Abstract: Technologies for optimizing the spreading of traffic across multiple local output ports while considering both local load and end-to-end (E2E) load are described. One device has multiple outgoing ports and a network adapter that determines, for a first flow of packets, a first end-to-end (E2E) congestion rate of at least some of the outgoing ports. The network adapter determines a port state of at least some of the outgoing ports. The network adapter receives a first packet associated with the first flow of packets. The network adapter determines, using a first desired rate for the first flow, the first E2E congestion rates, and the port states, i) a first time at which the first packet is to be transmitted and ii) a first outgoing port on which the first packet is to be transmitted. The first packet is sent on the first outgoing port at the first time.

公开(公告)号：US20240396302A1

公开(公告)日：2024-11-28

申请号：US18200655

申请日：2023-05-23

Applicant: Mellanox Technologies, Ltd.

Inventor： Attila FÜLÖP ,  Petter WESTBERGH ,  Steffan INTEMANN

IPC: H01S5/183

Abstract: Some embodiments of the present invention are directed to an aperture for a laser for high-bandwidth communication. The laser may include an active region configured to emit light parallel to an optical axis and an emission surface spaced from the active region and through which the light is emitted. The laser may also include an aperture positioned along the optical axis between the active region and the emission surface, where the aperture has a cross-sectional area in a plane perpendicular to the optical axis, and where the cross-sectional area defines a non-circular shape. In some embodiments, the non-circular shape may have at most one axis of symmetry. The aperture may be configured to reduce a spectral bandwidth of the light emitted by the laser and a relative intensity noise of the laser.

公开(公告)号：US20240394060A1

公开(公告)日：2024-11-28

申请号：US18321013

申请日：2023-05-22

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ariel Shahar ,  Avi Urman ,  Omri Kahalon ,  Uria Basher ,  Doron Haim ,  Sagi Farjun

IPC: G06F9/30 ,  G06F9/38

Abstract: A network device includes one or more ports, match-action circuitry, and an action processor. The one or more ports are to exchange packets between the network device and a network. The match-action circuitry is to match at least some of the packets to one or more rules so as to set respective actions to be performed, at least one of the actions including a programmable action. The instruction processor is to perform the programmable action by running user-programmable software code. The instruction processor includes architectural registers, one or more of the architectural registers being accessible by the match-action circuitry, and the match-action circuitry is to write into the architectural registers information for performing the programmable action.

公开(公告)号：US20240388053A1

公开(公告)日：2024-11-21

申请号：US18198407

申请日：2023-05-17

Applicant: Mellanox Technologies, Ltd.

Inventor： Itshak Kalifa ,  Elad Mentovich ,  Matan Galanty

IPC: H01S3/0941 ,  H01S3/08 ,  H01S5/30

Abstract: High-bandwidth lasers having minimized parasitic responses are described herein. In some embodiments, the present invention may be directed to a laser having a minimized parasitic response that is achieved by decreasing the active resistance of the laser's active region and decreasing the active capacitance of the laser. For example, the laser may include an active region having an active resistance as well as mirror regions, where the mirror regions have average dopant densities that decrease the active resistance of the active region and decrease the active capacitance of the laser. By decreasing the active resistance and the active capacitance, the −3 dB frequency of the parasitic response is increased. By increasing the −3 dB frequency of the parasitic response, a total response of the laser (e.g., a combination of an intrinsic response and the parasitic response) has a higher −3 dB frequency, thereby allowing the laser to operate at higher bandwidths.

公开(公告)号：US20240380184A1

公开(公告)日：2024-11-14

申请号：US18144984

申请日：2023-05-09

Applicant: Mellanox Technologies, Ltd.

Inventor： Vladimir Iakovlev ,  Yuri Berk ,  Isabelle Cestier ,  Elad Mentovich

IPC: H01S5/30 ,  H01S5/183

Abstract: Some embodiments of the present invention are directed to a tunnel junction for a vertical-cavity surface-emitting laser (VCSEL) that controls optical and current confinement within the VCSEL. The tunnel junction may define an electrical current injection area and an optical aperture for the VCSEL and may include a heavily p++ doped p-type material and a heavily n++ doped n-type material disposed on the p-type material. At least a portion of the outer edges of the n-type material are etched such that the n-type material has a cross-sectional area that is less than a cross-sectional area of the p-type material. By removing a portion of n-type material near the outer edge of the tunnel junction, a sloped effective refractive index is formed, and an effective area of the tunnel junction is changed, which increases the overlap of the current density and the optical field of the VCSEL.

公开(公告)号：US20240372923A1

公开(公告)日：2024-11-07

申请号：US18143411

申请日：2023-05-04

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Gal Shalom ,  Omri Kahalon ,  Adi Horowitz ,  Aviad Shaul Yehezkel ,  Eliav Bar-Ilan

IPC: H04L67/141 ,  H04L67/02 ,  H04L69/16 ,  H04L69/22

Abstract: A system for transmitting data is described, among other things. An illustrative system is disclosed to include one or more circuits to perform transmitting message-based data over packets. The circuits are capable of identifying a first message, transmitting a first portion of the first message in a first packet, the first packet including a bit indicating the first packet is message-based, and transmitting an end portion of the first message in a second packet, the second packet including a first bit indicating the second packet is message-based and a second bit indicating the second packet comprises the end portion of the first message.

公开(公告)号：US20240370579A1

公开(公告)日：2024-11-07

申请号：US18142968

申请日：2023-05-03

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan Finkelshtein ,  Michael Tahar ,  Irit Granovsky ,  Yaniv Strassberg ,  Guy-Avraham Harel

IPC: G06F21/60 ,  G06F21/62

Abstract: A system, circuit, and method are described, among other things. An illustrative system is disclosed to include a processor and a memory storing data for processing by the processor. The data, when processed, causes the processor to receive an initiator message comprising a request to access one or more registers of a plurality of registers, determine that the initiator message corresponds to an entry of a privilege access table, determine a configured level of access control for the initiator message to access the one or more requested registers based at least in part on a group mapping table, and provide a level of access to the one or more requested registers corresponding to the received initiator message based on the initiator message corresponding to the entry of the privilege access table and based, at least in part, on the determined configured level of access control.

公开(公告)号：US12131132B2

公开(公告)日：2024-10-29

申请号：US17180993

申请日：2021-02-22

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Adir Zevulun ,  Uria Basher ,  Nir Shmuel ,  Ben Witulski

IPC: G06F7/72

CPC classification number: G06F7/728

Abstract: An Integrated Montgomery Calculation Engine (IMCE), for multiplying two multiplicands modulo a predefined number, includes a Carry Save Adder (CSA) circuit and control circuitry. The CSA circuit has multiple inputs, and has outputs including a sum output and a carry output. The control circuitry is coupled to the inputs and the outputs of the CSA circuit and is configured to operate the CSA circuit in at least (i) a first setting that calculates a Montgomery precompute value and (ii) a second setting that calculates a Montgomery multiplication of the two multiplicands.