公开(公告)号：US10734460B2

公开(公告)日：2020-08-04

申请号：US16396752

申请日：2019-04-28

Applicant: Hsia-Ching Chu ,  Pai-Chiao Cheng

Inventor： Hsia-Ching Chu ,  Pai-Chiao Cheng

IPC: H01L27/32 ,  H01L51/52

Abstract: The disclosure provides a display device, including a substrate, a pixel define layer, a conductive line and a spacer. The pixel define layer is disposed on the substrate, wherein the pixel define layer includes a first opening region and a second opening region, wherein the second opening region is adjacent to the first opening region. The conductive line is disposed on the substrate, wherein in a top view of the display device, the conductive line is located between the first opening region and the second opening region. The spacer is disposed on the substrate, wherein the spacer at least partially overlaps the conductive line.

公开(公告)号：US20200237592A1

公开(公告)日：2020-07-30

申请号：US16776111

申请日：2020-01-29

Applicant: Yen Ching CHU

Inventor： Yen Ching CHU

IPC: A61G5/14 ,  A47C7/56

Abstract: The invention discloses a lifting seat, which has an upper cushion assembly, a lower cushion assembly, an elastic member and an adjustment structure. One end of the upper cushion assembly is rotatably connected with one end of the lower cushion assembly, and the elastic member is arranged between the upper cushion assembly and the lower cushion assembly; wherein, the upper cushion assembly and the lower cushion assembly rotate relatively to have an open state and a closed state. The elastic member is in compression state when it is closed, and the adjustment structure is used to change the torque of the upper cushion assembly to the elastic member when it is open and closed. The technical solution provided by the invention can solve the problem that the existing lifting seat cannot fully satisfy the user's sit-to-stand requirements.

公开(公告)号：US10591766B2

公开(公告)日：2020-03-17

申请号：US15794004

申请日：2017-10-26

Applicant: Pai-Chiao Cheng ,  Hsia-Ching Chu ,  Chandra Lius

Inventor： Pai-Chiao Cheng ,  Hsia-Ching Chu ,  Chandra Lius

IPC: G02F1/1335 ,  H01L27/32 ,  G02F1/1343 ,  G02F1/1362 ,  H01L29/786 ,  G09G3/3225 ,  H01L27/12

Abstract: A display apparatus including a substrate, a gate line, first and second driving transistors, and a color filter layer is provided. The substrate has first and second light emitting regions and a circuit region. The first light emitting region is disposed to be adjacent to the second light emitting region, and the circuit region is disposed to be adjacent to the first and second light emitting regions. The gate line is disposed in the circuit region and extends along a direction. The first and second driving transistors are respectively disposed in the circuit region, have a channel region, and corresponds to the first and second light emitting regions. The color filter layer has a main portion in the first light emitting region and an extending portion in the circuit region and connected to the main portion. The extending portion extends along the direction and overlaps the channel regions.

公开(公告)号：US09048104B2

公开(公告)日：2015-06-02

申请号：US12834853

申请日：2010-07-12

Applicant: Benedict C. K. Choy ,  Ching Chu ,  Haibing (Robin) Liu ,  Ming-Yuan Yeh

Inventor： Benedict C. K. Choy ,  Ching Chu ,  Haibing (Robin) Liu ,  Ming-Yuan Yeh

IPC: H01L29/40 ,  H01L23/00 ,  H01L23/495 ,  H01L23/525 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0642 ,  H01L23/481 ,  H01L23/49575 ,  H01L23/525 ,  H01L24/06 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L27/088 ,  H01L29/0878 ,  H01L29/66712 ,  H01L29/7809 ,  H01L29/7827 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48135 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/10161 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A circuit module comprises a die attach pad with a surface and a plurality of leads surrounding the surface. A nonconductive adhesive is on the surface. A plurality of electronic circuit dies are on the surface of the die attach pad. Each die has a top surface and a bottom surface with the bottom surface on the adhesive. The top surface has a plurality of bonding pads. A first electronic circuit die has at least one routing path of a conductive material connecting a first bonding pad to a second bonding pad. A first bonding wire connects a bonding pad of a second electronic circuit die to the first bonding pad of the first electronic die. A second bonding wire connects the second bonding pad of the first electronic circuit die to a lead. Where one of the dies contains vertical circuit element, where a doped layer forms a terminal along the bottom surface of the layer, a trench filled with doped polysilicon extends from the top surface to the terminal to connect to the terminal. The doped polysilicon filled trench also serves to isolate and separate different circuit elements.

Abstract translation: 电路模块包括具有表面的管芯附接垫和围绕表面的多个引线。 非导电粘合剂在表面上。 多个电子电路管芯在管芯附着垫的表面上。 每个模具具有顶表面和底表面，底表面在粘合剂上。 顶表面具有多个接合焊盘。 第一电子电路管芯具有将第一接合焊盘连接到第二接合焊盘的导电材料的至少一个布线路径。 第一接合线将第二电子电路管芯的接合焊盘连接到第一电子管芯的第一接合焊盘。 第二接合线将第一电子电路管芯的第二接合焊盘连接到引线。 在其中一个裸片包含垂直电路元件的情况下，其中掺杂层沿着该层的底表面形成端子，填充有掺杂多晶硅的沟槽从顶表面延伸到端子以连接至端子。 掺杂多晶硅填充的沟槽还用于隔离和分离不同的电路元件。

公开(公告)号：US20140063422A1

公开(公告)日：2014-03-06

申请号：US13603134

申请日：2012-09-04

Applicant: Chia-Ching Chu

Inventor： Chia-Ching Chu

IPC: G02F1/1333 ,  H05K13/00

CPC classification number: G02F1/134336 ,  G02F1/133609 ,  G02F2201/52 ,  G09G2300/0452 ,  G09G2320/0242 ,  G09G2320/0666 ,  Y10T29/49002

Abstract: Methods and devices to compensate for image color variance due to display temperatures are provided. In one example, a display of an electronic device may include a first pixel section that has multiple pixels. The pixels may include a red subpixel, green subpixel, and blue subpixel that each has a respective aperture ratio. The display may also include a second pixel section that has multiple pixels. Again, the pixels may include a red subpixel, green subpixel, and blue subpixel that each has a respective aperture ratio. One or more of the subpixel aperture ratios of the first pixel section may be greater than a respective one or more of the subpixel aperture ratios of the second section to overcome image color variance that may exist due to temperature variations of the display.

Abstract translation: 提供了由于显示温度而补偿图像颜色变化的方法和装置。 在一个示例中，电子设备的显示器可以包括具有多个像素的第一像素部分。 像素可以包括每个具有相应开口率的红色子像素，绿色子像素和蓝色子像素。 显示器还可以包括具有多个像素的第二像素部分。 再次，像素可以包括每个具有相应开口率的红色子像素，绿色子像素和蓝色子像素。 第一像素部分的子像素孔径比的一个或多个可以大于第二部分的子像素孔径比中的相应一个或多个，以克服由于显示器的温度变化而可能存在的图像颜色变化。

公开(公告)号：US20140049299A1

公开(公告)日：2014-02-20

申请号：US13587551

申请日：2012-08-16

Applicant: Ching Chu

Inventor： Ching Chu

IPC: H03B28/00

CPC classification number: G10K11/346

Abstract: An electrical waveform generating circuit has a programmable current source-driver. A digital switched current source is coupled to the programmable current source-driver and controlled by waveforms stored in the programmable current source-driver. A plurality of MOSFETs is coupled to the programmable current source driver. A first coupled inductor is connected to the plurality of high voltage MOSFETs. A transducer is coupled to the first coupled inductor.

Abstract translation: 电波形发生电路具有可编程电流源驱动器。 数字开关电流源耦合到可编程电流源驱动器并由存储在可编程电流源驱动器中的波形控制。 多个MOSFET耦合到可编程电流源驱动器。 第一耦合电感器连接到多个高压MOSFET。 传感器耦合到第一耦合电感器。

公开(公告)号：US08542037B2

公开(公告)日：2013-09-24

申请号：US13355749

申请日：2012-01-23

Applicant: Ben Choy ,  Ching Chu

Inventor： Ben Choy ,  Ching Chu

IPC: H03K3/00

CPC classification number: H03F3/2173 ,  B06B1/0215 ,  B06B2201/76 ,  G01S7/5202 ,  H03K17/6872

Abstract: A multi-level high-voltage pulse generator integrated circuit has a digital logic-level control interface circuit. A pair of complementary MOSFETs is controlled by the digital control interface circuit. A pair of supply voltage rails is provided, wherein one of the pair of supply voltage rails is connected to each of the pair of complementary MOSFETs. A pair of Zener diodes is provided, wherein one of the pair of Zener diodes is connected to each of the pair of complementary MOSFETs. A pair of resistors is provided, wherein one of the pair of resistors is connected in parallel with each of the pair of Zener diodes. A pair of complementary voltage blocking-MOSFETs having predetermined gate bias voltages is provided, wherein each of the pair complementary voltage blocking-MOSFETs is attached to a corresponding one pair of complementary MOSFETs.

Abstract translation: 多级高压脉冲发生器集成电路具有数字逻辑电平控制接口电路。 一对互补MOSFET由数字控制接口电路控制。 提供一对电源电压轨，其中一对电源电压轨之一连接到该对互补MOSFET中的每一对。 提供了一对齐纳二极管，其中一对齐纳二极管中的一个连接到该对互补MOSFET中的每一对。 提供一对电阻器，其中一对电阻器中的一个电阻器与该对齐纳二极管中的每一个并联连接。 提供了具有预定栅极偏置电压的一对互补电压阻挡MOSFET，其中每对互补电压阻挡MOSFET被附接到相应的一对互补MOSFET。

公开(公告)号：US08471990B2

公开(公告)日：2013-06-25

申请号：US13034673

申请日：2011-02-24

Applicant: Kung-Ching Chu ,  Te-Wei Chan ,  Cheng-Han Tsao ,  Sheng-Ju Ho ,  Chung-Yi Chiu

Inventor： Kung-Ching Chu ,  Te-Wei Chan ,  Cheng-Han Tsao ,  Sheng-Ju Ho ,  Chung-Yi Chiu

IPC: G02F1/1343

CPC classification number: G02F1/134309 ,  G02F1/133707 ,  G02F1/133753

Abstract: A pixel structure electrically connected to a scan line and a data line is provided. The pixel structure includes an active device and a pixel electrode, wherein the active device is electrically connected to the scan line and the data line, and the pixel electrode is electrically connected to the active device. The pixel electrode has a plurality of strip-shaped slit groups. Each of the strip-shaped slit groups includes a plurality of strip-shaped slits whose extending directions are substantially parallel to each other, and contours of at least parts of the strip-shaped slits are non-isosceles trapezoids.

Abstract translation: 提供电连接到扫描线和数据线的像素结构。 像素结构包括有源器件和像素电极，其中有源器件电连接到扫描线和数据线，并且像素电极电连接到有源器件。 像素电极具有多个条形狭缝组。 每个条形狭缝组包括多个条形狭缝，其延伸方向基本上彼此平行，并且条形狭缝的至少一部分的轮廓是非等腰梯形。

公开(公告)号：US20120181541A1

公开(公告)日：2012-07-19

申请号：US13433660

申请日：2012-03-29

Applicant: Chin-An Tseng ,  Hung-Lung Hou ,  Chia-Yu Lee ,  Chieh-Wei Chen ,  Kung-Ching Chu ,  Yen-Heng Huang ,  Chung-Kai Chen ,  Yi-Tsun Lin ,  Chun-Jen Chiu

Inventor： Chin-An Tseng ,  Hung-Lung Hou ,  Chia-Yu Lee ,  Chieh-Wei Chen ,  Kung-Ching Chu ,  Yen-Heng Huang ,  Chung-Kai Chen ,  Yi-Tsun Lin ,  Chun-Jen Chiu

IPC: H01L29/786

CPC classification number: H01L29/41733 ,  H01L27/124

Abstract: A thin film transistor (TFT) array substrate includes a stack structure disposed to raise an extended electrode of a drain electrode of a thin film transistor. Therefore, a contact hole does need to be very deep to expose the extended electrode of the drain electrode.

Abstract translation: 薄膜晶体管（TFT）阵列基板包括布置成升高薄膜晶体管的漏电极的延伸电极的堆叠结构。 因此，接触孔确实需要非常深以露出漏电极的延伸电极。

公开(公告)号：US20120181499A1

公开(公告)日：2012-07-19

申请号：US13046994

申请日：2011-03-14

Applicant: Tung-Hua Chuang ,  Yi-Chou Chen ,  Tsung-Shune Chin ,  Kin-Fu Kao ,  Po-Chin Chang ,  Yung-Ching Chu

Inventor： Tung-Hua Chuang ,  Yi-Chou Chen ,  Tsung-Shune Chin ,  Kin-Fu Kao ,  Po-Chin Chang ,  Yung-Ching Chu

IPC: H01L45/00 ,  C09K3/00

CPC classification number: H01L45/06 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/148 ,  H01L45/1625

Abstract: A phase change material comprising a quaternary GaTeSb material consisting essentially of MA(GaxTeySbz)B, and where M comprises a group IVA element C, Si, Ge, Sn, Pb, a group VA element N, P, As, Sb, Bi, or a group VIA element O, S, Se, Te, Po, having a value A such that the transition temperature is increased relative to the transition temperature in GaxTeySbz, without M, and the difference between the melting temperature and the transition temperature is reduced relative to the difference in GaxTeySbz, without M.

Abstract translation: 一种相变材料，其包含基本上由MA（GaxTeySbz）B组成的四元GaTeSb材料，其中M包含IVA族元素C，Si，Ge，Sn，Pb，VA族元素N，P，As，Sb，Bi， 或具有值A的组VIA元素O，S，Se，Te，Po，使得转变温度相对于GaxTeySbz中的转变温度而不增加，并且熔融温度和转变温度之间的差减小 相对于GaxTeySbz的差异，没有M.