MILLIMETER-WAVE ON-CHIP SWITCH EMPLOYING FREQUENCY-DEPENDENT INDUCTANCE FOR CANCELLATION OF OFF-STATE CAPACITANCE
    33.
    发明申请
    MILLIMETER-WAVE ON-CHIP SWITCH EMPLOYING FREQUENCY-DEPENDENT INDUCTANCE FOR CANCELLATION OF OFF-STATE CAPACITANCE 有权
    采用离散电源的毫米波片式开关,用于取消非状态电容的频率依赖性电感

    公开(公告)号:US20120019313A1

    公开(公告)日:2012-01-26

    申请号:US12839777

    申请日:2010-07-20

    Abstract: A semiconductor switching device includes a field effect transistor and an inductor structure that provides a frequency dependent inductance in a parallel connection. During the off-state of the semiconductor switching device, the frequency dependent impedance component due to the off-state parasitic capacitance of the switching device is cancelled by the frequency dependent inductance component of the inductor structure, which provides a non-linear impedance as a function of frequency. The inductor structure provides less inductance at a higher operating frequency than at a lower operating frequency to provide more effective cancellation of two impedance components of the parasitic capacitance and the inductance. Thus, the semiconductor switching device can provide low parasitic coupling at multiple operating frequencies. The operating frequencies of the semiconductor switching device can be at gigahertz ranges for millimeter wave applications.

    Abstract translation: 半导体开关器件包括场效应晶体管和在并联连接中提供频率相关电感的电感器结构。 在半导体开关器件的截止状态期间,由开关器件的截止状态寄生电容引起的与频率相关的阻抗分量被电感器结构的频率相关的电感分量抵消,该电感器结构提供非线性阻抗作为 频率功能 电感器结构在较高工作频率下提供比在较低工作频率下更小的电感,以提供更有效地消除寄生电容和电感的两个阻抗分量。 因此,半导体开关器件可以在多个工作频率下提供低的寄生耦合。 对于毫米波应用,半导体开关器件的工作频率可以是千兆赫兹范围。

    METHOD, STRUCTURE, AND DESIGN STRUCTURE FOR A THROUGH-SILICON-VIA WILKINSON POWER DIVIDER
    35.
    发明申请
    METHOD, STRUCTURE, AND DESIGN STRUCTURE FOR A THROUGH-SILICON-VIA WILKINSON POWER DIVIDER 有权
    通过威尔肯森森电力公司通过硅的方法,结构和设计结构

    公开(公告)号:US20110049676A1

    公开(公告)日:2011-03-03

    申请号:US12548033

    申请日:2009-08-26

    Abstract: A method, structure, and design structure for a through-silicon-via Wilkinson power divider. A method includes: forming an input on a first side of a substrate; forming a first leg comprising a first through-silicon-via formed in the substrate, wherein the first leg electrically connects the input and a first output; forming a second leg comprising a second through-silicon-via formed in the substrate, wherein the second leg electrically connects the input and a second output, and forming a resistor electrically connected between the first output and the second output.

    Abstract translation: 一种通过硅通孔威尔金森功率分配器的方法,结构和设计结构。 一种方法包括:在基板的第一侧上形成输入; 形成包括在所述基板中形成的第一穿通硅通孔的第一支脚,其中所述第一支路电连接所述输入端和第一输出端; 形成包括形成在所述基板中的第二通硅通孔的第二支脚,其中所述第二支脚电连接所述输入端和第二输出端,以及形成电连接在所述第一输出端和所述第二输出端之间的电阻器。

    Compact On-Chip Branchline Coupler Using Slow Wave Transmission Line
    36.
    发明申请
    Compact On-Chip Branchline Coupler Using Slow Wave Transmission Line 有权
    使用慢波传输线的紧凑型片上分支线耦合器

    公开(公告)号:US20110043299A1

    公开(公告)日:2011-02-24

    申请号:US12542958

    申请日:2009-08-18

    CPC classification number: H01P3/082 H01L27/0617 H01L27/0629 H01P5/227

    Abstract: Branchline coupler structure using slow wave transmission line effect having both large inductance and large capacitance per unit length. The branchline coupler structure includes a plurality of quarter-wavelength transmission lines, at least one of which includes a high impedance arm and a low impedance arm. The high and low impedances are relative to each other. The high impedance arm includes a plurality of narrow cells and having an inductance of nL and a capacitance of C/n, and the low impedance arm includes a plurality of wide cells and having an inductance of L/n and capacitance of nC. The wide and narrow cells are relative to each other, and the wide and narrow cells are adjacent each other to form a signal layer having step discontinuous alternative widths.

    Abstract translation: 使用慢波传输线效应的分支线耦合器结构具有每单位长度的大电感和大电容。 支线耦合器结构包括多个四分之一波长传输线,其中至少一个包括高阻抗臂和低阻抗臂。 高阻抗和低阻抗是相对的。 高阻抗臂包括多个窄电池并且具有nL的电感和C / n的电容,并且低阻抗臂包括多个宽电池并且具有L / n的电感和nC的电容。 宽和窄的单元彼此相对,并且宽和窄的单元彼此相邻以形成具有阶梯不连续替代宽度的信号层。

    METHODS OF FABRICATING COPLANAR WAVEGUIDE STRUCTURES
    38.
    发明申请
    METHODS OF FABRICATING COPLANAR WAVEGUIDE STRUCTURES 有权
    制备共振波导结构的方法

    公开(公告)号:US20090249610A1

    公开(公告)日:2009-10-08

    申请号:US12061861

    申请日:2008-04-03

    Abstract: Methods for fabricating a coplanar waveguide structure. The method may include forming first and second ground conductors and a signal conductor in a coplanar arrangement between the first and second ground conductors, forming a first coplanar array of substantially parallel shield conductors above the signal conductor and the first and second ground conductors, and forming a second coplanar array of substantially parallel shield conductors below the signal conductor and the first and second ground conductors. The method further includes forming a first plurality of conductive bridges located laterally between the signal conductor and the first ground conductor, and forming a second plurality of conductive bridges located laterally between the signal conductor and the second ground conductor. Each of the first plurality of conductive bridges connects one of the shield conductors in the first array with one of the shield conductors in the second array. Each of the second plurality of conductive bridges connects one of the shield conductors in the first array with one of the shield conductors in the second array.

    Abstract translation: 制造共面波导结构的方法。 该方法可以包括在第一和第二接地导体之间的共面布置中形成第一和第二接地导体和信号导体,在信号导体和第一和第二接地导体之上形成基本上平行的屏蔽导体的第一共面阵列,并形成 在信号导体和第一和第二接地导体下面的基本上平行的屏蔽导体的第二共面阵列。 该方法还包括形成位于信号导体和第一接地导体之间横向定位的第一多个导电桥,以及形成位于信号导体和第二接地导体之间横向定位的第二多个导电桥。 第一多个导电桥中的每一个将第一阵列中的一个屏蔽导体与第二阵列中的屏蔽导体中的一个连接。 第二多个导电桥中的每一个将第一阵列中的一个屏蔽导体与第二阵列中的屏蔽导体中的一个连接。

    ON-CHIP INTEGRATED VOLTAGE-CONTROLLED VARIABLE INDUCTOR, METHODS OF MAKING AND TUNING SUCH VARIABLE INDUCTORS, AND DESIGN STRUCTURES INTEGRATING SUCH VARIABLE INDUCTORS
    39.
    发明申请
    ON-CHIP INTEGRATED VOLTAGE-CONTROLLED VARIABLE INDUCTOR, METHODS OF MAKING AND TUNING SUCH VARIABLE INDUCTORS, AND DESIGN STRUCTURES INTEGRATING SUCH VARIABLE INDUCTORS 有权
    片上集成电压可变电感器,制造和调谐这种可变电感器的方法以及集成这种可变电感器的设计结构

    公开(公告)号:US20090189725A1

    公开(公告)日:2009-07-30

    申请号:US12021339

    申请日:2008-01-29

    CPC classification number: H01F21/005 H01F17/0006 H01F21/12 Y10T29/4902

    Abstract: On-chip integrated variable inductors, methods of making and tuning an on-chip integrated variable inductor, and design structures embodying a circuit containing the on-chip integrated variable inductor. The inductor generally includes a signal line configured to carry an electrical signal, a ground line positioned in proximity to the signal line, and at least one control unit electrically coupled with the ground line. The at least one control unit is configured to open and close switch a current path connecting the ground line with a ground potential so as to change an inductance of the signal line.

    Abstract translation: 片上集成可变电感器,制造和调谐片上集成可变电感器的方法,以及体现包含片上集成可变电感器的电路的设计结构。 电感器通常包括配置为承载电信号的信号线,位于信号线附近的接地线以及与接地线电耦合的至少一个控制单元。 至少一个控制单元被配置为打开和闭合将接地线连接到地电位的电流路径,以便改变信号线的电感。

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