公开(公告)号：US20070065026A1

公开(公告)日：2007-03-22

申请号：US11516603

申请日：2006-09-07

Applicant: Yung-lyul Lee ,  Dae-yeon Kim ,  Ki-hun Han ,  Jao-ho Hur

Inventor： Yung-lyul Lee ,  Dae-yeon Kim ,  Ki-hun Han ,  Jao-ho Hur

IPC: G06K9/36

CPC classification number: H04N19/12 ,  H04N19/147 ,  H04N19/176 ,  H04N19/593 ,  H04N19/61

Abstract: Provided are a method of and apparatus for lossless video encoding and decoding, in which a differential residual block generated by calculating a difference between pixels of a residual block resulting from interprediction is encoded, thereby improving the compression rate. The method of lossless video encoding includes performing interprediction between a reference frame and a current frame in units of a predetermined-size block to generate a predicted block of a current block to be encoded, generating a residual block composed of residual signals corresponding to differences between pixels of the predicted block and the current block, calculating differences between the residual signals of the residual block in a predetermined direction and generating a differential residual block based on the calculated differences, and performing entropy-encoding on the differential residual block.

Abstract translation: 提供了一种用于无损视频编码和解码的方法和装置，其中通过计算由间隔预测产生的残差块的像素之间的差异而产生的差分残差块被编码，从而提高了压缩率。 无损视频编码的方法包括以预定大小的块为单位执行参考帧和当前帧之间的间隔预测，以产生要编码的当前块的预测块，产生由对应于 计算预测块和当前块的像素，计算在预定方向上的残差块的残差信号之间的差异，并基于计算的差产生差分残差块，并对差分残差块进行熵编码。

公开(公告)号：US07101759B2

公开(公告)日：2006-09-05

申请号：US10750252

申请日：2003-12-31

Applicant: Chang Hun Han

Inventor： Chang Hun Han

IPC: H01L21/8247

CPC classification number: H01L27/11521 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/32139 ,  H01L27/115

Abstract: Methods of fabricating nonvolatile memory devices are disclosed. A disclosed method comprises forming a trench isolation layer on a substrate; forming an oxide layer and a polysilicon layer; forming a sacrificial layer on the polysilicon layer; forming a photoresist pattern on the sacrificial layer; performing an etching process using the photoresist pattern as a mask and, at the same time, attaching polymers on sidewalls of the etched sacrificial layer to form polymer layers, the polymers being generated from the etching of the sacrificial layer; and forming a floating gate and a tunnel oxide by removing part of the polysilicon layer and the oxide layer using the polymer layers and the photoresist pattern as a mask. The disclosed method can increase the width of a floating gate by using polymer layers in fabricating a two-bit type cell, thereby ensuring a higher coupling ratio compared to the coupling ratio of a conventional two-bit type cell.

Abstract translation: 公开了制造非易失性存储器件的方法。 所公开的方法包括在衬底上形成沟槽隔离层; 形成氧化物层和多晶硅层; 在所述多晶硅层上形成牺牲层; 在牺牲层上形成光致抗蚀剂图案; 执行使用光致抗蚀剂图案作为掩模的蚀刻工艺，并且同时将聚合物附着在蚀刻的牺牲层的侧壁上以形成聚合物层，该聚合物是从牺牲层的蚀刻产生的; 并且通过使用聚合物层和光致抗蚀剂图案作为掩模，通过去除多晶硅层和氧化物层的一部分来形成浮置栅极和隧道氧化物。 所公开的方法可以通过在制造两位型电池中使用聚合物层来增加浮动栅极的宽度，由此确保与传统的两位型电池的耦合比相比更高的耦合比。

公开(公告)号：US20060169411A1

公开(公告)日：2006-08-03

申请号：US11327408

申请日：2006-01-09

Applicant: Jung-Hun Han ,  Jin-Jun Park ,  Do-In Bae

Inventor： Jung-Hun Han ,  Jin-Jun Park ,  Do-In Bae

IPC: H01L21/306

CPC classification number: C23C16/4412

Abstract: An apparatus for catching byproducts in semiconductor device processing equipment is disposed in an exhaust line between a process chamber and a vacuum pump. The apparatus includes a cylindrical trap housing member, an upper cover and a lower cover covering the upper part and lower part of the trap housing, respectively, a heater disposed under the upper cover, first and second cooling plates disposed in the trap housing, a post spacing the cooling plates, apart and a cooling system for cooling respective portions of the apparatus. The cooling system includes a delivery pipe for supplying refrigerant, a discharge pipe for discharging the refrigerant from the apparatus, first cooling piping extending through each cooling plate and connected to the delivery and discharge pipes, and second cooling piping extending helically along the outer circumferential surface of the trap housing.

公开(公告)号：US20060138484A1

公开(公告)日：2006-06-29

申请号：US11319067

申请日：2005-12-28

Applicant: Chang Hun Han

Inventor： Chang Hun Han

IPC: H01L31/113 ,  H01L31/00 ,  H01L27/10

CPC classification number: H01L27/14643 ,  H01L27/1463 ,  H01L27/14687 ,  H01L27/14689

Abstract: A CMOS image sensor includes a first conductive type semiconductor substrate having an active region and a device isolation region, a device isolation film formed in the device isolation region of the semiconductor substrate, a second conductive type diffusion region formed in the active region of the semiconductor substrate, and an ion implantation prevention layer formed in the vicinity of the device isolation film, including a boundary portion between the device isolation film and the second conductive type diffusion region.

Abstract translation: CMOS图像传感器包括具有有源区和器件隔离区的第一导电类型半导体衬底，形成在半导体衬底的器件隔离区中的器件隔离膜，形成在半导体的有源区中的第二导电型扩散区 衬底和形成在器件隔离膜附近的离子注入防止层，包括器件隔离膜和第二导电类型扩散区之间的边界部分。

公开(公告)号：US20060034649A1

公开(公告)日：2006-02-16

申请号：US11183755

申请日：2005-07-19

Applicant: Dong-Hun Han ,  Myung-Bo Son ,  Yong-duk Lee

Inventor： Dong-Hun Han ,  Myung-Bo Son ,  Yong-duk Lee

IPC: B41J13/076 ,  B41J13/02 ,  B41J13/03

CPC classification number: B41J13/02 ,  B41J13/025 ,  B41J13/076 ,  B65H5/062 ,  B65H27/00 ,  B65H2401/111 ,  B65H2404/1316 ,  B65H2404/14 ,  B65H2404/143 ,  B65H2404/144 ,  B65H2404/182 ,  B65H2404/185 ,  B65H2404/5322 ,  B65H2513/40 ,  B65H2220/03

Abstract: A paper transfer unit includes a pinch roller and a feed roller having a first outer portion, which defines a reference radius used to determine a paper transfer rate. A second outer portion is also provided having a substantially elastic rubber layer An elastic element elastically biases the pinch roller and the feed roller toward each other.

Abstract translation: 纸张传送单元包括夹送辊和具有第一外部部分的进给辊，该第一外部部分限定用于确定纸张传送速率的参考半径。 还设置有第二外部部分，其具有基本上弹性的橡胶层。弹性元件将夹送辊和进给辊朝向彼此弹性偏压。

公开(公告)号：US20060012663A1

公开(公告)日：2006-01-19

申请号：US11172820

申请日：2005-07-05

Applicant: Dac-hycok Im ,  Kyung-pyo Kang ,  Hyoung-il Kim ,  Myung-bo Son ,  Dong-hun Han ,  Yong-duk Lee

Inventor： Dac-hycok Im ,  Kyung-pyo Kang ,  Hyoung-il Kim ,  Myung-bo Son ,  Dong-hun Han ,  Yong-duk Lee

IPC: B41J2/34

CPC classification number: B41J2/32 ,  B41J3/60 ,  B41J11/0095 ,  B41J11/04 ,  B41J11/42 ,  B41J13/0027 ,  B41J13/03 ,  B65H5/06 ,  B65H2553/51

Abstract: A thermal printer and a printing method are provided. The thermal printer includes a thermal printhead for applying a predetermined amount of heat to a thermal recording paper to develop a print layer provided on the thermal recording paper; a feeding roller for feeding the thermal recording paper, a platen roller for facing the thermal printhead to support the thermal recording paper, wherein the thermal recording paper passes between the thermal printhead and the platen roller, a first encoder sensor for detecting a rotation of the platen roller, a second encoder sensor for detecting rotation of the feeding roller; a counting unit for counting first and second pulse signals generated from the first and second encoder sensors, respectively, and a switching unit of the first and second pulse signals as a variable to control the feeding of the thermal recording paper.

Abstract translation: 提供热敏打印机和打印方法。 热敏打印机包括用于向热敏记录纸施加预定量的热量以形成设置在热敏记录纸上的印刷层的热打印头; 用于馈送热敏记录纸的馈送辊，用于面对热敏打印头以支撑热敏记录纸的压纸辊，其中热敏记录纸通过热打印头和压纸辊之间，第一编码器传感器用于检测热敏记录纸的旋转 压纸辊，用于检测进给辊的旋转的第二编码器传感器; 计数单元，用于分别从第一和第二编码器传感器产生的第一和第二脉冲信号和第一和第二脉冲信号的切换单元作为变量来控制热敏记录纸的馈送。

公开(公告)号：US06984590B2

公开(公告)日：2006-01-10

申请号：US10743483

申请日：2003-12-22

Applicant: Chang Hun Han ,  Dong Oog Kim

Inventor： Chang Hun Han ,  Dong Oog Kim

IPC: H01L21/20 ,  H01L21/265

CPC classification number: H01L29/66825 ,  H01L21/2652 ,  H01L21/324

Abstract: A method of manufacturing an EEPROM device is disclosed. An example method forms a screen oxide film on a semiconductor substrate, forms a first ion implantation mask defining a gate insulating film forming region on the screen oxide film, and performs a first ion implantation on the semiconductor substrate and the first ion implantation mask. The example method also performs a first annealing of the semiconductor substrate, removes the screen oxide film and the first ion implantation mask, and forms a gate oxide film on the semiconductor substrate. In addition, the example method forms a second ion implantation mask defining a gate insulating film forming region on the gate oxide film, performs a second ion implantation on the semiconductor substrate and the second ion implantation mask, performs a second annealing for the semiconductor substrate, removes the second ion implantation mask; and forms a tunnel oxide film on the gate oxide film.

Abstract translation: 公开了一种制造EEPROM器件的方法。 示例性方法在半导体衬底上形成屏幕氧化膜，在屏幕氧化膜上形成限定栅极绝缘膜形成区域的第一离子注入掩模，并在半导体衬底和第一离子注入掩模上执行第一离子注入。 该示例方法还执行半导体衬底的第一退火，去除屏蔽氧化物膜和第一离子注入掩模，并在半导体衬底上形成栅极氧化膜。 此外，该示例性方法形成在栅极氧化膜上限定栅极绝缘膜形成区域的第二离子注入掩模，在半导体衬底和第二离子注入掩模上执行第二离子注入，对半导体衬底进行第二退火， 去除第二离子注入掩模; 并在栅极氧化膜上形成隧道氧化膜。

公开(公告)号：US06902979B2

公开(公告)日：2005-06-07

申请号：US10201860

申请日：2002-07-24

Applicant: Chang Hun Han

Inventor： Chang Hun Han

IPC: H01L21/76 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/105 ,  H01L27/115 ,  H01L21/8234

CPC classification number: H01L27/11253 ,  H01L27/105 ,  H01L27/11293

Abstract: A method for manufacturing a mask ROM of flat cell structure. The method includes the steps of: providing a semiconductor substrate having a flat cell array region and a peripheral circuit region; forming a first and a second mask patterns exposing a substrate portions corresponding to a diffusion layer formation region of the flat cell array region and a device isolation layer of the peripheral circuit region; ion-implanting an impurity in the exposed substrate portions; forming a trench by etching the exposed substrate portion peripheral circuit region; forming a linear oxide layer on the first and the second mask patterns and the surface of the trench, a diffusion layer on the flat cell array region, and a barrier oxide layer on the surface of diffusion layer in accordance with a thermal oxidation process; depositing an oxide layer on the linear oxide layer to fill up the trench; polishing the oxide layer to expose the surface of the first and the second mask patterns; and forming a diffusion layer on the flat cell array region and a trench type isolation layer on the peripheral circuit region by removing the first and the second mask patterns.

Abstract translation: 一种扁平单元结构的掩模ROM的制造方法。 该方法包括以下步骤：提供具有扁平单元阵列区域和外围电路区域的半导体衬底; 形成暴露与所述扁平单元阵列区域的扩散层形成区域对应的衬底部分和所述外围电路区域的器件隔离层的第一和第二掩模图案; 在暴露的衬底部分中离子注入杂质; 通过蚀刻暴露的基板部分外围电路区域形成沟槽; 在第一和第二掩模图案和沟槽的表面上形成线性氧化物层，在平坦单元阵列区域上形成扩散层，根据热氧化工艺在扩散层的表面上形成阻挡氧化物层; 在所述线性氧化物层上沉积氧化物层以填充所述沟槽; 抛光所述氧化物层以暴露所述第一和第二掩模图案的表面; 以及通过去除第一和第二掩模图案，在平坦单元阵列区域上形成扩散层和外围电路区域上的沟槽型隔离层。

公开(公告)号：US20050104647A1

公开(公告)日：2005-05-19

申请号：US10987430

申请日：2004-11-12

Applicant: Chul Choi ,  Jae-Goo Lee ,  Byung-Hun Han

Inventor： Chul Choi ,  Jae-Goo Lee ,  Byung-Hun Han

IPC: G09G3/36 ,  G02F1/133 ,  G06F1/04 ,  G09G3/20 ,  H03K17/687 ,  H03K19/0175 ,  H03K19/0185 ,  H04N5/66

CPC classification number: G06F1/04

Abstract: Provided are a level shifter circuit and a corresponding method for controlling voltage levels of a clock signal and an inverted clock signal for driving gate lines of a ASG thin film transistor liquid crystal display panel, where the level shifter circuit includes first and second level shifters, the first level shifter controls the voltage level of the clock signal to swing between a negative external voltage level and a positive external voltage level in response to a clock activating signal, and increases the voltage level of the clock signal from the negative external voltage level to a power supply voltage level or decreases it from the positive external voltage level to a ground voltage level while a pre-charge clock activating signal is activated, the second level shifter controls the voltage level of the inverted clock signal to swing between the negative external voltage level and the positive external voltage level in response to an inverted clock activating signal, and increases the voltage level of the inverted clock signal from the negative external voltage level to the power supply voltage level or decreases it from the positive external voltage level to the ground voltage level while an inverted pre-charge clock activating signal is activated, and the level shifter circuit increases or decreases the voltage levels of the clock signal and inverted clock signal using a battery voltage or a ground voltage, thereby reducing current consumption caused by the increase or decrease in the voltage level.

Abstract translation: 提供了一种用于控制用于驱动ASG薄膜晶体管液晶显示面板的栅极线的时钟信号和反相时钟信号的电压电平的电平移位器电路和相应方法，其中电平移位器电路包括第一和第二电平移位器， 第一电平移位器响应于时钟激活信号控制时钟信号的电压电平在负的外部电压电平和正的外部电压电平之间摆动，并且将时钟信号的电压电平从负的外部电压电平提高到 电源电压电平或者从正的外部电压电平降低到接地电压电平，同时预充电时钟激活信号被激活，第二电平移位器控制反相时钟信号的电压电平在负外部电压之间摆动 电平和正的外部电压电平响应于反相时钟激活信号，并且包括 将反相时钟信号的电压电平从负外部电压电平降低到电源电压电平，或将其从正外部电压电平降低到接地电压电平，同时反相的预充电时钟激活信号被激活，并且电平 移位器电路使用电池电压或接地电压来增加或减少时钟信号和反相时钟信号的电压电平，由此降低由电压电平的增加或减少引起的电流消耗。

公开(公告)号：US5741511A

公开(公告)日：1998-04-21

申请号：US627805

申请日：1996-04-10

Applicant: Hun Han Lee ,  Joong Woong Cho ,  Choul Young Kim ,  Chaul Min Pai ,  Jin Deog Song ,  Chul Min Park ,  Hye Jeong Yoon ,  Yoon Yeo ,  Jae Seung Paick

Inventor： Hun Han Lee ,  Joong Woong Cho ,  Choul Young Kim ,  Chaul Min Pai ,  Jin Deog Song ,  Chul Min Park ,  Hye Jeong Yoon ,  Yoon Yeo ,  Jae Seung Paick

IPC: A61M37/00 ,  A61F5/41 ,  A61F6/04 ,  A61K9/00 ,  A61K9/70 ,  A61F13/00 ,  A61F6/02

CPC classification number: A61K9/703 ,  A61F5/41 ,  A61F6/04 ,  A61K9/0034 ,  A61K9/7092 ,  Y10S602/901

Abstract: The present invention is to provide a method and a transdermal drug delivery device for treating erectile dysfunction which comprises a patch containing pharmaceutically active ingredient and being directly apply to the male glans penis and its support and the rings for constricting the base part of the penis to aid the erection. The patch according to the present invention may be divided into two types, i.e. a cylinder type patch and a multi-reservoir type patch. The transdermal drug delivery patch device of the present invention is painless and safely to use and may be effectively produced and maintained erection of the penis without the adverse side effects and with a high degree of patient acceptability in the case of male impotence.

Abstract translation: 本发明提供一种用于治疗勃起功能障碍的方法和透皮药物递送装置，其包含含有药物活性成分的补片，并且直接应用于雄性龟头阴茎及其支撑体和用于收缩阴茎基部的环 帮助勃起。 根据本发明的贴片可以分为两种类型，即圆柱型贴片和多储器型贴片。 本发明的透皮药物递送贴片装置是无痛且安全使用的，并且可以有效地产生和维持阴茎的勃起而没有不利的副作用，并且在男性阳the的情况下具有高度的患者可接受性。