CAPACITOR IN SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
    31.
    发明申请
    CAPACITOR IN SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD 审中-公开
    半导体器件中的电容器和制造方法

    公开(公告)号:US20080150079A1

    公开(公告)日:2008-06-26

    申请号:US12044394

    申请日:2008-03-07

    Applicant: Jae Suk Lee

    Inventor: Jae Suk Lee

    Abstract: The capacitor in a semiconductor device includes a substrate, a lower electrode formed over the substrate, a diffusion barrier formed over the lower electrode, a plurality of agglomerates formed over the diffusion barrier, a dielectric layer formed over the surface of the agglomerates to form an uneven surface, and an upper electrode formed over the dielectric layer.

    Abstract translation: 半导体器件中的电容器包括衬底,形成在衬底上的下电极,形成在下电极上的扩散阻挡层,形成在扩散阻挡层上的多个附聚物,形成在附聚物表面上的电介质层,以形成 不平坦的表面和形成在电介质层上的上电极。

    Method for manufacturing semiconductor device
    32.
    发明授权
    Method for manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US07300862B2

    公开(公告)日:2007-11-27

    申请号:US11125602

    申请日:2005-05-09

    Applicant: Jae-Suk Lee

    Inventor: Jae-Suk Lee

    CPC classification number: H01L21/76825 H01L21/76801

    Abstract: High quality dielectric layers may be achieved without introducing excessive impurities when a semiconductor device is manufactured by a method that includes forming a lower wire layer on a structure above a semiconductor substrate, forming a silicon rich oxide layer having a refractive index of 0.45-1.55 on the lower wire layer and the structure, implanting carbon and oxygen (e.g., CO2) into the silicon rich oxide (SRO) layer, and forming an organosilicate glass layer by heat-treating the implanted SRO layer.

    Abstract translation: 当半导体器件通过包括在半导体衬底上的结构上形成下导线层的方法制造半导体器件时,可以实现高质量的电介质层,形成折射率为0.45-1.55的富硅氧化物层在 下层导线层和结构,将碳和氧(例如CO 2)注入富硅氧化物(SRO)层中,并通过热处理植入的SRO层形成有机硅酸盐玻璃层。

    Method of forming pre-metal dielectric layer
    33.
    发明授权
    Method of forming pre-metal dielectric layer 失效
    形成预金属介电层的方法

    公开(公告)号:US07223675B2

    公开(公告)日:2007-05-29

    申请号:US11126900

    申请日:2005-05-10

    Applicant: Jae Suk Lee

    Inventor: Jae Suk Lee

    Abstract: A method of forming a pre-metal dielectric (PMD) layer is disclosed. In the method, after a nitride liner layer is formed on a substrate having a transistor, a USG layer is deposited thereon and then planarized. Next, ion implantation and annealing are performed for gettering, first in a gate region and then in a non-gate region of the USG layer. The USG layer is generally free from plasma damage and has a good gap-fill capability. Further, ion implantation and annealing after deposition of the USG layer may enhance a gap-fill capability, a gettering capability, and electrical properties of a transistor.

    Abstract translation: 公开了一种形成预金属电介质(PMD)层的方法。 在该方法中,在具有晶体管的衬底上形成氮化物衬垫层之后,在其上沉积USG层,然后平坦化。 接下来,首先在栅极区域然后在USG层的非栅极区域中进行离子注入和退火以进行吸杂。 USG层通常没有等离子体损伤,并且具有良好的间隙填充能力。 此外,在沉积USG层之后的离子注入和退火可提高间隙填充能力,吸杂能力和晶体管的电性能。

    Method of manufacturing a semiconductor device

    公开(公告)号:US07074716B2

    公开(公告)日:2006-07-11

    申请号:US11195986

    申请日:2005-08-02

    CPC classification number: H01L21/76816

    Abstract: The present invention relates to a method of manufacturing a semiconductor device which may stably transfer an electrical signal by forming a plurality of via holes and contact holes to an underlying conductive layer. According to the present invention, even though a contact or via is electrically shorted, it is possible to stably transfer the electrical signal through the other contact hole(s) or via hole(s). The present method includes: forming a first conductive line on a semiconductor substrate; forming an insulating layer on the semiconductor substrate and the first conductive line; forming a plurality of via holes by selectively etching the insulating layer in order to expose the first conductive line; forming a metal barrier on top of the insulating layer and in the via holes; and forming a plug by depositing a conductive layer sufficiently to fill the via holes, and then planarizing the conductive layer to coplanarity with the insulating layer.

    Metal interconnection lines of semiconductor devices and methods of forming the same
    35.
    发明申请
    Metal interconnection lines of semiconductor devices and methods of forming the same 有权
    半导体器件的金属互连线及其形成方法

    公开(公告)号:US20050127510A1

    公开(公告)日:2005-06-16

    申请号:US11009723

    申请日:2004-12-10

    Applicant: Jae-Suk Lee

    Inventor: Jae-Suk Lee

    Abstract: Metal interconnection lines of semiconductor devices and methods of forming the same are disclosed. Improved reliability is achieved in a disclosed metal line of a semiconductor device by preventing metal layers from eroding and preventing metal lines from being destroyed due to electro-migration (EM) and stress-migration (SM). An illustrated metal interconnection line includes: a semiconductor substrate; a metal pattern on the substrate; a glue pattern under the metal pattern; an anti-reflection pattern on the metal pattern; and dummy patterns surrounding side walls of the metal pattern.

    Abstract translation: 公开了半导体器件的金属互连线及其形成方法。 通过防止金属层侵蚀并防止金属线由于电迁移(EM)和应力迁移(SM)而被破坏,在半导体器件的公开的金属线中实现了提高的可靠性。 所示的金属互连线包括:半导体衬底; 衬底上的金属图案; 金属图案下的胶水图案; 金属图案上的抗反射图案; 以及围绕金属图案的侧壁的虚拟图案。

    Vinyl-phenyl pyridine monomers and polymers prepared thereform
    36.
    发明授权
    Vinyl-phenyl pyridine monomers and polymers prepared thereform 有权
    乙烯基 - 苯基吡啶单体和由其制备的聚合物

    公开(公告)号:US06660821B2

    公开(公告)日:2003-12-09

    申请号:US10366395

    申请日:2003-02-14

    CPC classification number: C07D213/06 C08F12/32

    Abstract: The present invention relates to vinyl-phenyl monomers and polymers prepared therefrom. More particularly, the present invention is to provide the vinyl-phenyl monomers expressed by formula (1) which are capable of various polymerization such as radical polymerization, cation polymerization, anion polymerization and metallocene catalyzed polymerization due to resonance effect of phenyl group and changing characteristics variously and thus, suitable in the synthesis of general-purpose polymers which can be used in photo-functional materials by forming a complex with a metal component having an optical characteristic.

    Abstract translation: 本发明涉及乙烯基苯基单体和由其制备的聚合物。 更具体地说,本发明提供由式(1)表示的乙烯基苯基单体,它们由于苯基的共振作用和改变的特性而能够进行各种聚合,如自由基聚合,阳离子聚合,阴离子聚合和金属茂催化聚合 因此,适合于通过与具有光学特性的金属组分形成络合物而合成可用于光功能材料的通用聚合物。

    Synthesis of vinylphenylpyridine and living anionic polymerization
    37.
    发明授权
    Synthesis of vinylphenylpyridine and living anionic polymerization 失效
    合成乙烯基苯基吡啶和活性阴离子聚合

    公开(公告)号:US08110642B2

    公开(公告)日:2012-02-07

    申请号:US12227140

    申请日:2007-04-03

    Abstract: Provided are a vinyl-biphenylpyridine monomer and a polymer thereof. More particularly, the present invention provides a vinyl-biphenylpyridine monomer having a side chain of pyridine or phenylpyridine as a functional group, a homopolymer of which molecular weight and molecular weight distribution are controlled using the monomer, and a block copolymer of which molecular structure and molecular weight are controlled to facilitate synthesis of an organic metal complex. Accordingly, the present invention provides a vinyl-biphenylpyridine monomer and a polymer thereof which are effectively used as nano and optical functional materials.

    Abstract translation: 提供了乙烯基 - 联苯基吡啶单体及其聚合物。 更具体地说,本发明提供了具有吡啶或苯基吡啶作为官能团的侧链的乙烯基联苯基吡啶单体,使用该单体控制分子量和分子量分布的均聚物,以及分子结构和 控制分子量以促进有机金属络合物的合成。 因此,本发明提供了有效地用作纳米和光学功能材料的乙烯基 - 联苯基吡啶单体及其聚合物。

    Semiconductor devices and methods for manufacturing the same
    38.
    发明授权
    Semiconductor devices and methods for manufacturing the same 失效
    半导体器件及其制造方法

    公开(公告)号:US07605471B2

    公开(公告)日:2009-10-20

    申请号:US12178577

    申请日:2008-07-23

    Applicant: Jae-Suk Lee

    Inventor: Jae-Suk Lee

    Abstract: Semiconductor devices having a copper line layer and methods for manufacturing the same are disclosed. An illustrated semiconductor device comprises a damascene insulating layer having a contact hole, a barrier metal layer including a first ruthenium layer, a ruthenium oxide layer and a second ruthenium layer, a seed copper layer formed on the barrier metal layer, and a copper line layer made of a Cu—Ag—Au solid solution. A disclosed example method of manufacturing a semiconductor device reduces and/or prevents contact characteristic degradation of the barrier metal layer with the silicon substrate or the damascene insulating layer. In addition, by forming the copper line layer made of the Cu—Ag—Au solid solution, long term device reliability may be improved.

    Abstract translation: 公开了具有铜线层的半导体器件及其制造方法。 所示的半导体器件包括具有接触孔的镶嵌绝缘层,包含第一钌层,氧化钌层和第二钌层的阻挡金属层,形成在阻挡金属层上的种子铜层,以及铜线层 由Cu-Ag-Au固溶体制成。 公开的制造半导体器件的示例性方法减少和/或防止阻挡金属层与硅衬底或镶嵌绝缘层的接触特性劣化。 此外,通过形成由Cu-Ag-Au固溶体制成的铜线层,可以提高长期的器件可靠性。

    SULFONATED POLY(ARYLENE ETHER) HAVING CROSSLINKABLE MOIETY COMBINED IN CHAIN OF POLYMER, SULFONATED POLY(ARYLENE ETHER) HAVING CROSSLINKABLE MOIETIES COMBINED IN POLYMER AND AT POLYMER END GROUP, AND POLYMER ELECTROLYTE MEMBRANE USING SULFONATED POLY(ARYLENE ETHER)
    39.
    发明申请
    SULFONATED POLY(ARYLENE ETHER) HAVING CROSSLINKABLE MOIETY COMBINED IN CHAIN OF POLYMER, SULFONATED POLY(ARYLENE ETHER) HAVING CROSSLINKABLE MOIETIES COMBINED IN POLYMER AND AT POLYMER END GROUP, AND POLYMER ELECTROLYTE MEMBRANE USING SULFONATED POLY(ARYLENE ETHER) 失效
    具有在聚合物和聚合物末端组合的可交联聚合物的聚合物链,聚亚烷基(亚乙基醚)和使用磺化聚合物的聚合物电解质膜(ARYLENE ETHER)组合的可交联聚合物的磺化聚(亚乙基醚)

    公开(公告)号:US20090233146A1

    公开(公告)日:2009-09-17

    申请号:US12246495

    申请日:2008-10-06

    Abstract: A sulfonated poly(arylene ether) copolymer that has a crosslinking structure in a chain of a polymer, a sulfonated poly(arylene ether) copolymer that has a crosslinking structure in and at an end of a chain of a polymer, and a polymer electrolyte film that is formed by using them are disclosed. According to the polycondensation reaction of the sulfonated dihydroxy monomer (HO—SAr1-OH), the none sulfonated dihydroxy monomer (HO—Ar—OH), the crosslinkable dihalide monomer (X—CM-X) and the none sulfonated dihalide monomer (X—Ar—X), the poly(arylene ether) copolymer in which the sulfonic acid is included is synthesized. The formed poly(arylene ether) copolymer has the crosslinkable structure in the chain of the polymer. In addition, by carrying out the polycondensation reaction in respects to the crosslinkable monohydroxy monomer or the crosslinkable monohalide monomer, the crosslinking can be formed at the end of the polymer. Through this, the thermal stability, the mechanical stability, the chemical stability, the film formation ability and the like is the same as or better than those of the Nafion film that is currently commercialized and is used as the polymer electrolyte film, and the proton conductivity and the cell performance are excessively improved. In addition, even though it is exposed to the moisture over a long period of time, since there is no change in the property of the electrolyte film, the dimensional stability is high.

    Abstract translation: 在聚合物链中具有交联结构的磺化聚(亚芳基醚)共聚物,在聚合物链中具有交联结构并在其末端的磺化聚(亚芳基醚)共聚物和聚合物电解质膜 公开了使用它们形成的。 根据磺化二羟基单体(HO-SAr1-OH)的缩聚反应,无磺化二羟基单体(HO-Ar-OH),交联二卤化物单体(X-CM-X)和无磺化二卤化物单体 -Ar-X),其中包含磺酸的聚(亚芳基醚)共聚物被合成。 形成的聚(亚芳基醚)共聚物在聚合物链中具有可交联结构。 此外,通过对可交联单羟基单体或可交联单卤酸酯单体进行缩聚反应,可以在聚合物的末端形成交联。 由此,热稳定性,机械稳定性,化学稳定性,成膜能力等与目前商品化并用作聚合物电解质膜的Nafion膜相同或更好,质子 导电性和电池性能过度改善。 此外,即使长时间暴露于水分,由于电解质膜的性质没有变化,因此尺寸稳定性高。

    Methods for forming a P-type polysilicon layer in a semiconductor device
    40.
    发明授权
    Methods for forming a P-type polysilicon layer in a semiconductor device 有权
    在半导体器件中形成P型多晶硅层的方法

    公开(公告)号:US07485555B2

    公开(公告)日:2009-02-03

    申请号:US11291948

    申请日:2005-12-01

    Applicant: Jae-Suk Lee

    Inventor: Jae-Suk Lee

    CPC classification number: H01L21/02579 H01L21/02532

    Abstract: A P-type polysilicon layer having a stable and desired resistivity is formed by alternately depositing a plurality of silicon atom layers and a plurality of group IIIA element atom layers on a semiconductor substrate by atomic layer deposition, and thereafter forming a P-type polysilicon layer by thermally diffusing the plurality of group IIIA element atom layers into the plurality of silicon atom layers. The plurality of group IIIA element atom layers may comprise Al, Ga, In, and/or Tl.

    Abstract translation: 通过原子层沉积在半导体衬底上交替沉积多个硅原子层和多个IIIA族元素原子层来形成具有稳定和期望电阻率的P型多晶硅层,然后形成P型多晶硅层 通过将多个IIIA族元素原子层热扩散到多个硅原子层中。 多个IIIA族元素原子层可以包括Al,Ga,In和/或Tl。

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