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    Method of utilizing color photoresist to form black matrix and spacers on a control circuit substrate
    31.
    发明授权
    Method of utilizing color photoresist to form black matrix and spacers on a control circuit substrate 有权
    在控制电路基板上利用彩色光致抗蚀剂形成黑矩阵和间隔物的方法

    公开(公告)号：US06749975B2

    公开(公告)日：2004-06-15

    申请号：US10430750

    申请日：2003-05-06

    Applicant: Jia-Shyong Cheng ,  Yu-Fang Wang

    Inventor： Jia-Shyong Cheng ,  Yu-Fang Wang

    IPC: G02B520

    CPC classification number: G02F1/13394 ,  G02F1/136209

    Abstract: A method of utilizing color photoresist to form black matrix and spacers on a control circuit substrate is described. Utilizing the character of the red and the blue photoresist having a non-overlapping transmittance region in the visible light region, a black matrixes consisting of overlapping red and blue photoresist on control devices are used to prevent the photo current occurring in the off state of the control devices. In addition, three different color photoresist plus another-color photoresist are overlapped to form spacers on metal lines.

    Abstract translation: 描述了利用彩色光致抗蚀剂在控制电路基板上形成黑矩阵和间隔物的方法。 利用在可见光区域具有不重叠的透射区域的红色和蓝色光致抗蚀剂的特征，使用由控制装置上的重叠的红色和蓝色光致抗蚀剂组成的黑色矩阵，以防止发生在关闭状态的光电流 控制装置。 另外，三种不同颜色的光致抗蚀剂加上另一种彩色光致抗蚀剂被重叠以在金属线上形成间隔物。

    Method for fabricating a crown-type capacitor of a DRAM cell
    33.
    发明授权
    Method for fabricating a crown-type capacitor of a DRAM cell 失效
    制造DRAM单元的冠型电容器的方法

    公开(公告)号：US5989952A

    公开(公告)日：1999-11-23

    申请号：US934617

    申请日：1997-09-22

    Applicant: Tean-Sen Jen ,  Shiou-Yu Wang ,  Jia-Shyong Cheng ,  Chi-Hui Lin

    Inventor： Tean-Sen Jen ,  Shiou-Yu Wang ,  Jia-Shyong Cheng ,  Chi-Hui Lin

    IPC: C12Q1/48 ,  H01L21/02 ,  H01L21/8242 ,  H01L12/8242

    CPC classification number: H01L28/92 ,  C12Q1/48 ,  H01L27/10852

    Abstract: A method for fabricating a DRAM cell having a crown-type capacitor over a semiconductor substrate is disclosed. The method includes steps of: (a) forming a transistor over the semiconductor substrate; (b) forming an insulating layer over the transistor; (c) selectively etching the insulating layer to form a contact opening; (d) forming a first conducting layer over the insulating layer and filling into the contact opening; (e) forming an etching stop layer and a mask layer over the first conducting layer; (f) pattering the mask layer to form a plurality of openings; (g) forming a dielectric spacer on the sidewall of the mask layer, and removing exposed portions of the etching stop layer; (h) anisotropically etching the mask layer and the first conducting layer by using the dielectric spacer as a mask, to expose, respectively, the etching stop layer and the insulating layer; (i) removing uncovered etching stop layer to expose the first conducting layer; (j) anisotropically etching the first conducting layer to a predetermined depth by using the dielectric spacer as a mask, thereby forming a crown-type storage electrode; (k) removing the dielectric spacer and the etching stop layer; (l) forming a dielectric layer over exposed portions of the storage electrode; and (m) forming a second conducting layer as an opposite electrode over the dielectric layer.

    Abstract translation: 公开了一种在半导体衬底上制造具有冠型电容器的DRAM单元的方法。 该方法包括以下步骤：（a）在半导体衬底上形成晶体管; （b）在所述晶体管上形成绝缘层; （c）选择性地蚀刻绝缘层以形成接触开口; （d）在所述绝缘层上形成第一导电层并填充到所述接触开口中; （e）在所述第一导电层上形成蚀刻停止层和掩​​模层; （f）图案掩模层以形成多个开口; （g）在掩模层的侧壁上形成电介质间隔物，去除蚀刻停止层的暴露部分; （h）通过使用电介质间隔物作为掩模，各向异性地蚀刻掩模层和第一导电层，分别暴露蚀刻停止层和绝缘层; （i）去除未覆盖的蚀刻停止层以暴露第一导电层; （j）通过使用电介质间隔物作为掩模，将第一导电层各向异性蚀刻到预定深度，由此形成冠型存储电极; （k）去除电介质间隔物和蚀刻停止层; （l）在所述存储电极的暴露部分上形成介电层; 和（m）在所述电介质层上形成作为相对电极的第二导电层。

    Dram structure with multiple memory cells sharing the same bit-line contact
    34.
    发明授权
    Dram structure with multiple memory cells sharing the same bit-line contact 失效
    具有多个存储单元共享相同位线触点的Dram结构

    公开(公告)号：US5955757A

    公开(公告)日：1999-09-21

    申请号：US54547

    申请日：1998-04-03

    Applicant: Tean-Sen Jen ,  Shiou-Yu Wang ,  Jia-Shyong Cheng

    Inventor： Tean-Sen Jen ,  Shiou-Yu Wang ,  Jia-Shyong Cheng

    IPC: H01L27/108

    CPC classification number: H01L27/10805 ,  H01L27/10808 ,  Y10S257/904 ,  Y10S257/906

    Abstract: The present invention discloses a DRAM structure with multiple memory cells sharing the same bit-line contact. The DRAM structure of the present invention comprises: a substrate; an active region formed on the substrate, with a center region and a plurality of protrusion regions connecting to the two sides of the center region; a plurality of word-lines, disconnected from each other, each crossing the corresponding protrusion region; a plurality of channel regions, formed where the protrusion region overlaps with the word-lines; a plurality of source regions, formed at the outer areas of the channel regions; a sharing drain region, formed at the center region of the active region; a bit-line contact, formed on surface of the sharing drain region; a bit-line, crossing the center region and electrically connected to the sharing drain region via the bit-line contact; a plurality of capacitors, electrically connected to the source regions; and a plurality of metal lines, electrically connected to the corresponding word-lines.

    Abstract translation: 本发明公开了具有共享相同位线接触的多个存储单元的DRAM结构。 本发明的DRAM结构包括：基板; 形成在所述基板上的有源区域，具有连接到所述中心区域的两侧的中心区域和多个突出区域; 多个字线彼此断开，每个字线与相应的突出区域交叉; 多个通道区域，形成在突起区域与字线重叠的位置上; 多个源区，形成在沟道区的外部区域; 形成在有源区的中心区域的共用漏极区; 形成在共享漏极区域的表面上的位线接触; 位线，穿过中心区域并且经由位线接触电连接到共享漏极区域; 多个电容器，电连接到源极区域; 和多个金属线，电连接到相应的字线。

    LCD having a thin film capacitor with two lower capacitor electrodes and a pixel electrode serving as an upper electrode
    35.
    发明授权
    LCD having a thin film capacitor with two lower capacitor electrodes and a pixel electrode serving as an upper electrode 失效
    LCD具有具有两个下电容电极的薄膜电容器和用作上电极的像素电极

    公开(公告)号：US5657101A

    公开(公告)日：1997-08-12

    申请号：US573309

    申请日：1995-12-15

    Applicant: Jia-Shyong Cheng

    Inventor： Jia-Shyong Cheng

    IPC: G02F1/1335 ,  G02F1/1362 ,  G02F1/136 ,  G02F1/1343 ,  H01L29/04

    CPC classification number: G02F1/136213 ,  G02F1/133512

    Abstract: A thin film liquid crystal display, having a high aperture ratio, is described. Said display has been designed so as to reduce the incidence of short circuits between its various parts.This has been achieved by modifying the structure of the lower electrode of the storage capacitor. Said lower electrode is formed in the shape of a hollow square, two non-adjacent sides of said hollow square being at the level of the gate electrode, the other two sides of the hollow square being at the level of the data line. Two different means for providing electrical contact between all four sides of said lower capacitor electrode are described.A process for manufacturing the display is described.

    Abstract translation: 描述了具有高开口率的薄膜液晶显示器。 所述显示器被设计成减少其各部分之间的短路的发生。 这通过改变存储电容器的下电极的结构来实现。 所述下电极形成为中空正方形的形状，所述中空正方形的两个非相邻侧在栅电极的高度处，空心方形的另外两侧处于数据线的高度。 描述了用于在所述下电容器电极的所有四个侧面之间提供电接触的两种不同的装置。 描述制造显示器的过程。

    Carbon nanotube based keyboard
    36.
    发明授权
    Carbon nanotube based keyboard 有权
    碳纳米管基键盘

    公开(公告)号：US08905659B2

    公开(公告)日：2014-12-09

    申请号：US13196025

    申请日：2011-08-02

    Applicant: Kai-Li Jiang ,  Shou-Shan Fan ,  Jia-Shyong Cheng ,  Liang Liu

    Inventor： Kai-Li Jiang ,  Shou-Shan Fan ,  Jia-Shyong Cheng ,  Liang Liu

    IPC: G06F3/02 ,  G06F3/041 ,  G06F3/045

    CPC classification number: G06F3/0202

    Abstract: A keyboard includes a first substrate, a second substrate, a first electrode layer, and a second electrode layer. The first substrate includes a first upper surface and a first lower surface opposite the first upper surface. The second substrate is positioned apart from the first substrate and includes a second upper surface and a second lower surface. The second upper surface faces the first lower surface. The first electrode layer is positioned on the first lower surface and includes a number of first conductive layers disposed apart from each other and including a carbon nanotube layer structure. The second electrode layer is positioned on the second upper surface and includes a second conductive layer. A number of keys is positioned on the first upper surface or the second lower surface.

    Abstract translation: 键盘包括第一基板，第二基板，第一电极层和第二电极层。 第一基板包括第一上表面和与第一上表面相对的第一下表面。 第二基板定位成与第一基板分离，并且包括第二上表面和第二下表面。 第二上表面面向第一下表面。 第一电极层位于第一下表面上，并且包括彼此分开布置并包括碳纳米管层结构的多个第一导电层。 第二电极层位于第二上表面上并且包括第二导电层。 多个键位于第一上表面或第二下表面上。

    Carbon nanotube based keyboard
    37.
    发明授权
    Carbon nanotube based keyboard 有权
    碳纳米管基键盘

    公开(公告)号：US08899851B2

    公开(公告)日：2014-12-02

    申请号：US13196021

    申请日：2011-08-02

    Applicant: Kai-Li Jiang ,  Shou-Shan Fan ,  Jia-Shyong Cheng ,  Liang Liu

    Inventor： Kai-Li Jiang ,  Shou-Shan Fan ,  Jia-Shyong Cheng ,  Liang Liu

    IPC: G06F3/02 ,  G06F3/041

    CPC classification number: G06F3/0202

    Abstract: A keyboard includes a first substrate, a second substrate, a first electrode layer and a second electrode layer. The first substrate includes a first upper surface and a first lower surface. The second substrate is located apart from the first substrate and includes a second upper surface and a second lower surface. The second upper surface faces the first lower surface. The first electrode layer is located on the first lower surface and includes a first conductive layer including a carbon nanotube layer structure. The second electrode layer is located on the second upper surface and includes a second conductive layer. A number of keys is located on the first upper surface or the second lower surface.

    Abstract translation: 键盘包括第一基板，第二基板，第一电极层和第二电极层。 第一基板包括第一上表面和第一下表面。 第二基板与第一基板分开，并包括第二上表面和第二下表面。 第二上表面面向第一下表面。 第一电极层位于第一下表面上，并且包括具有碳纳米管层结构的第一导电层。 第二电极层位于第二上表面上并且包括第二导电层。 多个键位于第一上表面或第二下表面上。

    Method for making a conductive film/plate exibiting electric anisotropy
    38.
    发明授权
    Method for making a conductive film/plate exibiting electric anisotropy 有权
    制造导电膜/板的方法，提高电各向异性

    公开(公告)号：US08646175B2

    公开(公告)日：2014-02-11

    申请号：US12826582

    申请日：2010-06-29

    Applicant: Jeah-Sheng Wu ,  Jia-Shyong Cheng ,  Chih-Han Chao

    Inventor： Jeah-Sheng Wu ,  Jia-Shyong Cheng ,  Chih-Han Chao

    IPC: H05K3/02 ,  H05K3/10

    CPC classification number: H05K1/0296 ,  B82Y99/00 ,  H01B1/04 ,  Y10S977/832 ,  Y10T29/49126 ,  Y10T29/49155

    Abstract: A method for making a conductive film exhibiting electric anisotropy comprises forming a nanomaterial on a substrate, the nanomaterial having a cluster of interconnected nanounits, each of which being substantially transverse to the substrate and having one end bonded to the substrate. The method further includes stretching the nanounits along a first direction to remove the nanomaterial from the substrate so as to form a conductive film having strings of interconnected nanounits, where the nanounits of the strings substantially extend in the first direction. A conductive plate and a method for making the same is also disclosed, where the method further comprises attaching the conductive film to a second substrate.

    Abstract translation: 制造具有电各向异性的导电膜的方法包括在衬底上形成纳米材料，所述纳米材料具有互连的纳米单元簇，每个纳米单元基本上横向于衬底并且具有一个端部结合到衬底。 该方法还包括沿着第一方向拉伸纳米单元以从衬底去除纳米材料，以便形成具有相互连接的纳米单元串的导电膜，其中串的纳米单元基本上沿第一方向延伸。 还公开了导电板及其制造方法，其中所述方法还包括将导电膜附着到第二基板。

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