公开(公告)号：US20140176367A1

公开(公告)日：2014-06-26

申请号：US13725773

申请日：2012-12-21

申请人： Sasikanth Manipatruni ,  Kelin J. Kuhn ,  Debendra Mallik ,  John C. Johnson

发明人： Sasikanth Manipatruni ,  Kelin J. Kuhn ,  Debendra Mallik ,  John C. Johnson

IPC分类号： H01Q3/34

CPC分类号： G10K11/346 ,  A41D2400/00 ,  H04R1/403 ,  H04R1/406 ,  H04R2201/023 ,  H04R2201/401 ,  H04R2499/11 ,  H04R2499/15

摘要： A system includes a processor and a phased array, coupled to the processor, having an arrayed waveguide for acoustic waves to enable directional sound communication.

摘要翻译： 系统包括耦合到处理器的处理器和相控阵列，其具有用于声波的阵列波导以实现定向声音通信。

公开(公告)号：US20140153720A1

公开(公告)日：2014-06-05

申请号：US13705720

申请日：2012-12-05

申请人： Christopher J. Jezewski ,  Kelin J. Kuhn ,  Marko Radosavljevic

发明人： Christopher J. Jezewski ,  Kelin J. Kuhn ,  Marko Radosavljevic

IPC分类号： H04L9/08

CPC分类号： H04L9/0852

摘要： Described herein are techniques related to implementation of a quantum key distribution (QKD) scheme by a photonic integrated circuit (PIC). For example, the PIC is a component in a wireless device that is used for quantum communications in a quantum communications system.

摘要翻译： 这里描述的是与通过光子集成电路（PIC）实现量子密钥分配（QKD）方案有关的技术。 例如，PIC是用于量子通信系统中的量子通信的无线设备中的组件。

公开(公告)号：US20140001560A1

公开(公告)日：2014-01-02

申请号：US13538822

申请日：2012-06-29

申请人： Annalisa Cappellani ,  Kelin J. Kuhn ,  Rafael Rios ,  Harry Gomez

发明人： Annalisa Cappellani ,  Kelin J. Kuhn ,  Rafael Rios ,  Harry Gomez

IPC分类号： H01L27/088 ,  H01L21/76

CPC分类号： H01L21/76237 ,  H01L21/76232 ,  H01L27/088 ,  H01L27/1207 ,  H01L29/0638 ,  H01L29/0653 ,  H01L29/7851

摘要： Isolated and bulk semiconductor devices formed on a same bulk substrate and methods to form such devices are described. For example, a semiconductor structure includes a first semiconductor device having a first semiconductor body disposed on a bulk substrate. The first semiconductor body has an uppermost surface with a first horizontal plane. The semiconductor structure also includes a second semiconductor device having a second semiconductor body disposed on an isolation pedestal. The isolation pedestal is disposed on the bulk substrate. The second semiconductor body has an uppermost surface with a second horizontal plane. The first and second horizontal planes are co-planar.

摘要翻译： 描述了形成在相同体积基板上的隔离和体半导体器件以及形成这种器件的方法。 例如，半导体结构包括具有设置在体基板上的第一半导体本体的第一半导体器件。 第一半导体本体具有带有第一水平面的最上表面。 半导体结构还包括具有设置在隔离基座上的第二半导体本体的第二半导体器件。 隔离基座设置在主体基板上。 第二半导体本体具有带有第二水平面的最上表面。 第一和第二水平面是共面的。

公开(公告)号：US20120299069A1

公开(公告)日：2012-11-29

申请号：US13569150

申请日：2012-08-07

申请人： Kelin J. Kuhn ,  Kaizad Mistry ,  Mark Bohr ,  Chris Auth

发明人： Kelin J. Kuhn ,  Kaizad Mistry ,  Mark Bohr ,  Chris Auth

IPC分类号： H01L23/48 ,  H01L29/78

CPC分类号： H01L29/41725 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76874 ,  H01L23/485 ,  H01L23/5226 ,  H01L29/456 ,  H01L29/66477 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of fabricating a first contact to a semiconductor device, which fundamentally comprises providing a semiconductor device formed on a substrate. The substrate further includes a conductive surface. A dielectric layer is formed over the substrate and has an opening exposing the conductive surface. The opening extends an entire length of the semiconductor device, partway down the entire length of the device, extending from the device onto adjacent field of the device, or and a combination thereof. A barrier layer is formed within the opening. A copper containing material fills the opening to form a first contact to the semiconductor device.

摘要翻译： 制造半导体器件的第一接触的方法，其基本上包括提供形成在衬底上的半导体器件。 基板还包括导电表面。 介电层形成在衬底上并具有暴露导电表面的开口。 开口延伸半导体器件的整个长度，从设备的整个长度的一部分延伸到器件的相邻的场上，或其组合。 在开口内形成阻挡层。 含铜材料填充开口以形成与半导体器件的第一接触。

公开(公告)号：US08258057B2

公开(公告)日：2012-09-04

申请号：US11396201

申请日：2006-05-23

申请人： Kelin J. Kuhn ,  Kaizad Mistry ,  Mark Bohr ,  Chris Auth

发明人： Kelin J. Kuhn ,  Kaizad Mistry ,  Mark Bohr ,  Chris Auth

IPC分类号： H01L21/4763

CPC分类号： H01L29/41725 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76874 ,  H01L23/485 ,  H01L23/5226 ,  H01L29/456 ,  H01L29/66477 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of fabricating a first contact to a semiconductor device, which fundamentally comprises providing a semiconductor device formed on a substrate. The substrate further includes a conductive surface. A dielectric layer is formed over the substrate and has an opening exposing the conductive surface. The opening extends an entire length of the semiconductor device, partway down the entire length of the device, extending from the device onto adjacent field of the device, or and a combination thereof. A barrier layer is formed within the opening. A copper containing material fills the opening to form a first contact to the semiconductor device.

摘要翻译： 制造半导体器件的第一接触的方法，其基本上包括提供形成在衬底上的半导体器件。 基板还包括导电表面。 介电层形成在衬底上并具有暴露导电表面的开口。 开口延伸半导体器件的整个长度，从设备的整个长度的一部分延伸到器件的相邻的场上，或其组合。 在开口内形成阻挡层。 含铜材料填充开口以形成与半导体器件的第一接触。

公开(公告)号：US06627506B2

公开(公告)日：2003-09-30

申请号：US09908277

申请日：2001-07-18

申请人： Kelin J. Kuhn ,  Ian R. Post

发明人： Kelin J. Kuhn ,  Ian R. Post

IPC分类号： H01L21331

CPC分类号： H01L21/3144 ,  H01L21/76232

摘要： The present invention relates to a method of forming an isolation trench that comprises forming a recess in a substrate and forming a film upon the sidewall under conditions that cause the film to have a tensile load. The method includes filling the recess with a material that imparts a compressive load upon the film under conditions that oppose the tensile load. The present invention is particularly well suited for shallow isolation trench filling in the 0.13 micron geometry range, and smaller.

公开(公告)号：US09608059B2

公开(公告)日：2017-03-28

申请号：US13995418

申请日：2011-12-20

申请人： Annalisa Cappellani ,  Stephen M. Cea ,  Tahir Ghani ,  Harry Gomez ,  Jack T. Kavalieros ,  Patrick H. Keys ,  Seiyon Kim ,  Kelin J. Kuhn ,  Aaron D. Lilak ,  Rafael Rios ,  Mayank Sahni

发明人： Annalisa Cappellani ,  Stephen M. Cea ,  Tahir Ghani ,  Harry Gomez ,  Jack T. Kavalieros ,  Patrick H. Keys ,  Seiyon Kim ,  Kelin J. Kuhn ,  Aaron D. Lilak ,  Rafael Rios ,  Mayank Sahni

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762 ,  H01L29/775 ,  H01L27/12 ,  B82Y10/00

CPC分类号： H01L29/66818 ,  B82Y10/00 ,  H01L21/762 ,  H01L21/76216 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785

摘要： Semiconductor devices with isolated body portions are described. For example, a semiconductor structure includes a semiconductor body disposed above a semiconductor substrate. The semiconductor body includes a channel region and a pair of source and drain regions on either side of the channel region. An isolation pedestal is disposed between the semiconductor body and the semiconductor substrate. A gate electrode stack at least partially surrounds a portion of the channel region of the semiconductor body.

公开(公告)号：US09583602B2

公开(公告)日：2017-02-28

申请号：US15209552

申请日：2016-07-13

申请人： Roza Kotlyar ,  Stephen M. Cea ,  Gilbert Dewey ,  Benjamin Chu-Kung ,  Uygar E. Avci ,  Rafael Rios ,  Anurag Chaudhry ,  Thomas D. Linton, Jr. ,  Ian A. Young ,  Kelin J. Kuhn

发明人： Roza Kotlyar ,  Stephen M. Cea ,  Gilbert Dewey ,  Benjamin Chu-Kung ,  Uygar E. Avci ,  Rafael Rios ,  Anurag Chaudhry ,  Thomas D. Linton, Jr. ,  Ian A. Young ,  Kelin J. Kuhn

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/739 ,  H01L29/16 ,  H01L29/161 ,  H01L29/06 ,  H01L29/24 ,  H01L29/267 ,  H01L27/092 ,  H01L29/04 ,  H01L29/10 ,  H01L29/165 ,  H01L29/20 ,  H01L29/423 ,  H01L29/786

CPC分类号： H01L29/66977 ,  H01L27/092 ,  H01L29/045 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/20 ,  H01L29/24 ,  H01L29/267 ,  H01L29/42392 ,  H01L29/7391 ,  H01L29/7842 ,  H01L29/785 ,  H01L29/78603 ,  H01L29/78642 ,  H01L29/78684 ,  H01L29/78696

摘要： Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs are described. For example, a tunneling field effect transistor (TFET) includes a homojunction active region disposed above a substrate. The homojunction active region includes a relaxed Ge or GeSn body having an undoped channel region therein. The homojunction active region also includes doped source and drain regions disposed in the relaxed Ge or GeSn body, on either side of the channel region. The TFET also includes a gate stack disposed on the channel region, between the source and drain regions. The gate stack includes a gate dielectric portion and gate electrode portion.

摘要翻译： 描述了用于CMOS架构的隧道场效应晶体管（TFET）和制造N型和P型TFET的方法。 例如，隧道场效应晶体管（TFET）包括设置在衬底上方的均质有源区。 同质结有源区包括其中具有未掺杂沟道区的松弛Ge或GeSn体。 同质结有源区还包括设置在放大的Ge或GeSn体中，在沟道区两侧的掺杂源极和漏极区。 TFET还包括设置在沟道区域之间的源极和漏极区域之间的栅极堆叠。 栅极堆叠包括栅极电介质部分和栅极电极部分。

公开(公告)号：US09559160B2

公开(公告)日：2017-01-31

申请号：US13996506

申请日：2011-12-23

申请人： Annalisa Cappellani ,  Peter G. Tolchinsky ,  Kelin J. Kuhn ,  Glenn A. Glass ,  Van H. Le

发明人： Annalisa Cappellani ,  Peter G. Tolchinsky ,  Kelin J. Kuhn ,  Glenn A. Glass ,  Van H. Le

IPC分类号： H01L29/04 ,  H01L29/66 ,  H01L29/775 ,  H01L27/12 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/06 ,  H01L21/8238 ,  H01L27/092

CPC分类号： H01L29/045 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/823821 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78687 ,  H01L29/78696

摘要： Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or composition and methods to form such common-substrate devices are described. For example, a semiconductor structure includes a first semiconductor device having a first nanowire or semiconductor body disposed above a crystalline substrate. The first nanowire or semiconductor body is composed of a semiconductor material having a first global crystal orientation. The semiconductor structure also includes a second semiconductor device having a second nanowire or semiconductor body disposed above the crystalline substrate. The second nanowire or semiconductor body is composed of a semiconductor material having a second global crystal orientation different from the first global orientation. The second nanowire or semiconductor body is isolated from the crystalline substrate by an isolation pedestal disposed between the second nanowire or semiconductor body and the crystalline substrate.

摘要翻译： 描述具有不同材料取向或组成的纳米线或半导体主体的共基板半导体器件以及形成这种共基板器件的方法。 例如，半导体结构包括具有设置在结晶衬底之上的第一纳米线或半导体本体的第一半导体器件。 第一纳米线或半导体主体由具有第一全局晶体取向的半导体材料组成。 半导体结构还包括具有设置在晶体衬底上方的第二纳米线或半导体本体的第二半导体器件。 第二纳米线或半导体本体由具有与第一全局取向不同的第二全局晶体取向的半导体材料组成。 通过设置在第二纳米线或半导体本体与晶体衬底之间的隔离基座，将第二纳米线或半导体本体与晶体衬底隔离。

公开(公告)号：US20160322480A1

公开(公告)日：2016-11-03

申请号：US15209552

申请日：2016-07-13

申请人： Roza Kotlyar ,  Stephen M. Cea ,  Gilbert Dewey ,  Benjamin Chu-Kung ,  Uygar E. Avci ,  Rafael Rios ,  Anurag Chaudhry ,  Thomas D. Linton, JR. ,  Ian A. Young ,  Kelin J. Kuhn

发明人： Roza Kotlyar ,  Stephen M. Cea ,  Gilbert Dewey ,  Benjamin Chu-Kung ,  Uygar E. Avci ,  Rafael Rios ,  Anurag Chaudhry ,  Thomas D. Linton, JR. ,  Ian A. Young ,  Kelin J. Kuhn

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/165 ,  H01L27/092 ,  H01L29/161 ,  H01L29/10 ,  H01L29/20 ,  H01L29/04 ,  H01L29/786 ,  H01L29/423

CPC分类号： H01L29/66977 ,  H01L27/092 ,  H01L29/045 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/20 ,  H01L29/24 ,  H01L29/267 ,  H01L29/42392 ,  H01L29/7391 ,  H01L29/7842 ,  H01L29/785 ,  H01L29/78603 ,  H01L29/78642 ,  H01L29/78684 ,  H01L29/78696

摘要： Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs are described. For example, a tunneling field effect transistor (TFET) includes a homojunction active region disposed above a substrate. The homojunction active region includes a relaxed Ge or GeSn body having an undoped channel region therein. The homojunction active region also includes doped source and drain regions disposed in the relaxed Ge or GeSn body, on either side of the channel region. The TFET also includes a gate stack disposed on the channel region, between the source and drain regions. The gate stack includes a gate dielectric portion and gate electrode portion.