公开(公告)号：US5167547A

公开(公告)日：1992-12-01

申请号：US753201

申请日：1991-08-30

申请人： Noboru Kobayashi ,  Yoshiyuki Kaneko

发明人： Noboru Kobayashi ,  Yoshiyuki Kaneko

IPC分类号： B63H25/10 ,  B63H11/08 ,  B63H11/10 ,  B63H11/107 ,  B63H11/117 ,  B63H25/46

CPC分类号： B63H11/117

摘要： Several embodiments of jet propelled watercraft including steering rudders pivotally supported by the steering nozzle of the jet propulsion unit for providing a steering affect at low speeds and when coasting. The steering rudder is selectively moveable between its steering position and non-steering position so as to permit unincumbered high speed operation. An arrangement is incorporated that permits the rudder to pivot automatically from its steering position to an out of the way position when an underwater obstacle is struck.

摘要翻译： 喷射推进船只的几个实施例包括由喷射推进单元的转向喷嘴枢转地支撑的转向舵，用于在低速时和当滑行时提供转向影响。 转向舵可在其转向位置和非转向位置之间选择性地移动，以允许无阻碍的高速操作。 结合了一种装置，当水下障碍物被撞击时，该装置允许方向舵从其转向位置自动枢转到通路位置。

公开(公告)号：US4990981A

公开(公告)日：1991-02-05

申请号：US296811

申请日：1989-01-13

申请人： Yasuo Tanaka ,  Haruo Matsumaru ,  Hideaki Yamamoto ,  Toshihisa Tsukada ,  Ken Tsutsui ,  Yoshiyuki Kaneko

发明人： Yasuo Tanaka ,  Haruo Matsumaru ,  Hideaki Yamamoto ,  Toshihisa Tsukada ,  Ken Tsutsui ,  Yoshiyuki Kaneko

IPC分类号： G02F1/136 ,  G02F1/1368 ,  H01L29/786

CPC分类号： G02F1/1368 ,  H01L29/78633 ,  H01L29/78669

摘要： A thin film transistor is disclosed, which comprises a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode, and a drain electrode, which are disposed on a predetermined substrate, and which is so constructed that the semiconductor layer doesn't exist in any regions, to which strong electric field parallel to said substrate is applied. Besides this thin film transistor a liquid crystal display device using it is disclosed. The thin film transistor according to the present invention has a small increase in the off level current due to photo-current and it is suitable for driving pixels in the liquid crystal display device.

摘要翻译： 公开了一种薄膜晶体管，其包括设置在预定衬底上的栅电极，栅极绝缘层，半导体层，源电极和漏电极，并且其构造使得半导体层不是“ 存在于与所述基板平行的强电场的任何区域中。 除此之外，还公开了使用该薄膜晶体管的液晶显示装置。 根据本发明的薄膜晶体管由于光电流而导致的关断电平的增加很小，并且适用于驱动液晶显示装置中的像素。

公开(公告)号：US4955697A

公开(公告)日：1990-09-11

申请号：US183141

申请日：1988-04-19

申请人： Toshihisa Tsukada ,  Yoshiyuki Kaneko ,  Akira Sasano

发明人： Toshihisa Tsukada ,  Yoshiyuki Kaneko ,  Akira Sasano

IPC分类号： G02F1/1362 ,  G09G3/36

CPC分类号： G02F1/136213 ,  G09G3/3648 ,  G09G3/3659 ,  G09G2300/043 ,  G09G2320/0204 ,  G09G2320/0219 ,  G09G2320/0247

摘要： A liquid crystal display panel and a method of driving the display panel are disclosed. The display panel and the driving method can reduce the leakage of a gate driving voltage to a first pixel electrode due to the parasitic capacitance of a thin film transistor, and can lessen an adverse effect of noise which is generated at a second pixel electrode by cancelling out the capacitive coupling to the first pixel electrode, on an image displayed by the display panel.

公开(公告)号：US4864340A

公开(公告)日：1989-09-05

申请号：US130178

申请日：1987-12-08

申请人： Yoshiyuki Kaneko

发明人： Yoshiyuki Kaneko

IPC分类号： G03B17/38

CPC分类号： G03B17/38

摘要： A remote control device has a transmitter provided with a transmission circuit for producing a remote control signal, a first capacitor of small capacity upon discharging to drive the transmission circuit, a second capacitor of large capacity upon discharging to charge the first capacitor, and a pair of terminals for charging the second capacitor from the outside of the transmitter.

摘要翻译： 遥控装置具有发射器，其具有用于产生遥控信号的发送电路，放电时驱动发送电路的小容量的第一电容器，放电后的第一电容器的大容量的第二电容器以及一对 用于从发射机的外部对第二电容器充电的端子。

公开(公告)号：US08040064B2

公开(公告)日：2011-10-18

申请号：US12738076

申请日：2008-02-19

申请人： Yasuhito Yamaryo ,  Yoshiyuki Kaneko ,  Hiroyuki Tachihara ,  Takahiro Ueno ,  Takashi Kawasaki ,  Atsuo Ohtomi

发明人： Yasuhito Yamaryo ,  Yoshiyuki Kaneko ,  Hiroyuki Tachihara ,  Takahiro Ueno ,  Takashi Kawasaki ,  Atsuo Ohtomi

IPC分类号： H01J1/62

CPC分类号： H01J11/40 ,  H01J9/02 ,  H01J11/12

摘要： It is an object of the present invention to provide a plasma display panel with an improved panel structure for improving a discharge time-lag and, more particularly, to provide a plasma display panel with a new protective film structure, the plasma display panel having uniformed panel properties suitable for mass production with a high yield.A PDP of the present invention which provides a pair of substrate assemblies opposed to each other sandwiching discharge spaces formed to seal a discharge gas therein, wherein one of the pair of substrate assemblies comprises: display electrodes arranged on a substrate; a dielectric layer for covering the display electrodes; and a protective layer for covering the dielectric layer, the protective layer is configured so that a plurality of MgO single crystals are adhered to an MgO film in such a manner that crystal orientations of the plurality of MgO single crystals are aligned in one direction, and a value which is three times of a standard deviation of coverage factors of the MgO single crystals on the MgO film, divided by a mean value of the coverage factors is 20% or less.

摘要翻译： 本发明的目的是提供一种具有改进的面板结构的等离子体显示面板，用于改善放电时间延迟，更具体地说，提供具有新的保护膜结构的等离子体显示面板，等离子体显示面板具有均匀的 面板适用于大批量生产，产量高。 本发明的PDP提供了一对相对的夹持放电空间的衬底组件，用于将放电气体密封在其中，其中一对衬底组件中的一个包括：布置在衬底上的显示电极; 用于覆盖所述显示电极的介电层; 以及用于覆盖电介质层的保护层，保护层被构造成使得多个MgO单晶以使得多个MgO单晶的晶体取向沿一个方向排列的方式粘附到MgO膜上，并且 MgO膜上的MgO单晶的覆盖系数的标准偏差的三倍除以覆盖系数的平均值的值为20％以下。

公开(公告)号：US08017464B2

公开(公告)日：2011-09-13

申请号：US12558498

申请日：2009-09-12

申请人： Masao Sugiyama ,  Yoshiyuki Kaneko ,  Yoshinori Kondo ,  Masayoshi Hirasawa

发明人： Masao Sugiyama ,  Yoshiyuki Kaneko ,  Yoshinori Kondo ,  Masayoshi Hirasawa

IPC分类号： H01L21/336 ,  H01L21/8234

CPC分类号： H01L21/28518 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/31612 ,  H01L21/76801 ,  H01L21/76819 ,  H01L23/485 ,  H01L23/53257 ,  H01L2924/0002 ,  H01L2924/00

摘要： As a method for constituting a pre-metal interlayer insulating film, such method is considered as forming a CVD silicon oxide-based insulating film having good filling properties of a silicon oxide film by ozone TEOS, reflowing the film at high temperatures to planarize it, then stacking a silicon oxide film having good CMP scratch resistance by plasma TEOS, and, further, planarizing it by CMP. However, it was made clear that, in a process for forming a contact hole, crack in the pre-metal interlayer insulating film is exposed in the contact hole, into which barrier metal intrudes to cause short-circuit defects.In the present invention, in the pre-metal process, after forming the ozone TEOS film over an etch stop film, the ozone TEOS film is once etched back so as to expose the etch stop film over a gate structure, and, after that, a plasma TEOS film is formed over the remaining ozone TEOS film, and then the plasma TEOS film is planarized by CMP.

摘要翻译： 作为构成前金属层间绝缘膜的方法，认为通过臭氧TEOS形成氧化硅膜的填充性良好的CVD硅氧化物类绝缘膜，在高温下回流以使其平坦化， 然后通过等离子体TEOS层叠具有良好CMP耐刮擦性的氧化硅膜，并且进一步通过CMP对其进行平坦化。 但是，在形成接触孔的工序中，在金属间绝缘膜的裂纹暴露在接触孔内，阻挡金属侵入其中而引起短路缺陷。 在本发明中，在预金属工艺中，在蚀刻停止膜上形成臭氧TEOS膜之后，臭氧TEOS膜被一次回蚀刻，以便在栅极结构上暴露蚀刻停止膜，之后， 在剩余的臭氧TEOS膜上形成等离子体TEOS膜，然后通过CMP平坦化等离子体TEOS膜。

公开(公告)号：US20100213839A1

公开(公告)日：2010-08-26

申请号：US12672572

申请日：2007-08-10

申请人： Yasuhito Yamaryo ,  Yoshiyuki Kaneko ,  Takahiko Ueno ,  Hiroyuki Tachihara ,  Atsuo Ohtomi

发明人： Yasuhito Yamaryo ,  Yoshiyuki Kaneko ,  Takahiko Ueno ,  Hiroyuki Tachihara ,  Atsuo Ohtomi

IPC分类号： H01J17/49

CPC分类号： H01J11/40 ,  H01J11/12

摘要： To provide a plasma display panel of improving a discharge time-lag.A plasma display panel of the present invention is characterized in that it comprises a pair of substrate assemblies opposed to each other sandwiching discharge spaces formed to seal a discharge gas therein, wherein one of the pair of substrate assemblies comprises: display electrodes arranged on a substrate; a dielectric layer for covering the display electrodes; and a protective layer for covering the dielectric layer, and the protective layer is configured so that a plurality of MgO single crystals are adhered to an MgO film in such a manner that crystal orientations of the plurality of MgO single crystals are aligned in one direction.

摘要翻译： 提供一种提高放电时间延迟的等离子体显示面板。 本发明的等离子体显示面板的特征在于，它包括一对基板组件，彼此相对的夹持放电空间被形成以将放电气体密封在其中，其中一对基板组件中的一个包括：布置在基板上的显示电极 ; 用于覆盖所述显示电极的介电层; 以及用于覆盖电介质层的保护层，并且保护层被构造成使得多个MgO单晶以使得多个MgO单晶的晶体取向沿一个方向排列的方式粘附到MgO膜。

公开(公告)号：US20100078690A1

公开(公告)日：2010-04-01

申请号：US12558498

申请日：2009-09-12

申请人： Masao SUGIYAMA ,  Yoshiyuki KANEKO ,  Yoshinori KONDO ,  Masayoshi HIRASAWA

发明人： Masao SUGIYAMA ,  Yoshiyuki KANEKO ,  Yoshinori KONDO ,  Masayoshi HIRASAWA

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L21/768 ,  H01L23/48

CPC分类号： H01L21/28518 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/31612 ,  H01L21/76801 ,  H01L21/76819 ,  H01L23/485 ,  H01L23/53257 ,  H01L2924/0002 ,  H01L2924/00

摘要： As a method for constituting a pre-metal interlayer insulating film, such method is considered as forming a CVD silicon oxide-based insulating film having good filling properties of a silicon oxide film by ozone TEOS, reflowing the film at high temperatures to planarize it, then stacking a silicon oxide film having good CMP scratch resistance by plasma TEOS, and, further, planarizing it by CMP. However, it was made clear that, in a process for forming a contact hole, crack in the pre-metal interlayer insulating film is exposed in the contact hole, into which barrier metal intrudes to cause short-circuit defects.In the present invention, in the pre-metal process, after forming the ozone TEOS film over an etch stop film, the ozone TEOS film is once etched back so as to expose the etch stop film over a gate structure, and, after that, a plasma TEOS film is formed over the remaining ozone TEOS film, and then the plasma TEOS film is planarized by CMP.

摘要翻译： 作为构成前金属层间绝缘膜的方法，认为通过臭氧TEOS形成氧化硅膜的填充性良好的CVD硅氧化物类绝缘膜，在高温下回流以使其平坦化， 然后通过等离子体TEOS层叠具有良好CMP耐刮擦性的氧化硅膜，并且进一步通过CMP对其进行平坦化。 但是，在形成接触孔的工序中，在金属间绝缘膜的裂纹暴露在接触孔内，阻挡金属侵入其中而引起短路缺陷。 在本发明中，在预金属工艺中，在蚀刻停止膜上形成臭氧TEOS膜之后，臭氧TEOS膜被一次回蚀刻，以便在栅极结构上暴露蚀刻停止膜，之后， 在剩余的臭氧TEOS膜上形成等离子体TEOS膜，然后通过CMP平坦化等离子体TEOS膜。

公开(公告)号：US20090179247A1

公开(公告)日：2009-07-16

申请号：US12354254

申请日：2009-01-15

申请人： Masako FUJII ,  Shigeki Obayashi ,  Naozumi Morino ,  Atsushi Hiraiwa ,  Shinichi Watarai ,  Takeshi Yoshida ,  Kazutoshi Oku ,  Masao Sugiyama ,  Yoshinori Kondo ,  Yuichi Egawa ,  Yoshiyuki Kaneko

发明人： Masako FUJII ,  Shigeki Obayashi ,  Naozumi Morino ,  Atsushi Hiraiwa ,  Shinichi Watarai ,  Takeshi Yoshida ,  Kazutoshi Oku ,  Masao Sugiyama ,  Yoshinori Kondo ,  Yuichi Egawa ,  Yoshiyuki Kaneko

IPC分类号： H01L27/06 ,  H01L29/78

CPC分类号： H01L21/823892 ,  H01L27/092

摘要： A technique which can improve manufacturing yield and product reliability is provided in a semiconductor device having a triple well structure. An inverter circuit which includes an n-channel type field effect transistor formed in a shallow p-type well and a p-channel type field effect transistor formed in a shallow n-type well, and does not contribute to circuit operations is provided in a deep n-type well formed in a p-type substrate; the shallow p-type well is connected to the substrate using a wiring of a first layer; and the gate electrode of the p-channel type field effect transistor and the gate electrode of the n-channel type field effect transistor are connected to the shallow n-type well using a wiring of an uppermost layer.

摘要翻译： 在具有三重阱结构的半导体器件中提供了可以提高制造成品率和产品可靠性的技术。 形成在浅p型阱中的n沟道型场效应晶体管和形成在浅n型阱中的p沟道型场效应晶体管并且对电路操作无贡献的逆变器电路设置在 在p型衬底中形成深n型阱; 使用第一层的布线将浅的p型阱连接到基板; 并且p沟道型场效应晶体管的栅电极和n沟道型场效应晶体管的栅电极使用最上层的布线连接到浅n型阱。

公开(公告)号：US20090153449A1

公开(公告)日：2009-06-18

申请号：US12359455

申请日：2009-01-26

申请人： Yoshiyuki Kaneko ,  Sukekazu Aratani

发明人： Yoshiyuki Kaneko ,  Sukekazu Aratani

IPC分类号： G09G3/32

CPC分类号： G09G3/3233 ,  G09G2300/0439 ,  G09G2300/0814 ,  G09G2300/0842 ,  G09G2300/0866 ,  G09G2310/0254 ,  G09G2310/0256 ,  G09G2310/061 ,  G09G2320/0261 ,  G09G2320/043 ,  G09G2320/10 ,  H01L27/3244 ,  Y10T82/16672

摘要： A display device including: a display portion with gate lines to which scanning signals are fed, a plurality of data lines to which picture image signals are fed, wherein the gate lines and data lines are crossed with each other in a matrix shape, TFTs and OLED elements disposed in regions surrounded by the gate lines and data lines; a scanning line driving circuit which feeds the scanning signals for the gate lines; a data line driving circuit which feeds the picture image signals for the data lines; a display control controller which provides timing control signals to the scanning line driving circuit and the data line driving circuit and further provides the picture image signals to the data line driving circuit; a timing regulation circuit which regulates the timing (clock frequency) of the timing control signals; and a picture image memory which stores the picture image signals.

摘要翻译： 一种显示装置，包括：具有扫描信号被馈送的栅极线的显示部分，馈送图像信号的多条数据线，其中栅极线和数据线以矩阵形状彼此交叉，TFT和 设置在由栅极线和数据线包围的区域中的OLED元件; 扫描线驱动电路，用于馈送用于栅极线的扫描信号; 数据线驱动电路，用于馈送数据线的图像信号; 显示控制控制器，其向扫描线驱动电路和数据线驱动电路提供定时控制信号，并且还将图像信号提供给数据线驱动电路; 定时调节电路，其调节定时控制信号的定时（时钟频率）; 以及存储图像图像信号的图像存储器。