公开(公告)号：US10700029B2

公开(公告)日：2020-06-30

申请号：US16171337

申请日：2018-10-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/00 ,  H01L23/532 ,  H01L21/768 ,  H01L21/48 ,  H01L23/13

Abstract: A semiconductor package device includes a first conductive structure, a second conductive structure and a dielectric layer. The first conductive structure has a tapered portion. The second conductive structure surrounds the tapered portion of the first conductive structure and is in direct contact with a side wall of the tapered portion of the first conductive structure. The dielectric layer surrounds the tapered portion of the first conductive structure and is in direct contact with the side wall of the tapered portion of the first conductive structure.

公开(公告)号：US10658306B2

公开(公告)日：2020-05-19

申请号：US15791979

申请日：2017-10-24

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10 ,  H01L21/48 ,  H01L21/54 ,  H01L21/56 ,  H01L25/00 ,  H01L23/16 ,  H01L23/31 ,  H01L23/13 ,  H01L23/18 ,  H01L25/065 ,  H01L25/03

Abstract: Various embodiments relate to a semiconductor package structure. The semiconductor package structure includes a first chip having a first surface and a second surface opposite the first surface. The semiconductor package structure further includes a supporter surrounding an edge of the first chip, and the supporter includes a recessed portion. The semiconductor package structure further includes a conductive layer disposed over the first surface of the first chip and electrically connected to the first chip. The semiconductor package structure further includes an insulation layer disposed over the first surface of the first chip. The semiconductor package structure further includes an encapsulant between the first chip and the supporter and surrounding at least the edge of the first chip.

公开(公告)号：US20200058579A1

公开(公告)日：2020-02-20

申请号：US15998409

申请日：2018-08-15

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/538 ,  H01L21/48

Abstract: A semiconductor device package includes an interposer and a semiconductor device. The interposer has a sidewall defining a space. The semiconductor device is disposed within the space and in contact with the sidewall. An interposer includes a first surface, a second surface and a third surface. The first surface has a first crystal orientation. The second surface is opposite the first surface and has the first crystal orientation. The third surface connects the first surface to the second surface, and defines a space. An angle defined by the third surface and the first surface ranges from about 90° to about 120°.

公开(公告)号：US10497657B1

公开(公告)日：2019-12-03

申请号：US16007745

申请日：2018-06-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00

Abstract: A semiconductor package device is provided that includes a first circuit layer having a first conductive layer and a first stud bump and a second circuit layer having a second conductive layer and a second stud bump. The first stud bump has a first portion and a second portion, and the second portion of the first stud bump is electrically connected to the second conductive layer. The second stud bump has a first portion and a second portion, and the second portion of the second stud bump is electrically connected to the first conductive layer. The first stud bump partially overlaps the second stud bump in a direction substantially perpendicular to the first circuit layer.

公开(公告)号：US10461005B2

公开(公告)日：2019-10-29

申请号：US15943334

申请日：2018-04-02

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/538

Abstract: A semiconductor package includes a dielectric layer and a conductive post. The dielectric layer has a first surface and a second surface opposite to the first surface. The conductive post is disposed in the dielectric layer. The conductive post includes a first portion and a second portion disposed above the first portion. The second portion of the conductive post is recessed from the second surface of the dielectric layer.

公开(公告)号：US10446325B2

公开(公告)日：2019-10-15

申请号：US15721263

申请日：2017-09-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu ,  Chi-Chang Lee

IPC: H01G4/33 ,  H01G4/228 ,  H01G4/12 ,  H01G4/38 ,  H01G4/012 ,  H01G4/224 ,  H01L27/01 ,  H01L49/02

Abstract: A capacitor structure is disclosed. The capacitor structure includes a substrate, and a first electrode disposed on the substrate, the first electrode including a conductive layer, a first conductive post electrically connected to the conductive layer and a second conductive post electrically connected to the conductive layer. The capacitor structure further includes a planarization layer disposed on and covering the first electrode, the planarization layer disposed in a space between the first conductive post and the second conductive post, a first dielectric layer disposed on the planarization layer and in the space between the first conductive post and the second conductive post, and a second electrode disposed on the first dielectric layer.

公开(公告)号：US10002849B2

公开(公告)日：2018-06-19

申请号：US15815357

申请日：2017-11-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L25/065 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498 ,  H01L23/31 ,  H01L23/29

CPC classification number: H01L25/0655 ,  H01L21/561 ,  H01L21/568 ,  H01L23/16 ,  H01L23/24 ,  H01L23/293 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/562 ,  H01L23/564 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/13082 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48229 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/48227 ,  H01L2924/00012

Abstract: A method for manufacturing a semiconductor package structure includes: (a) disposing at least one semiconductor element on a conductive structure, wherein the conductive structure includes at least one insulation layer and at least one circuit layer; (b) disposing an encapsulant on the conductive structure to cover the semiconductor element; (c) attaching a supporting structure on the conductive structure to surround the semiconductor element; and (d) disposing an upper element on the encapsulant, wherein a coefficient of thermal expansion of the upper element is in a range of variation less than or equal to about ±20% of a coefficient of thermal expansion of the circuit layer, and a bending modulus of the upper element is in a range of variation less than or equal to about ±35% of a bending modulus of the circuit layer.

公开(公告)号：US09947635B1

公开(公告)日：2018-04-17

申请号：US15294594

申请日：2016-10-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu ,  Yuan-Feng Chiang ,  Chi-Chang Lee ,  Chung-Hsi Wu

IPC: H01L23/02 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L24/17 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/33 ,  H01L2224/1705 ,  H01L2224/175 ,  H01L2224/33104 ,  H01L2224/335

Abstract: A semiconductor package includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first main body, at least one first columnar portion and at least one first conductive layer. The first columnar portion protrudes from a bottom surface of the first main body. The first conductive layer is disposed on a side surface of the first columnar portion. The second semiconductor device includes a second main body, at least one second columnar portion and at least one second conductive layer. The second columnar portion protrudes from a top surface of the second main body. The second conductive layer is disposed on a side surface of the second columnar portion. The first conductive layer is electrically coupled to the second conductive layer.

公开(公告)号：US09853011B2

公开(公告)日：2017-12-26

申请号：US15083527

申请日：2016-03-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L47/02 ,  H01L25/065 ,  H01L23/29 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L25/0655 ,  H01L21/561 ,  H01L21/568 ,  H01L23/16 ,  H01L23/24 ,  H01L23/293 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/562 ,  H01L23/564 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/13082 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48229 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/48227 ,  H01L2924/00012

Abstract: A semiconductor package structure includes a conductive structure, a semiconductor element disposed on and electrically connected to the conductive structure, a supporting structure, an encapsulant, and a metal layer. The supporting structure is disposed on the conductive structure and surrounds the semiconductor element. The encapsulant covers the semiconductor element. The metal layer is disposed on or embedded in the encapsulant.

公开(公告)号：US11721645B2

公开(公告)日：2023-08-08

申请号：US17368688

申请日：2021-07-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/564 ,  H01L21/4853 ,  H01L21/566 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/49838 ,  H01L24/16 ,  H01L2224/16227

Abstract: A semiconductor package device includes a wiring structure, a semiconductor chip and an encapsulant. The semiconductor chip is electrically connected to the wiring structure. The encapsulant is disposed on the wiring structure and covers the semiconductor chip. A roughness (Ra) of a surface of the encapsulant is about 5 nm to about 50 nm.