PULSED-PLASMA SYSTEM WITH PULSED SAMPLE BIAS FOR ETCHING SEMICONDUCTOR SUBSTRATES
    31.
    发明申请
    PULSED-PLASMA SYSTEM WITH PULSED SAMPLE BIAS FOR ETCHING SEMICONDUCTOR SUBSTRATES 有权
    具有用于蚀刻半导体衬底的脉冲样品偏置的脉冲等离子体系统

    公开(公告)号:US20080197110A1

    公开(公告)日:2008-08-21

    申请号:US11677472

    申请日:2007-02-21

    IPC分类号: C23F1/00 H01L21/306

    摘要: A pulsed plasma system with pulsed sample bias for etching semiconductor structures is described. In one embodiment, a portion of a sample is removed by applying a pulsed plasma process, wherein the pulsed plasma process comprises a plurality of duty cycles. A negative bias is applied to the sample during the ON state of each duty cycle, while a zero bias is applied to the sample during the OFF state of each duty cycle. In another embodiment, a first portion of a sample is removed by applying a continuous plasma process. The continuous plasma process is then terminated and a second portion of the sample is removed by applying a pulsed plasma process.

    摘要翻译: 描述了具有用于蚀刻半导体结构的脉冲样本偏置的脉冲等离子体系统。 在一个实施例中,通过施加脉冲等离子体处理来去除样品的一部分,其中脉冲等离子体处理包括多个占空比。 在每个占空比的导通状态期间,向样品施加负偏压,而在每个占空比的OFF状态期间,零样本被施加到样品。 在另一个实施方案中,通过施加连续的等离子体工艺来除去样品的第一部分。 然后连续等离子体处理被终止,并且通过施加脉冲等离子体工艺来除去样品的第二部分。

    Mask etch plasma reactor with backside optical sensors and multiple frequency control of etch distribution
    32.
    发明申请
    Mask etch plasma reactor with backside optical sensors and multiple frequency control of etch distribution 审中-公开
    具有背面光学传感器的掩模蚀刻等离子体反应器和蚀刻分布的多次频率控制

    公开(公告)号:US20080099450A1

    公开(公告)日:2008-05-01

    申请号:US11589343

    申请日:2006-10-30

    IPC分类号: H01L21/3065

    摘要: A plasma reactor is provided having multiple frequency control of etch parameters. The reactor includes a reactor chamber and a workpiece support within the chamber, the chamber having a ceiling facing the workpiece support, and an inductively coupled source power applicator and a capacitively coupled plasma source power applicator. An array of optical fibers extends through the support surface of the workpiece support to view the workpiece through its bottom surface. Optical sensors are coupled to the output ends of the optical fibers. The reactor further includes a controller responsive to the optical sensors for adjusting the relative amounts of power simultaneously coupled to plasma in the chamber by the inductively coupled plasma source power applicator and the capacitively coupled plasma source power applicator.

    摘要翻译: 提供具有对蚀刻参数进行多次频率控制的等离子体反应器。 反应器包括反应室和腔室内的工件支撑件,腔室具有面向工件支撑件的天花板,以及电感耦合源功率施加器和电容耦合等离子体源功率施加器。 光纤阵列延伸穿过工件支撑件的支撑表面,以通过其底部表面观察工件。 光学传感器耦合到光纤的输出端。 反应器还包括响应于光学传感器的控制器,用于通过电感耦合等离子体源功率施加器和电容耦合的等离子体源功率施加器来调节同时耦合到腔室中的等离子体的功率的相对量。

    Pulsed-plasma system with pulsed sample bias for etching semiconductor substrates
    34.
    发明授权
    Pulsed-plasma system with pulsed sample bias for etching semiconductor substrates 有权
    具有用于蚀刻半导体衬底的脉冲样品偏置的脉冲等离子体系统

    公开(公告)号:US07718538B2

    公开(公告)日:2010-05-18

    申请号:US11677472

    申请日:2007-02-21

    IPC分类号: H01L21/302

    摘要: A pulsed plasma system with pulsed sample bias for etching semiconductor structures is described. In one embodiment, a portion of a sample is removed by applying a pulsed plasma process, wherein the pulsed plasma process comprises a plurality of duty cycles. A negative bias is applied to the sample during the ON state of each duty cycle, while a zero bias is applied to the sample during the OFF state of each duty cycle. In another embodiment, a first portion of a sample is removed by applying a continuous plasma process. The continuous plasma process is then terminated and a second portion of the sample is removed by applying a pulsed plasma process.

    摘要翻译: 描述了具有用于蚀刻半导体结构的脉冲样本偏置的脉冲等离子体系统。 在一个实施例中,通过施加脉冲等离子体处理来去除样品的一部分,其中脉冲等离子体处理包括多个占空比。 在每个占空比的导通状态期间,向样品施加负偏压,而在每个占空比的OFF状态期间,零样本被施加到样品。 在另一个实施方案中,通过施加连续的等离子体工艺来除去样品的第一部分。 然后连续等离子体处理被终止,并且通过施加脉冲等离子体工艺来除去样品的第二部分。

    Alternating asymmetrical plasma generation in a process chamber
    35.
    发明申请
    Alternating asymmetrical plasma generation in a process chamber 审中-公开
    处理室中的交替不对称等离子体产生

    公开(公告)号:US20050241762A1

    公开(公告)日:2005-11-03

    申请号:US11060980

    申请日:2005-02-18

    摘要: Embodiments of the invention generally provide etch or CVD plasma processing methods and apparatus used to generate a uniform plasma across the surface of a substrate by modulation pulsing the power delivered to a plurality of plasma controlling devices found in a plasma processing chamber. The plasma generated and/or sustained in the plasma processing chamber is created by the one or more plasma controlling devices that are used to control, generate, enhance, and/or shape the plasma during the plasma processing steps by use of energy delivered from a RF power source. Plasma controlling devices may include, for example, one or more coils (inductively coupled plasma), one or more electrodes (capacitively coupled plasma), and/or any other energy inputting device such as a microwave source.

    摘要翻译: 本发明的实施例通常提供蚀刻或CVD等离子体处理方法和装置,用于通过调制脉冲输送到在等离子体处理室中发现的多个等离子体控制装置的功率来在衬底的表面上产生均匀的等离子体。 在等离子体处理室中产生和/或维持的等离子体是由一个或多个等离子体控制装置产生的,这些等离子体控制装置用于在等离子体处理步骤期间通过使用从等离子体处理室输送的能量来控制,产生,增强和/或形成等离子体 射频电源。 等离子体控制装置可以包括例如一个或多个线圈(电感耦合等离子体),一个或多个电极(电容耦合等离子体)和/或任何其它能量输入装置,例如微波源。

    Adjustable dual frequency voltage dividing plasma reactor
    36.
    发明授权
    Adjustable dual frequency voltage dividing plasma reactor 有权
    可调双频分压等离子体反应堆

    公开(公告)号:US06706138B2

    公开(公告)日:2004-03-16

    申请号:US09931324

    申请日:2001-08-16

    IPC分类号: H01L21306

    CPC分类号: H01J37/3244 H01J37/32082

    摘要: Apparatus and method for processing a substrate are provided. The apparatus for processing a substrate comprises: a chamber having a first electrode; a substrate support disposed in the chamber and providing a second electrode; a high frequency power source electrically connected to either the first or the second electrode; a low frequency power source electrically connected to either the first or the second electrode; and a variable impedance element connected to one or more of the electrodes. The variable impedance element may be tuned to control a self bias voltage division between the first electrode and the second electrode. Embodiments of the invention substantially reduce erosion of the electrodes, maintain process uniformity, improve precision of the etch process for forming high aspect ratio sub-quarter-micron interconnect features, and provide an increased etch rate which reduces time and costs of production of integrated circuits.

    摘要翻译: 提供了用于处理基板的设备和方法。 用于处理衬底的设备包括:具有第一电极的腔室; 设置在所述室中并提供第二电极的衬底支撑件; 电连接到第一或第二电极的高频电源; 电连接到第一或第二电极的低频电源; 和连接到一个或多个电极的可变阻抗元件。 可调谐可变阻抗元件以控制第一电极和第二电极之间的自偏压分压。 本发明的实施例大大减少电极的侵蚀,保持工艺均匀性,提高用于形成高纵横比亚微米互连特征的蚀刻工艺的精度,并提供增加的蚀刻速率,从而减少集成电路的生产时间和成本 。

    ALTERNATING ASYMMETRICAL PLASMA GENERATION IN A PROCESS CHAMBER
    37.
    发明申请
    ALTERNATING ASYMMETRICAL PLASMA GENERATION IN A PROCESS CHAMBER 审中-公开
    在过程室中替代非对称等离子体生成

    公开(公告)号:US20080023443A1

    公开(公告)日:2008-01-31

    申请号:US11766067

    申请日:2007-06-20

    IPC分类号: C23F1/00

    摘要: Embodiments of the invention generally provide etch or CVD plasma processing methods and apparatus used to generate a uniform plasma across the surface of a substrate by modulation pulsing the power delivered to a plurality of plasma controlling devices found in a plasma processing chamber. The plasma generated and/or sustained in the plasma processing chamber is created by the one or more plasma controlling devices that are used to control, generate, enhance, and/or shape the plasma during the plasma processing steps by use of energy delivered from a RF power source. Plasma controlling devices may include, for example, one or more coils (inductively coupled plasma), one or more electrodes (capacitively coupled plasma), and/or any other energy inputting device such as a microwave source.

    摘要翻译: 本发明的实施例通常提供蚀刻或CVD等离子体处理方法和装置,用于通过调制脉冲输送到在等离子体处理室中发现的多个等离子体控制装置的功率来在衬底的表面上产生均匀的等离子体。 在等离子体处理室中产生和/或维持的等离子体是由一个或多个等离子体控制装置产生的,这些等离子体控制装置用于在等离子体处理步骤期间通过使用从等离子体处理室输送的能量来控制,产生,增强和/或形成等离子体 射频电源。 等离子体控制装置可以包括例如一个或多个线圈(电感耦合等离子体),一个或多个电极(电容耦合等离子体)和/或任何其它能量输入装置,例如微波源。

    Method for controlling etch uniformity

    公开(公告)号:US06617794B2

    公开(公告)日:2003-09-09

    申请号:US10016971

    申请日:2001-12-14

    IPC分类号: H01J724

    CPC分类号: H01J37/32174 H01J37/321

    摘要: The present invention generally provides a method for processing a semiconductor substrate, wherein the method includes positioning a substrate in a processing chamber having at least a first and second coils positioned above the substrate and supplying a first electrical current to the first coil. The method further includes supplying a second current to the second coil and regulating a current ratio of electrical current supplied to the first and second coils with a power distribution network in communication with the first and second coils and a single power supply. The method may further include controlling plasma uniformity in a semiconductor processing chamber, wherein the control process includes positioning a first coil above the processing chamber, the first coil being concentrically positioned about a vertical axis of the processing chamber, and positioning a second coil above the processing chamber, the second coil being concentrically positioned about the vertical axis of the processing chamber and radially outward from the first coil. The control process may further include supplying electrical power to the first and second coils with a single power distribution network to selectively regulate a magnetic field intensity generated by the first and second coils above a workpiece in the processing chamber.