METHOD FOR FABRICATING LOW K DIELECTRIC DUAL DAMASCENE STRUCTURES
    2.
    发明申请
    METHOD FOR FABRICATING LOW K DIELECTRIC DUAL DAMASCENE STRUCTURES 审中-公开
    制备低K电介质双组分结构的方法

    公开(公告)号:US20090156012A1

    公开(公告)日:2009-06-18

    申请号:US11954550

    申请日:2007-12-12

    Abstract: Methods for forming dual damascene structures in low-k dielectric materials that facilitate reducing photoresist poison issues are provided herein. In some embodiments, such methods may include plasma etching a via through a first mask layer into a low-k dielectric material disposed on a substrate. The first mask layer may then be removed using a process including exposing the first mask layer to a first plasma comprising an oxygen containing gas and at least one of a dilutant gas or a passivation gas, and subsequently exposing the first mask layer to a second plasma comprising an oxygen containing gas and formed using one of either plasma bias power or plasma source power. An anti-reflective coating may then be deposited into the via and atop the low-k dielectric material. A trench may then be plasma etched through a second mask layer formed atop the anti-reflective coating into the low-k dielectric material.

    Abstract translation: 本文提供了在低k电介质材料中形成双重镶嵌结构的方法,其有助于减少光致抗蚀剂的毒性问题。 在一些实施例中,这样的方法可以包括将通过第一掩模层的通孔等离子体蚀刻到设置在基板上的低k电介质材料。 然后可以使用包括将第一掩模层暴露于包含含氧气体和稀释气体或钝化气体中的至少一种的第一等离子体的方法去除第一掩模层,并随后将第一掩模层暴露于第二等离子体 包括含氧气体并且使用等离子体偏置功率或等离子体源功率之一来形成。 然后可以将抗反射涂层沉积到低k电介质材料的通孔中。 然后可以通过在抗反射涂层顶部形成低k电介质材料的第二掩模层等离子体蚀刻沟槽。

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