公开(公告)号：US20170309528A1

公开(公告)日：2017-10-26

申请号：US15136611

申请日：2016-04-22

Applicant: Applied Materials, Inc.

Inventor： Amit Kumar BANSAL ,  Juan Carlos ROCHA-ALVAREZ ,  Karthik JANAKIRAMAN ,  Tuan Anh NGUYEN

IPC: H01L21/66 ,  H01L21/285 ,  H01L21/02 ,  H01L21/687

CPC classification number: H01L22/26 ,  C23C16/45565 ,  C23C16/45589 ,  C23C16/4583 ,  C23C16/52 ,  H01L21/02271 ,  H01L21/0262 ,  H01L21/28556 ,  H01L21/67253 ,  H01L21/68742 ,  H01L21/68764 ,  H01L21/68785 ,  H01L22/12

Abstract: The implementations described herein generally relate to the dynamic, real-time control of the process spacing between a substrate support and a gas distribution medium during a deposition process. Multiple dimensional degrees of freedom are utilized to change the angle and spacing of the substrate plane with respect to the gas distributing medium at any time during the deposition process. As such, the substrate and/or substrate support may be leveled, tilted, swiveled, wobbled, and/or moved during the deposition process to achieve improved film uniformity. Furthermore, the independent tuning of each layer may be had due to continuous variations in the leveling of the substrate plane with respect to the showerhead to average effective deposition on the substrate, thus improving overall stack deposition performance.

公开(公告)号：US20160314995A1

公开(公告)日：2016-10-27

申请号：US14972366

申请日：2015-12-17

Applicant: Applied Materials, Inc.

Inventor： Dale R. DU BOIS ,  Juan Carlos ROCHA-ALVAREZ ,  Karthik JANAKIRAMAN ,  Hari K. PONNEKANTI ,  Sanjeev BALUJA ,  Prajeeth WILTON

IPC: H01L21/677 ,  H01L21/687 ,  B25J11/00 ,  H01L21/67

CPC classification number: B25J11/0095 ,  H01L21/67196 ,  H01L21/67742 ,  H01L21/67748

Abstract: The present disclosure generally relates to semiconductor process equipment used to transfer semiconductor substrates between process chambers. More specifically, embodiments described herein are related to systems and methods used to transfer, or swap, semiconductor substrates between process chambers using a transport device that employs at least two blades for the concurrent transfer of substrates between processing chambers.

Abstract translation: 本公开一般涉及用于在处理室之间传送半导体衬底的半导体工艺设备。 更具体地，本文描述的实施例涉及用于使用运输装置传送或交换处理室之间的半导体衬底的系统和方法，所述传输装置采用至少两个刀片，用于在处理室之间同时传送衬底。

公开(公告)号：US20230093450A1

公开(公告)日：2023-03-23

申请号：US18072457

申请日：2022-11-30

Applicant: Applied Materials, Inc.

Inventor： Tzu-shun YANG ,  Rui CHENG ,  Karthik JANAKIRAMAN ,  Zubin HUANG ,  Diwakar KEDLAYA ,  Meenakshi GUPTA ,  Srinivas GUGGILLA ,  Yung-chen LIN ,  Hidetaka OSHIO ,  Chao LI ,  Gene LEE

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/3213

Abstract: The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a first mandrel layer on a material layer disposed on a substrate. A first spacer layer is conformally formed on sidewalls of the first mandrel layer, wherein the first spacer layer comprises a doped silicon material. The first mandrel layer is selectively removed while keeping the first spacer layer. A second spacer layer is conformally formed on sidewalls of the first spacer layer and selectively removing the first spacer layer while keeping the second spacer layer.

公开(公告)号：US20220119953A1

公开(公告)日：2022-04-21

申请号：US17075812

申请日：2020-10-21

Applicant: Applied Materials, Inc.

Inventor： Jui-Yuan HSU ,  Krishna NITTALA ,  Pramit MANNA ,  Karthik JANAKIRAMAN

IPC: C23C16/50 ,  H01J37/32 ,  C23C16/26 ,  C23C16/458 ,  C23C16/56

Abstract: Embodiments of the present disclosure generally relate to hardmasks and to processes for forming hardmasks by plasma-enhanced chemical vapor deposition (PECVD). In an embodiment, a process for forming a hardmask layer on a substrate is provided. The process includes introducing a substrate to a processing volume of a PECVD chamber, the substrate on a substrate support, the substrate support comprising an electrostatic chuck, and flowing a process gas into the processing volume within the PECVD chamber, the process gas comprising a carbon-containing gas. The process further includes forming, under plasma conditions, an energized process gas from the process gas in the processing volume, electrostatically chucking the substrate to the substrate support, depositing a first carbon-containing layer on the substrate while electrostatically chucking the substrate, and forming the hardmask layer by depositing a second carbon-containing layer on the substrate.

公开(公告)号：US20210040617A1

公开(公告)日：2021-02-11

申请号：US16980325

申请日：2019-03-13

Applicant: Applied Materials, Inc.

Inventor： Zubin HUANG ,  Rui CHENG ,  Chen-An CHEN ,  Karthik JANAKIRAMAN

IPC: C23C16/50 ,  C23C16/24 ,  C23C16/455

Abstract: Method for depositing amorphous silicon materials are provide and include generating a plasma within a plasma unit in fluid communication with a process chamber and flowing the plasma through an ion suppressor to produce an activated fluid containing reactive species and neutral species. The activated fluid either contains no ions or contains a lower concentration of ions than the plasma. The method further includes flowing the activated fluid into a first inlet of a dual channel showerhead within the process chamber and flowing a silicon precursor into a second inlet of the dual channel showerhead. Thereafter, the method includes flowing a mixture of the activated fluid and the silicon precursor out of the dual channel showerhead and forming an amorphous silicon layer on a substrate disposed in the process chamber.

公开(公告)号：US20200266052A1

公开(公告)日：2020-08-20

申请号：US16795191

申请日：2020-02-19

Applicant: Applied Materials, Inc.

Inventor： Krishna NITTALA ,  Rui CHENG ,  Karthik JANAKIRAMAN ,  Praket Prakash JHA ,  Jinrui GUO ,  Jingmei LIANG

IPC: H01L21/02

Abstract: Aspects of the disclosure provide a method including depositing an underlayer comprising silicon oxide over a substrate, depositing a polysilicon liner on the underlayer, and depositing an amorphous silicon layer on the polysilicon liner. Aspects of the disclosure provide a device intermediate including a substrate, an underlayer comprising silicon oxide formed over the substrate, a polysilicon liner disposed on the underlayer, and an amorphous silicon layer disposed on the polysilicon liner.

公开(公告)号：US20200211834A1

公开(公告)日：2020-07-02

申请号：US16725226

申请日：2019-12-23

Applicant: Applied Materials, Inc.

Inventor： Chuanxi YANG ,  Hang YU ,  Sanjay KAMATH ,  Deenesh PADHI ,  Honggun KIM ,  Euhngi LEE ,  Zubin HUANG ,  Diwakar N. KEDLAYA ,  Rui CHENG ,  Karthik JANAKIRAMAN

IPC: H01L21/02 ,  C23C16/34 ,  C23C16/02 ,  C23C16/513

Abstract: Methods for forming the silicon boron nitride layer are provided. The method includes positioning a substrate on a pedestal in a process region within a process chamber, heating a pedestal retaining the substrate, and introducing a first flow of a first process gas and a second flow of a second process gas to the process region. The first flow of the first process gas contains silane, ammonia, helium, nitrogen, argon, and hydrogen. The second flow of the second process gas contains diborane and hydrogen. The method also includes forming a plasma concurrently with the first flow of the first process gas and the second flow of the second process gas to the process region and exposing the substrate to the first process gas, the second process gas, and the plasma to deposit the silicon boron nitride layer on the substrate.

公开(公告)号：US20190027362A1

公开(公告)日：2019-01-24

申请号：US15988771

申请日：2018-05-24

Applicant: Applied Materials, Inc.

Inventor： Rui CHENG ,  Yi YANG ,  Yihong CHEN ,  Karthik JANAKIRAMAN ,  Abhijit Basu MALLICK

IPC: H01L21/02

Abstract: In one implementation, a method of forming an amorphous silicon layer on a substrate in a processing chamber is provided. The method comprises depositing a predetermined thickness of a sacrificial dielectric layer over a substrate. The method further comprises forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate. The method further comprises performing a plasma treatment to the patterned features. The method further comprises depositing an amorphous silicon layer on the patterned features and the exposed upper surface of the substrate. The method further comprises selectively removing the amorphous silicon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers formed from the amorphous silicon layer.

公开(公告)号：US20180308735A1

公开(公告)日：2018-10-25

申请号：US16016767

申请日：2018-06-25

Applicant: Applied Materials, Inc.

Inventor： Karthik JANAKIRAMAN ,  Hari K. PONNEKANTI ,  Juan Carlos ROCHA ,  Mukund SRINIVASAN

IPC: H01L21/677

Abstract: A system for processing a substrate is provided including a first planar motor, a substrate carrier, a first processing chamber, and a first lift. The first planar motor includes a first arrangement of coils disposed along a first horizontal direction, a top surface parallel to the first horizontal direction, a first side, a second side. The substrate carrier has a substrate supporting surface parallel to the first horizontal direction. The first processing chamber has an opening to receive a substrate disposed on the substrate carrier. The first lift includes a second planar motor having a second arrangement of coils disposed along the first horizontal direction. A top surface top surface of the second planar motor is parallel to the first horizontal direction. The first lift is configured to move the top surface of the second planar motor between a first vertical location and a second vertical location.

公开(公告)号：US20180117771A1

公开(公告)日：2018-05-03

申请号：US15860102

申请日：2018-01-02

Applicant: Applied Materials, Inc.

Inventor： Dale R. DU BOIS ,  Juan Carlos ROCHA-ALVAREZ ,  Karthik JANAKIRAMAN ,  Hari K. PONNEKANTI ,  Sanjeev BALUJA ,  Prajeeth WILTON

IPC: B25J11/00 ,  H01L21/677 ,  H01L21/67

CPC classification number: B25J11/0095 ,  H01L21/67196 ,  H01L21/67742 ,  H01L21/67748

Abstract: The present disclosure generally relates to semiconductor process equipment used to transfer semiconductor substrates between process chambers. More specifically, embodiments described herein are related to systems and methods used to transfer, or swap, semiconductor substrates between process chambers using a transport device that employs at least two blades for the concurrent transfer of substrates between processing chambers.