公开(公告)号：US20180080125A1

公开(公告)日：2018-03-22

申请号：US15822551

申请日：2017-11-27

Applicant: Applied Materials, Inc.

Inventor： Jianhua ZHOU ,  Juan Carlos ROCHA-ALVAREZ ,  Yihong CHEN ,  Abhijit Basu MALLICK ,  Oscar LOPEZ ,  Ningli LIU

IPC: C23C16/455 ,  H01J37/32 ,  C23C16/458 ,  C23C16/509

CPC classification number: C23C16/45565 ,  C23C16/45574 ,  C23C16/4584 ,  C23C16/4586 ,  C23C16/5096 ,  H01J37/32357 ,  H01J37/32422 ,  H01J37/32449

Abstract: Embodiments disclosed herein generally include an apparatus for radical-based deposition of dielectric films. The apparatus includes a processing chamber, a radical source coupled to the processing chamber, a substrate support disposed in the processing chamber, and a dual-channel showerhead disposed between the radical source and the substrate support. The dual-channel showerhead includes a plurality of tubes and an internal volume surrounding the plurality of tubes. The plurality of tubes and the internal volume are surrounded by one or more annular channels embedded in the dual-channel showerhead. The dual-channel showerhead further includes a first inlet connected to the one or more channels and a second inlet connected to the internal volume. The processing chamber may be a PECVD chamber, and the apparatus is capable of performing a cyclic process (alternating radical based CVD and PECVD).

公开(公告)号：US20170323777A1

公开(公告)日：2017-11-09

申请号：US15656045

申请日：2017-07-21

Applicant: Applied Materials, Inc.

Inventor： Yihong CHEN ,  Kelvin CHAN ,  Shaunak MUKHERJEE ,  Abhijit Basu MALLICK

IPC: H01L21/02 ,  C23C16/455 ,  H01L21/768 ,  H01L21/3105 ,  H01L21/033 ,  H01L23/532

CPC classification number: H01L21/0228 ,  C23C16/45525 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02214 ,  H01L21/02216 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/02307 ,  H01L21/02312 ,  H01L21/02315 ,  H01L21/0337 ,  H01L21/3105 ,  H01L21/76831 ,  H01L21/76834 ,  H01L23/53228

Abstract: Implementations disclosed herein generally relate to methods of forming silicon oxide films. The methods can include performing silylation on the surface of the substrate having terminal hydroxyl groups. The hydroxyl groups on the surface of the substrate are then regenerated using a plasma and H2O soak in order to perform an additional silylation. Further methods include catalyzing the exposed surfaces using a Lewis acid, directionally inactivating the exposed first and second surfaces and deposition of a silicon containing layer on the sidewall surfaces. Multiple plasma treatments may be performed to deposit a layer having a desired thickness.

公开(公告)号：US20150179581A1

公开(公告)日：2015-06-25

申请号：US14268727

申请日：2014-05-02

Applicant: Applied Materials, Inc.

Inventor： Yihong CHEN ,  Abhijit Basu MALLICK ,  Mehul B. NAIK ,  Srinivas D. NEMANI

IPC: H01L23/532 ,  H01L21/768

CPC classification number: H01L23/53238 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76879 ,  H01L23/5283 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method is provided for forming an interconnect structure for use in semiconductor devices. The method starts with forming a low-k bulk dielectric layer on a substrate and then forming a trench in the low-k bulk dielectric layer. A liner layer is formed on the low-k bulk dielectric layer being deposited conformally to the trench. A copper layer is formed on the liner layer filling the trench. Portions of the copper layer and liner layer are removed to form an upper surface of the low-k bulk dielectric layer, the liner layer, and the copper layer. A metal containing dielectric layer is formed on the upper surface of the low-k bulk dielectric layer, the liner layer, and the copper layer.

Abstract translation: 提供一种用于形成用于半导体器件的互连结构的方法。 该方法首先在衬底上形成低k体积电介质层，然后在低k体电介质层中形成沟槽。 衬底层形成在与沟槽共形沉积的低k体积电介质层上。 在填充沟槽的衬垫层上形成铜层。 去除部分铜层和衬层以形成低k体电介质层，衬里层和铜层的上表面。 在低k体电介质层，衬垫层和铜层的上表面上形成含金属的电介质层。

公开(公告)号：US20180294157A1

公开(公告)日：2018-10-11

申请号：US15925976

申请日：2018-03-20

Applicant: Applied Materials, Inc.

Inventor： Rui CHENG ,  Abhijit Basu MALLICK ,  Yihong CHEN

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/027 ,  C23C16/24 ,  C23C16/50 ,  C23C16/56

CPC classification number: H01L21/0337 ,  C23C16/24 ,  C23C16/50 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/0234 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02658 ,  H01L21/02664 ,  H01L21/0273 ,  H01L21/0332 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/67017 ,  H01L21/67103 ,  H01L21/67248

Abstract: In one implementation, a method of forming an amorphous silicon layer on a substrate in a processing chamber is provided. The method comprises depositing a predetermined thickness of a sacrificial dielectric layer over a substrate. The method further comprises forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate. The method further comprises performing a plasma treatment to the patterned features. The method further comprises depositing an amorphous silicon layer on the patterned features and the exposed upper surface of the substrate. The method further comprises selectively removing the amorphous silicon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers formed from the amorphous silicon layer.

公开(公告)号：US20170125239A1

公开(公告)日：2017-05-04

申请号：US15364125

申请日：2016-11-29

Applicant: Applied Materials, Inc.

Inventor： Yihong CHEN ,  Kelvin CHAN ,  Shaunak MUKHERJEE ,  Abhijit Basu MALLICK

IPC: H01L21/02 ,  C23C16/455

CPC classification number: H01L21/0228 ,  C23C16/45525 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02214 ,  H01L21/02216 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/02307 ,  H01L21/02312 ,  H01L21/02315 ,  H01L21/0337 ,  H01L21/3105 ,  H01L21/76831 ,  H01L21/76834 ,  H01L23/53228

Abstract: Implementations disclosed herein generally relate to methods of forming silicon oxide films. The methods can include performing silylation on the surface of the substrate having terminal hydroxyl groups. The hydroxyl groups on the surface of the substrate are then regenerated using a plasma and H2O soak in order to perform an additional silylation. Further methods include catalyzing the exposed surfaces using a Lewis acid, directionally inactivating the exposed first and second surfaces and deposition of a silicon containing layer on the sidewall surfaces. Multiple plasma treatments may be performed to deposit a layer having a desired thickness.

公开(公告)号：US20160017495A1

公开(公告)日：2016-01-21

申请号：US14799799

申请日：2015-07-15

Applicant: Applied Materials, Inc.

Inventor： Yihong CHEN ,  Kelvin CHAN ,  Martin Jay SEAMONS ,  Shaunak MUKHERJEE ,  Abhijit Basu MALLICK ,  Jianhua ZHOU ,  Kang Sub YIM

IPC: C23C16/505

CPC classification number: C23C16/505 ,  C23C16/325 ,  C23C16/4404 ,  C23C16/455 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02203 ,  H01L21/02274

Abstract: Embodiments disclosed herein generally include methods for forming porous low k dielectric films. In one embodiment, a method of forming a porous low k dielectric film on a substrate using PECVD and in situ radical curing in a processing chamber is disclosed. The method includes introducing radicals into a processing region of the processing chamber, introducing a gas mixture into the processing region of the processing chamber, forming a plasma in the processing region and depositing the porous low k dielectric film on the substrate.

Abstract translation: 本文公开的实施方案通常包括形成多孔低k电介质膜的方法。 在一个实施例中，公开了一种使用PECVD在基板上形成多孔低k电介质膜并在处理室中进行原位自由基固化的方法。 该方法包括将自由基引入处理室的处理区域，将气体混合物引入处理室的处理区域，在处理区域中形成等离子体，并在基板上沉积多孔低k电介质膜。

公开(公告)号：US20190027362A1

公开(公告)日：2019-01-24

申请号：US15988771

申请日：2018-05-24

Applicant: Applied Materials, Inc.

Inventor： Rui CHENG ,  Yi YANG ,  Yihong CHEN ,  Karthik JANAKIRAMAN ,  Abhijit Basu MALLICK

IPC: H01L21/02

Abstract: In one implementation, a method of forming an amorphous silicon layer on a substrate in a processing chamber is provided. The method comprises depositing a predetermined thickness of a sacrificial dielectric layer over a substrate. The method further comprises forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate. The method further comprises performing a plasma treatment to the patterned features. The method further comprises depositing an amorphous silicon layer on the patterned features and the exposed upper surface of the substrate. The method further comprises selectively removing the amorphous silicon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers formed from the amorphous silicon layer.

公开(公告)号：US20160172239A1

公开(公告)日：2016-06-16

申请号：US14943913

申请日：2015-11-17

Applicant: Applied Materials, Inc.

Inventor： Deenesh PADHI ,  Yihong CHEN ,  Kelvin CHAN ,  Abhijit Basu MALLICK ,  Alexandros T. DEMOS ,  Mukund SRINIVASAN

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L23/5329 ,  C23C16/30 ,  C23C16/452 ,  C23C16/45523 ,  H01L21/0214 ,  H01L21/02145 ,  H01L21/02167 ,  H01L21/02178 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/76834 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Implementations described herein generally relate to the formation of a silicon and aluminum containing layer. Methods described herein can include positioning a substrate in a process region of a process chamber; delivering a process gas to the process region, the process gas comprising an aluminum-containing gas and a silicon-containing gas; activating a reactant gas comprising a nitrogen-containing gas, a hydrogen containing gas, or combinations thereof; delivering the reactant gas to the process gas to create a deposition gas that deposits a silicon and aluminum containing layer on the substrate; and purging the process region. The above elements can be performed one or more times to deposit an etch stop stack.

Abstract translation: 本文描述的实施方案一般涉及形成含硅和铝的层。 本文所述的方法可以包括将基底定位在处理室的处理区域中; 将工艺气体输送到所述工艺区域，所述工艺气体包括含铝气体和含硅气体; 活化包含含氮气体，含氢气体或其组合的反应气体; 将反应气体输送到工艺气体以产生在衬底上沉积含硅和铝的层的沉积气体; 并清除过程区域。 可以执行上述元件一次或多次以沉积蚀刻停止叠层。

公开(公告)号：US20190214228A1

公开(公告)日：2019-07-11

申请号：US16244779

申请日：2019-01-10

Applicant: Applied Materials, Inc.

Inventor： Yihong CHEN ,  Shaunak MUKHERJEE ,  Kelvin CHAN ,  Abhijit Basu MALLICK

IPC: H01J37/32 ,  C23C16/56 ,  C23C16/455 ,  C23C16/34

Abstract: Embodiments described herein generally relate to apparatus and methods for reducing hydrogen content of a film. Apparatus may include a chamber body, a support member coupled to a lift mechanism, and a source of hydrogen radicals. The chamber may have a radical conduit coupled with the source of hydrogen radicals at a first end and coupled with the chamber body at a second end. The chamber may have a dual-channel showerhead coupled with a lid rim. The dual-channel showerhead may be disposed between the radical source and the support member. The showerhead may face the support member. Methods may include forming a first film having a hydrogen content of about 1% to about 50% on a substrate in a chamber, and exposing the first film to hydrogen radicals to form a second film having reduced hydrogen content.

公开(公告)号：US20160233084A1

公开(公告)日：2016-08-11

申请号：US14984599

申请日：2015-12-30

Applicant: Applied Materials, Inc.

Inventor： Yihong CHEN ,  Kelvin CHAN ,  Shaunak MUKHERJEE ,  Abhijit Basu MALLICK

IPC: H01L21/02 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L21/0228 ,  C23C16/45525 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02214 ,  H01L21/02216 ,  H01L21/02219 ,  H01L21/02274 ,  H01L21/02307 ,  H01L21/02312 ,  H01L21/02315 ,  H01L21/0337 ,  H01L21/3105 ,  H01L21/76831 ,  H01L21/76834 ,  H01L23/53228

Abstract: Implementations disclosed herein generally relate to methods of forming silicon oxide films. The methods can include performing silylation on the surface of the substrate having terminal hydroxyl groups. The hydroxyl groups on the surface of the substrate are then regenerated using a plasma and H2O soak in order to perform an additional silylation. Further methods include catalyzing the exposed surfaces using a Lewis acid, directionally inactivating the exposed first and second surfaces and deposition of a silicon containing layer on the sidewall surfaces. Multiple plasma treatments may be performed to deposit a layer having a desired thickness.

Abstract translation: 本文公开的实施方式通常涉及形成氧化硅膜的方法。 所述方法可以包括在具有末端羟基的基材的表面上进行甲硅烷基化。 然后使用等离子体和H 2 O浸泡再生衬底表面上的羟基以进行另外的甲硅烷基化。 其它方法包括使用路易斯酸催化暴露的表面，定向灭活暴露的第一和第二表面以及在侧壁表面上沉积含硅层。 可以进行多次等离子体处理以沉积具有所需厚度的层。