公开(公告)号：US09911857B2

公开(公告)日：2018-03-06

申请号：US12915712

申请日：2010-10-29

申请人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu

发明人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/78696

摘要： A metal oxide semiconductor device including an active layer of metal oxide, a layer of gate dielectric, and a layer of low trap density material. The layer of low trap density material is sandwiched between the active layer of metal oxide and the layer of gate dielectric. The layer of low trap density material has a major surface parallel and in contact with a major surface of the active layer of metal oxide to form a low trap density interface with the active layer of metal oxide. A second layer of low trap density material can optionally be placed in contact with the opposed major surface of the active layer of metal oxide so that a low trap density interface is formed with both surfaces of the active layer of metal oxide.

公开(公告)号：US09614102B2

公开(公告)日：2017-04-04

申请号：US15080231

申请日：2016-03-24

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

IPC分类号： H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L21/70 ,  H01L21/02

CPC分类号： H01L29/78696 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/707 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

摘要： A method of fabricating MO TFTs includes positioning opaque gate metal on a transparent substrate to define a gate area. Depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Depositing etch stop material on the semiconductor material. Positioning photoresist defining an isolation area in the semiconductor material, the etch stop material and the photoresist being selectively removable. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas.

公开(公告)号：US09318614B2

公开(公告)日：2016-04-19

申请号：US14071644

申请日：2013-11-05

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

IPC分类号： H01L21/00 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L21/70 ,  H01L21/02

CPC分类号： H01L29/78696 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/707 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

摘要： A method of fabricating MOTFTs includes positioning opaque gate metal on a transparent substrate, depositing gate dielectric material overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material thereon. Etch stop material is deposited on the semiconductor material. Photoresist defines an isolation area in the semiconductor material. Exposing the photoresist from the rear surface of the substrate and removing exposed portions to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material to form source and drain areas.

摘要翻译： 制造MOTFT的方法包括将不透明栅极金属定位在透明基板上，沉积覆盖栅极金属的栅介质材料和周围区域，以及在其上沉积金属氧化物半导体材料。 蚀刻停止材料沉积在半导体材料上。 光致抗蚀剂界定半导体材料中的隔离区。 从基板的后表面露出光致抗蚀剂，除去暴露的部分以使蚀刻停止材料未被覆盖，除了覆盖并与栅极金属对准的部分之外。 蚀刻半导体材料的未覆盖部分以隔离TFT。 使用光致抗蚀剂，选择性地蚀刻蚀刻停止层以留下覆盖并与栅极金属对准的部分并限定半导体材料中的沟道区域。 沉积和图案化导电材料以形成源区和漏区。

公开(公告)号：US09117918B2

公开(公告)日：2015-08-25

申请号：US14175521

申请日：2014-02-07

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

IPC分类号： H01L29/786 ,  H01L21/428 ,  H01L29/45 ,  H01L29/66

CPC分类号： H01L29/7869 ,  H01L21/428 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78606

摘要： A method of forming ohmic source/drain contacts in a metal oxide semiconductor thin film transistor includes providing a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration. The spaced apart source/drain metal contacts define a channel region in the active layer. An oxidizing ambient is provided adjacent the channel region and the gate and the channel region are heated in the oxidizing ambient to reduce the carrier concentration in the channel area. Alternatively or in addition each of the source/drain contacts includes a very thin layer of low work function metal positioned on the metal oxide semiconductor active layer and a barrier layer of high work function metal is positioned on the low work function metal.

摘要翻译： 在金属氧化物半导体薄膜晶体管中形成欧姆源极/漏极接触的方法包括：提供栅极，栅极电介质，具有带隙的高载流子浓度金属氧化物半导体有源层和间隔开的源/漏极金属接触体 薄膜晶体管配置。 间隔开的源极/漏极金属触点限定有源层中的沟道区。 在沟道区域附近提供氧化环境，并且栅极和沟道区域在氧化环境中被加热以降低沟道区域中的载流子浓度。 或者或另外每个源极/漏极触点包括位于金属氧化物半导体有源层上的非常薄的低功函数金属层，并且高功函数金属的势垒层位于低功函数金属上。

公开(公告)号：US20130032796A1

公开(公告)日：2013-02-07

申请号：US13564746

申请日：2012-08-02

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565

摘要： A method of fabricating MOTFTs on transparent substrates by positioning opaque gate metal on the substrate front surface and depositing gate dielectric material overlying the gate metal and a surrounding area and metal oxide semiconductor material on the dielectric material. Depositing selectively removable etch stop material on the semiconductor material and photoresist on the etch stop material to define an isolation area in the semiconductor material. Removing uncovered portions of the etch stop. Exposing the photoresist from the substrate rear surface using the gate metal as a mask and removing exposed portions leaving the etch stop material overlying the gate metal covered. Etching the semiconductor material to isolate the TFT. Selectively etching the etch stop layer to leave a portion overlying the gate metal defining a channel area. Depositing and patterning conductive material to form source and drain areas on opposed sides of the channel area.

摘要翻译： 一种在透明基板上制造MOTFT的方法，该方法是将不透明栅极金属定位在衬底前表面上，并沉积覆盖在栅极金属上的栅介质材料以及介电材料上的周围区域和金属氧化物半导体材料。 在半导体材料和蚀刻停止材料上的光致抗蚀剂上沉积选择性可移除的蚀刻停止材料以限定半导体材料中的隔离区域。 去除蚀刻停止件的未覆盖部分。 使用栅极金属作为掩模从基板后表面露出光致抗蚀剂，并去除暴露部分，留下覆盖栅极金属的蚀刻停止材料。 蚀刻半导体材料以隔离TFT。 选择性地蚀刻蚀刻停止层以留下覆盖栅极金属的部分限定沟道区域。 沉积和图案化导电材料以在通道区域的相对侧上形成源区和漏区。

公开(公告)号：US08222077B2

公开(公告)日：2012-07-17

申请号：US11983205

申请日：2007-11-06

申请人： Xiong Gong ,  Kaixia Yang ,  Gang Yu ,  Boo Jorgen Larŝ Nilsson ,  Chan-Long Shieh ,  Hsing-Chung Lee ,  Fatt Foong

发明人： Xiong Gong ,  Kaixia Yang ,  Gang Yu ,  Boo Jorgen Larŝ Nilsson ,  Chan-Long Shieh ,  Hsing-Chung Lee ,  Fatt Foong

IPC分类号： H01L21/28

CPC分类号： G02F1/1365 ,  G02F1/167 ,  H01G11/48 ,  H01G11/56 ,  H01L45/00 ,  Y02E60/13 ,  Y10S438/957

摘要： Two-terminal switching devices of MIM type having at least one electrode formed by a liquid phase processing method are provided for use in active matrix backplane applications; more specifically, MIM devices with symmetric current-voltage characteristics are applied for LCD active matrix backplane applications, and MIM devices with asymmetric current-voltage characteristics are applied for active matrix backplane implementation for electrophoretic displays (EPD) and rotating element displays. In particular, the combination of the bottom metal, metal-oxide insulator and solution-processible top conducting layer enables high throughput, roll-to-roll process for flexible displays.

摘要翻译： 提供具有通过液相处理方法形成的至少一个电极的MIM型的两端开关装置用于有源矩阵背板应用; 更具体地说，将具有对称电流 - 电压特性的MIM器件应用于LCD有源矩阵背板应用，并且将具有不对称电流 - 电压特性的MIM器件应用于电泳显示器（EPD）和旋转元件显示器的有源矩阵背板实施。 特别地，底部金属，金属氧化物绝缘体和可溶液加工的顶部导电层的组合可实现灵活显示器的高生产率，卷对卷过程。

公开(公告)号：US20150263078A1

公开(公告)日：2015-09-17

申请号：US14216920

申请日：2014-03-17

申请人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu ,  Guangming Wang

发明人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu ,  Guangming Wang

IPC分类号： H01L27/32 ,  H01L51/52 ,  H01L29/786 ,  H01L51/56 ,  H01L51/00 ,  H01L27/12

CPC分类号： H01L27/3244 ,  H01L27/1259 ,  H01L27/322 ,  H01L29/78603 ,  H01L51/003 ,  H01L51/0097 ,  H01L51/5246 ,  H01L51/56 ,  H01L2227/323 ,  H01L2251/5338

摘要： A process of fabricating a flexible TFT back-panel on a glass support includes a step of providing a flat glass support member sufficiently thick to prevent bending during the processing. A layer of etch stop material is positioned on the upper surface of the glass support member and an insulating buffer layer is positioned on the layer of etch stop material. A TFT back-panel is positioned on the insulating buffer layer and a flexible plastic carrier is affixed to the TFT back-panel. The glass support member is etched away, whereby a flexible TFT back-panel is provided. The TFT back-panel can include a matrix of either OLED cells or LCD cells.

摘要翻译： 在玻璃支架上制造柔性TFT背板的工艺包括提供足够厚的平板玻璃支撑件以防止加工过程中弯曲的步骤。 一层蚀刻停止材料定位在玻璃支撑构件的上表面上，并且绝缘缓冲层位于蚀刻停止材料层上。 TFT背板位于绝缘缓冲层上，柔性塑料载体固定在TFT后面板上。 蚀刻玻璃支撑构件，由此提供柔性TFT背面板。 TFT背面板可以包括OLED单元或LCD单元的矩阵。

公开(公告)号：US20120313092A1

公开(公告)日：2012-12-13

申请号：US13155749

申请日：2011-06-08

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

IPC分类号： H01L29/786 ,  H01L21/383

CPC分类号： H01L29/7869 ,  H01L21/428 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78606

摘要： A method of forming ohmic source/drain contacts in a metal oxide semiconductor thin film transistor includes providing a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration. The spaced apart source/drain metal contacts define a channel region in the active layer. An oxidizing ambient is provided adjacent the channel region and the gate and the channel region are heated in the oxidizing ambient to reduce the carrier concentration in the channel area. Alternatively or in addition each of the source/drain contacts includes a very thin layer of low work function metal positioned on the metal oxide semiconductor active layer and a barrier layer of high work function metal is positioned on the low work function metal.

摘要翻译： 在金属氧化物半导体薄膜晶体管中形成欧姆源极/漏极接触的方法包括：提供栅极，栅极电介质，具有带隙的高载流子浓度金属氧化物半导体有源层和间隔开的源/漏极金属接触体 薄膜晶体管配置。 间隔开的源极/漏极金属触点限定有源层中的沟道区。 在沟道区域附近提供氧化环境，并且栅极和沟道区域在氧化环境中被加热以降低沟道区域中的载流子浓度。 或者或另外每个源极/漏极触点包括位于金属氧化物半导体有源层上的非常薄的低功函数金属层，并且高功函数金属的势垒层位于低功函数金属上。

公开(公告)号：US20120168744A1

公开(公告)日：2012-07-05

申请号：US13195882

申请日：2011-08-02

申请人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

发明人： Chan-Long Shieh ,  Gang Yu ,  Fatt Foong

IPC分类号： H01L29/786 ,  H01L21/8254

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565

摘要： A method of fabricating MO TFTs on transparent substrates by positioning opaque gate metal on the front surface of the substrate defining a gate area, depositing gate dielectric material on the front surface of the substrate, overlying the gate metal and a surrounding area, and depositing metal oxide semiconductor material on the gate dielectric material. Depositing etch stop material on the semiconductor material. Positioning photoresist on the etch stop material, the etch stop material and the photoresist being selectively removable, and the photoresist defining an isolation area in the semiconductor material. Removing uncovered portions of the etch stop. Exposing the photoresist from the rear surface of the substrate using the gate metal as a mask and removing exposed portions so as to leave the etch stop material uncovered except for a portion overlying and aligned with the gate metal. Etching uncovered portions of the semiconductor material to isolate the TFT. Using the photoresist, selectively etching the etch stop layer to leave a portion overlying and aligned with the gate metal and defining a channel area in the semiconductor material. Depositing and patterning conductive material on the etch stop layer and on the semiconductor material to form source and drain areas on opposed sides of the channel area.

摘要翻译： 一种在透明基板上制造MO TFT的方法，该方法是通过在形成栅极区域的衬底的前表面上定位不透明栅极金属，在衬底的前表面上沉积栅介电材料，覆盖栅极金属和周围区域，并沉积金属 氧化物半导体材料。 在半导体材料上沉积蚀刻停止材料。 将光致抗蚀剂定位在蚀刻停止材料上，蚀刻停止材料和光致抗蚀剂可选择性地移除，并且光刻胶在半导体材料中限定隔离区域。 去除蚀刻停止件的未覆盖部分。 使用栅极金属作为掩模从基板的后表面露出光致抗蚀剂，并除去暴露部分，以使除蚀刻停止材料未被覆盖，除了覆盖并与栅极金属对准的部分之外。 蚀刻半导体材料的未覆盖部分以隔离TFT。 使用光致抗蚀剂，选择性地蚀刻蚀刻停止层以留下覆盖并与栅极金属对准的部分并限定半导体材料中的沟道区域。 在蚀刻停止层和半导体材料上沉积和图案化导电材料，以在沟道区域的相对侧上形成源极和漏极区域。

公开(公告)号：US08187929B2

公开(公告)日：2012-05-29

申请号：US12612123

申请日：2009-11-04

申请人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu

发明人： Chan-Long Shieh ,  Fatt Foong ,  Gang Yu

IPC分类号： H01L21/84

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1225 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869

摘要： A method of fabricating a thin film transistor for an active matrix display using reduced masking operations includes patterning a gate on a substrate. A gate dielectric is formed over the gate and a semiconducting metal oxide is deposited on the gate dielectric. A channel protection layer is patterned on the semiconducting metal oxide overlying the gate to define a channel area and to expose the remaining semiconducting metal oxide. A source/drain metal layer is deposited on the structure and etched through to the channel protection layer above the gate to separate the source/drain metal layer into source and drain terminals and the source/drain metal layer and the semiconducting metal oxide are etched through at the periphery to isolate the transistor. A nonconductive spacer is patterned on the transistor and portions of the surrounding source/drain metal layer.

摘要翻译： 使用减少的掩模操作制造用于有源矩阵显示器的薄膜晶体管的方法包括在衬底上图形化栅极。 在栅极上形成栅极电介质，并且在栅极电介质上沉积半导体金属氧化物。 将通道保护层图案化在覆盖栅极的半导体金属氧化物上，以限定通道区域并露出剩余的半导体金属氧化物。 源极/漏极金属层沉积在结构上并蚀刻到栅极上方的沟道保护层，以将源极/漏极金属层分离成源极和漏极端子，并且源/漏极金属层和半导体金属氧化物被蚀刻通过 在外围隔离晶体管。 在晶体管和周围源极/漏极金属层的部分上构图非导电间隔物。