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31.发明授权Wafer level semiconductor package with build-up layer and method for fabricating the same 有权具有积层的晶片级半导体封装及其制造方法公开(公告)号：US07170152B2
公开(公告)日：2007-01-30
申请号：US10846460
申请日：2004-05-14
IPC分类号： H01L23/02
CPC分类号： H01L21/6835 , H01L21/568 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/20 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/97 , H01L2924/01029 , H01L2924/01033 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/351 , H01L2924/3511 , H01L2224/82 , H01L2924/00
摘要： A wafer level semiconductor package with a build-up layer is provided, which includes a glass frame having a through hole for receiving a semiconductor chip therein, a low-modulus buffer material filled within the space formed between the semiconductor chip and the glass frame, a build-up layer formed on the glass frame and the semiconductor chip such that the build-up layer is electrically connected to the semiconductor chip, and a plurality of conductive elements mounted on the build-up layer so that the semiconductor chip is electrically connected to external devices. With the use of the glass frame and low-modulus buffer material, the wafer level semiconductor package thus-obtained is free from warpage, chip-crack, and delamination problems and the reliability thereof is enhanced. A method for fabricating the wafer level semiconductor package is also provided.
摘要翻译： 提供具有积层的晶片级半导体封装，其包括具有用于接收其中的半导体芯片的通孔的玻璃框架，填充在形成在半导体芯片和玻璃框架之间的空间内的低模量缓冲材料， 形成在所述玻璃框架和所述半导体芯片上的堆积层，使得所述积层层电连接到所述半导体芯片，以及安装在所述积层层上的多个导电元件，使得所述半导体芯片电连接 到外部设备。 通过使用玻璃框架和低模量缓冲材料，由此获得的晶片级半导体封装没有翘曲，芯片裂纹和分层问题，并且其可靠性得到提高。 还提供了一种用于制造晶片级半导体封装的方法。
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32.发明授权公开(公告)号：US07005720B2
公开(公告)日：2006-02-28
申请号：US10763656
申请日：2004-01-23
CPC分类号： H01L31/0203 , H01L27/14618 , H01L2224/04042 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/15311 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor package with a photosensitive chip and a fabrication method thereof are provided. A substrate having a core is prepared. A solder mask layer is applied over a surface of the core and formed with an opening to expose a continuous peripheral portion on the surface of the core. At least one photosensitive chip is mounted on and electrically connected to the substrate. An encapsulation dam is formed on the continuous peripheral portion of the core and surrounds the chip. The dam includes a shoulder portion adjacent to and flush with the solder mask layer, and a protruded support portion surrounding the shoulder portion. A lid is attached to the support portion of the dam for sealing the dam such that the chip is received in a space defined by the substrate, the dam and the lid.
摘要翻译： 提供具有感光芯片的半导体封装及其制造方法。 制备具有芯的衬底。 将焊接掩模层施加在芯的表面上并形成有开口以暴露芯的表面上的连续周边部分。 至少一个感光芯片安装在基板上并与其电连接。 在芯的连续外围部分上形成封装坝，并围绕芯片。 大坝包括与焊料掩模层相邻并与其齐平的肩部，以及围绕肩部的突出的支撑部。 盖子附接到坝的支撑部分，用于密封坝，使得芯片被容纳在由基板，坝和盖子限定的空间中。
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33.发明申请Semiconductor package with build-up structure and method for fabricating the same 审中-公开具有积层结构的半导体封装及其制造方法公开(公告)号：US20050212129A1
公开(公告)日：2005-09-29
申请号：US10974293
申请日：2004-10-26
CPC分类号： H01L23/3128 , H01L23/5389 , H01L24/19 , H01L24/97 , H01L2224/24226 , H01L2224/24227 , H01L2224/92 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/01087 , H01L2924/12042 , H01L2924/15153 , H01L2924/15156 , H01L2924/1517 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2224/83 , H01L2224/82 , H01L2924/00
摘要： A semiconductor package with a build-up structure is provided, which includes a rigid base, a rigid frame having a through hole and fixed onto the rigid base, at least one chip received in the through hole of the rigid frame, a medium filled in a gap between the chip and the rigid frame, a build-up structure formed on the chip and the rigid frame and electrically connected to the chip, and a plurality of conductive elements bonded to the build-up structure to electrically connect the chip to external devices. The use of the rigid base and rigid frame can avoid structural warpage, cracking, delamination and a popcorn effect of the semiconductor package. A method for fabricating the semiconductor package is also provided.
摘要翻译： 提供具有积聚结构的半导体封装，其包括刚性基座，具有通孔并固定到刚性基座上的刚性框架，容纳在刚性框架的通孔中的至少一个芯片，填充在 芯片和刚性框架之间的间隙，形成在芯片上的积聚结构和刚性框架并电连接到芯片，以及多个导电元件，其结合到构建结构以将芯片电连接到外部 设备。 使用刚性基体和刚性框架可以避免半导体封装的结构翘曲，开裂，分层和爆米花效应。 还提供了制造半导体封装的方法。
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34.发明申请公开(公告)号：US20050161755A1
公开(公告)日：2005-07-28
申请号：US10763656
申请日：2004-01-23
IPC分类号： H01L27/146 , H01L31/0203
CPC分类号： H01L31/0203 , H01L27/14618 , H01L2224/04042 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/15311 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor package with a photosensitive chip and a fabrication method thereof are provided. A substrate having a core is prepared. A solder mask layer is applied over a surface of the core and formed with an opening to expose a continuous peripheral portion on the surface of the core. At least one photosensitive chip is mounted on and electrically connected to the substrate. An encapsulation dam is formed on the continuous peripheral portion of the core and surrounds the chip. The dam includes a shoulder portion adjacent to and flush with the solder mask layer, and a protruded support portion surrounding the shoulder portion. A lid is attached to the support portion of the dam for sealing the dam such that the chip is received in a space defined by the substrate, the dam and the lid.
摘要翻译： 提供具有感光芯片的半导体封装及其制造方法。 制备具有芯的衬底。 将焊接掩模层施加在芯的表面上并形成有开口以暴露芯的表面上的连续周边部分。 至少一个感光芯片安装在基板上并与其电连接。 在芯的连续外围部分上形成封装坝，并围绕芯片。 大坝包括与焊料掩模层相邻并与其齐平的肩部，以及围绕肩部的突出的支撑部。 盖子附接到坝的支撑部分，用于密封坝，使得芯片被容纳在由基板，坝和盖子限定的空间中。
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35.发明授权Method for fabricating chip scale package structure with metal pads exposed from an encapsulant 有权用于制造具有从密封剂暴露的金属焊盘的芯片级封装结构的方法公开(公告)号：US08058100B2
公开(公告)日：2011-11-15
申请号：US12788772
申请日：2010-05-27
申请人： Han-Ping Pu , Chien-Ping Huang , Cheng-Hsu Hsiao
发明人： Han-Ping Pu , Chien-Ping Huang , Cheng-Hsu Hsiao
IPC分类号： H01L21/60
CPC分类号： H01L21/561 , H01L21/568 , H01L23/3114 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/20 , H01L2224/97 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/18161 , H01L2924/18162 , H01L2924/351 , H01L2224/82 , H01L2924/00
摘要： A chip scale package structure and a method for fabricating the same are disclosed. The method includes forming metal pads on a predetermined part of a carrier; mounting chips on the carrier, each of the chips having a plurality of conductive bumps soldered to the metal pads; forming an encapsulant on the carrier to encapsulate the chips and the conductive bumps; removing the carrier to expose the metal pads and even the metal pads with a surface of the encapsulant; forming on the encapsulant a plurality of first conductive traces electrically connected to the metal pads; applying a solder mask on the first conductive traces, and forming a plurality of openings on the solder mask to expose a predetermined part of the first conductive traces; forming a plurality of conductive elements on the predetermined part; and cutting the encapsulant to form a plurality of chip scale package structures.
摘要翻译： 公开了一种芯片级封装结构及其制造方法。 该方法包括在载体的预定部分上形成金属垫; 在载体上安装芯片，每个芯片具有焊接到金属焊盘的多个导电凸块; 在载体上形成密封剂以封装芯片和导电凸块; 移除载体以暴露金属垫和甚至具有密封剂表面的金属垫; 在所述密封剂上形成电连接到所述金属焊盘的多个第一导电迹线; 在所述第一导电迹线上施加焊接掩模，以及在所述焊接掩模上形成多个开口以暴露所述第一导电迹线的预定部分; 在所述预定部分上形成多个导电元件; 以及切割所述密封剂以形成多个芯片级封装结构。
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公开(公告)号：US07993967B2
公开(公告)日：2011-08-09
申请号：US12616834
申请日：2009-11-12
申请人： Yih-Jenn Jiang , Han-Ping Pu , Chien-Ping Huang , Cheng-Hsu Hsiao
发明人： Yih-Jenn Jiang , Han-Ping Pu , Chien-Ping Huang , Cheng-Hsu Hsiao
CPC分类号： H01L23/3121 , H01L21/561 , H01L21/6835 , H01L24/48 , H01L24/97 , H01L2221/68345 , H01L2224/16 , H01L2224/48091 , H01L2224/48247 , H01L2224/97 , H01L2924/00011 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15747 , H01L2924/181 , H01L2924/18161 , H01L2924/351 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2224/0401 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package and a fabrication method are disclosed. The fabrication method includes applying a sacrificial layer on one surface of a metal carrier, applying an insulation layer on the sacrificial layer, and forming through holes in the sacrificial layer and the insulation layer to expose the metal carrier; forming a conductive metallic layer in each through hole; forming a patterned circuit layer on the insulation layer to be electrically connected to the conductive metallic layer; mounting at least a chip on the insulation layer and electrically connecting the chip to the patterned circuit layer; forming an encapsulant to encapsulate the chip and the patterned circuit layer; and removing the metal carrier and the sacrificial layer to expose the insulation layer and conductive metallic layer to allow the conductive metallic layer to protrude from the insulation layer. In the present invention, the distance between the semiconductor package and the external device is increased, and thermal stress caused by difference between the thermal expansion coefficients is reduced, so as to enhance the reliability of the product.
摘要翻译： 公开了半导体封装和制造方法。 制造方法包括在金属载体的一个表面上施加牺牲层，在牺牲层上施加绝缘层，以及在牺牲层和绝缘层中形成通孔以露出金属载体; 在每个通孔中形成导电金属层; 在所述绝缘层上形成图案化电路层，以电连接到所述导电金属层; 将至少一个芯片安装在所述绝缘层上并将所述芯片电连接到所述图案化电路层; 形成密封剂以封装所述芯片和所述图案化电路层; 并且去除金属载体和牺牲层以暴露绝缘层和导电金属层，以允许导电金属层从绝缘层突出。 在本发明中，半导体封装和外部器件之间的距离增加，由于热膨胀系数之差导致的热应力降低，从而提高了产品的可靠性。
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37.发明申请公开(公告)号：US20100151631A1
公开(公告)日：2010-06-17
申请号：US12710450
申请日：2010-02-23
申请人： Han-Ping Pu , Chien-Ping Huang , Cheng-Hsu Hsiao
发明人： Han-Ping Pu , Chien-Ping Huang , Cheng-Hsu Hsiao
IPC分类号： H01L21/60
CPC分类号： H01L23/473 , H01L21/563 , H01L23/3157 , H01L2224/16225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253
摘要： A semiconductor package with a heat dissipating device and a fabrication method of the semiconductor package are provided. A chip is mounted on a substrate. The heat dissipating device is mounted on the chip, and includes an accommodating room, and a first opening and a second opening that communicate with the accommodating room. An encapsulant is formed between the heat dissipating device and the substrate to encapsulate the chip. A cutting process is performed to remove a non-electrical part of structure and expose the first and second openings from the encapsulant. A cooling fluid is received in the accommodating room to absorb and dissipate heat produced by the chip. The heat dissipating device covers the encapsulant and the chip to provide a maximum heat transfer area for the semiconductor package.
摘要翻译： 提供了具有散热装置的半导体封装和半导体封装的制造方法。 芯片安装在基板上。 散热装置安装在芯片上，并且包括容纳室，以及与容纳室连通的第一开口和第二开口。 在散热装置和衬底之间形成密封剂以封装芯片。 执行切割处理以去除结构的非电气部分并且从密封剂暴露第一和第二开口。 冷却流体容纳在容纳室中以吸收和散发由芯片产生的热量。 散热装置覆盖密封剂和芯片，以为半导体封装提供最大的传热面积。
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38.发明授权公开(公告)号：US07671466B2
公开(公告)日：2010-03-02
申请号：US11647832
申请日：2006-12-29
申请人： Han-Ping Pu , Chien-Ping Huang , Cheng-Hsu Hsiao
发明人： Han-Ping Pu , Chien-Ping Huang , Cheng-Hsu Hsiao
CPC分类号： H01L23/473 , H01L21/563 , H01L23/3157 , H01L2224/16225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253
摘要： A semiconductor package with a heat dissipating device and a fabrication method of the semiconductor package are provided. A chip is mounted on a substrate. The heat dissipating device is mounted on the chip, and includes an accommodating room, and a first opening and a second opening that communicate with the accommodating room. An encapsulant is formed between the heat dissipating device and the substrate to encapsulate the chip. A cutting process is performed to remove a non-electrical part of structure and expose the first and second openings from the encapsulant. A cooling fluid is received in the accommodating room to absorb and dissipate heat produced by the chip. The heat dissipating device covers the encapsulant and the chip to provide a maximum heat transfer area for the semiconductor package.
摘要翻译： 提供了具有散热装置的半导体封装和半导体封装的制造方法。 芯片安装在基板上。 散热装置安装在芯片上，并且包括容纳室，以及与容纳室连通的第一开口和第二开口。 在散热装置和衬底之间形成密封剂以封装芯片。 执行切割处理以去除结构的非电气部分，并使第一和第二开口与密封剂暴露。 冷却流体容纳在容纳室中以吸收和散发由芯片产生的热量。 散热装置覆盖密封剂和芯片，以为半导体封装提供最大的传热面积。
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公开(公告)号：US20100041181A1
公开(公告)日：2010-02-18
申请号：US12567611
申请日：2009-09-25
申请人： Chien-Ping Huang , Cheng-Hsu Hsiao
发明人： Chien-Ping Huang , Cheng-Hsu Hsiao
IPC分类号： H01L21/78
CPC分类号： H01L23/3675 , H01L21/4871 , H01L21/50 , H01L21/561 , H01L21/6835 , H01L23/3107 , H01L23/3114 , H01L23/3677 , H01L23/4334 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/16225 , H01L2224/16245 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48247 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2224/85 , H01L2224/83 , H01L2224/92147 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; a heat spreader having a first surface, an opposed second surface and a hollow structure, the second surface of the heat spreader being mounted on the chip, wherein the chip is larger in size than the hollow structure such that the chip is partly exposed to the hollow structure; an encapsulant formed between the heat spreader and the chip carrier, for encapsulating the chip, wherein the first surface and sides of the heat spreader are exposed from the encapsulant to dissipate heat produced from the chip; and a plurality of conductive elements disposed on the chip carrier, for electrically connecting the chip to an external device. The present invention also provides a method for fabricating the heat dissipating package structure.
摘要翻译： 散热封装结构包括芯片载体; 安装并电连接到芯片载体的半导体芯片; 具有第一表面，相对的第二表面和中空结构的散热器，散热器的第二表面安装在芯片上，其中芯片的尺寸大于中空结构，使得芯片部分地暴露于 中空结构; 在散热器和芯片载体之间形成的用于封装芯片的密封剂，其中散热器的第一表面和侧面从密封剂暴露以散发从芯片产生的热量; 以及设置在芯片载体上的多个导电元件，用于将芯片电连接到外部设备。 本发明还提供一种制造散热封装结构的方法。
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公开(公告)号：US07615862B2
公开(公告)日：2009-11-10
申请号：US11161882
申请日：2005-08-19
申请人： Chien-Ping Huang , Cheng-Hsu Hsiao
发明人： Chien-Ping Huang , Cheng-Hsu Hsiao
CPC分类号： H01L23/3675 , H01L21/4871 , H01L21/50 , H01L21/561 , H01L21/6835 , H01L23/3107 , H01L23/3114 , H01L23/3677 , H01L23/4334 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/16225 , H01L2224/16245 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48247 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2224/85 , H01L2224/83 , H01L2224/92147 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; a heat spreader having a first surface, an opposed second surface and a hollow structure, the second surface of the heat spreader being mounted on the chip, wherein the chip is larger in size than the hollow structure such that the chip is partly exposed to the hollow structure; an encapsulant formed between the heat spreader and the chip carrier, for encapsulating the chip, wherein the first surface and sides of the heat spreader are exposed from the encapsulant to dissipate heat produced from the chip; and a plurality of conductive elements disposed on the chip carrier, for electrically connecting the chip to an external device. The present invention also provides a method for fabricating the heat dissipating package structure.
摘要翻译： 散热封装结构包括芯片载体; 安装并电连接到芯片载体的半导体芯片; 具有第一表面，相对的第二表面和中空结构的散热器，散热器的第二表面安装在芯片上，其中芯片的尺寸大于中空结构，使得芯片部分地暴露于 中空结构; 在散热器和芯片载体之间形成的用于封装芯片的密封剂，其中散热器的第一表面和侧面从密封剂暴露以散发从芯片产生的热量; 以及设置在芯片载体上的多个导电元件，用于将芯片电连接到外部设备。 本发明还提供一种制造散热封装结构的方法。
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