METHODS FOR FABRICATING SEMICONDUCTOR DEVICES
    32.
    发明申请
    METHODS FOR FABRICATING SEMICONDUCTOR DEVICES 有权
    制造半导体器件的方法

    公开(公告)号:US20100311242A1

    公开(公告)日:2010-12-09

    申请号:US12480232

    申请日:2009-06-08

    摘要: Methods are provided for fabricating a semiconductor device. One method comprises providing a first pattern having a first polygon, the first polygon having a first tonality and having a first side and a second side, the first side adjacent to a second polygon having a second tonality, and the second side adjacent to a third polygon having the second tonality, and forming a second pattern by reversing the tonality of the first pattern. The method further comprises forming a third pattern from the second pattern by converting the second polygon from the first tonality to the second tonality forming a fourth pattern from the second pattern by converting the third polygon from the first tonality to the second tonality forming a fifth pattern by reversing the tonality of the third pattern, and forming a sixth pattern by reversing the tonality of the fourth pattern.

    摘要翻译: 提供了制造半导体器件的方法。 一种方法包括提供具有第一多边形的第一图案,所述第一多边形具有第一音调并且具有第一侧和第二侧,所述第一侧邻近于具有第二音调的第二多边形,并且所述第二侧相邻于第三多边形 具有第二色调的多边形,并且通过反转第一图案的色调来形成第二图案。 该方法还包括通过从第二图案将第二多边形从第一图案转换成第二色调而将第二多边形从第一色调转换成第二色调以从第二图案转换成第二色调,从第二图案形成第三图案, 通过颠倒第三图案的音调,并通过反转第四图案的音调形成第六图案。

    Polarization measurement device and method
    33.
    发明授权
    Polarization measurement device and method 有权
    极化测量装置及方法

    公开(公告)号:US06784992B1

    公开(公告)日:2004-08-31

    申请号:US10383119

    申请日:2003-03-05

    IPC分类号: G01J400

    CPC分类号: G03F7/70566

    摘要: In one embodiment, a polarization measuring device comprises a light source, a reticle positioned below the light source, an opaque frame having a single aperture, the opaque frame positioned below the reticle, a lens positioned below the opaque frame, and a wafer having photoresist on its surface. The aperture of the frame allows no more than a first light ray to pass from the light source through the reticle and the lens onto a first surface point on the photoresist. The aperture of the frame also allows no more than a second light ray to pass from the light source through the reticle and the lens onto a second surface point on the photoresist. The degree of polarization of the light source can be determined from the first amount of light absorbed at the first surface point and the second amount of light absorbed at the second surface point.

    摘要翻译: 在一个实施例中,偏振测量装置包括光源,位于光源下方的光罩,具有单个孔的不透明框架,位于掩模版下方的不透明框架,位于不透明框架下方的透镜以及具有光致抗蚀剂的晶片 在其表面。 框架的孔径允许不超过第一光线从光源通过掩模版和透镜传递到光致抗蚀剂上的第一表面点上。 框架的孔径还允许不超过第二光线从光源通过掩模版和透镜传递到光致抗蚀剂上的第二表面点上。 可以从在第一表面点处吸收的第一光量和在第二表面点处吸收的第二光量确定光源的偏振度。

    Phase grating focus monitor using overlay technique
    34.
    发明授权
    Phase grating focus monitor using overlay technique 有权
    相位光栅聚焦监测器使用覆盖技术

    公开(公告)号:US06710853B1

    公开(公告)日:2004-03-23

    申请号:US09944795

    申请日:2001-08-31

    IPC分类号: G03B2752

    CPC分类号: G03F7/70633 G03F7/70641

    摘要: An optical tool includes a tool body that is transparent to light. Pluralities of parallel opaque lines on the body form a first outline in the shape of the square, and a second outline in the shape of a square which is centrally located relative to and within the first-mentioned square. Each pair of adjacent parallel lines has therebetween a first region that allows transmission of light therethrough without changing phase thereof, and a second region alongside the first region that allows transmission of light therethrough while shifting the phase thereof by 90°. The phase shifting and non-phase shifting regions are positioned so that the images of the outlines provided by a lens on an object shit in position a substantial amount as the distance between the lens and the object is changed.

    摘要翻译: 光学工具包括对光透明的工具主体。 身体上多条平行的不透明线条形成了正方形形状的第一轮廓,并且以相对于第一个提及的正方形中心定位的正方形形状的第二轮廓。 每对相邻的平行线之间具有允许透过其而不改变其相位的第一区域,以及沿着第一区域的第二区域,其允许透过光而使其相位偏移90°。 定位相移和非相移区域,使得当物体上的透镜提供的轮廓的图像在透镜和物体之间的距离改变时大量地位置处于位置。

    Method and system for providing source/drain-gate spatial overlap engineering for low-power devices
    36.
    发明授权
    Method and system for providing source/drain-gate spatial overlap engineering for low-power devices 有权
    为低功率器件提供源/漏 - 门空间重叠工程的方法和系统

    公开(公告)号:US06646326B1

    公开(公告)日:2003-11-11

    申请号:US09714361

    申请日:2000-11-15

    IPC分类号: H01L2906

    摘要: A method and system for providing a semiconductor device on a substrate are disclosed. The method and system include providing a tunneling barrier on the substrate and providing at least one gate on the tunneling barrier. The at least one of gate includes a first edge, a second edge and a base. The method and system further include providing a source and/or a drain for the at least one gate. The source and/or a drain are in proximity to the first edge or the first and second edges of the at least one gate. The at least one gate, the source and/or drain or both the at least one gate and the source and/or drain are configured such that source and/or drain do not substantially overlap the at least one gate at the base of the at least one gate.

    摘要翻译: 公开了一种在衬底上提供半导体器件的方法和系统。 该方法和系统包括在衬底上提供隧道势垒并在隧道势垒上提供至少一个栅极。 栅极中的至少一个包括第一边缘,第二边缘和基底。 所述方法和系统还包括为所述至少一个门提供源极和/或漏极。 源极和/或漏极位于至少一个栅极的第一边缘或第一和第二边缘附近。 所述至少一个栅极,源极和/或漏极或者至少一个栅极和源极和/或漏极都被构造成使得源极和/或漏极基本上不与位于所述源极和/或漏极的基极处的至少一个栅极重叠 至少一个门。

    Semiconductor devices having dielectric caps on contacts and related fabrication methods
    38.
    发明授权
    Semiconductor devices having dielectric caps on contacts and related fabrication methods 有权
    具有接触电介质盖的半导体器件和相关的制造方法

    公开(公告)号:US08765599B2

    公开(公告)日:2014-07-01

    申请号:US13345388

    申请日:2012-01-06

    IPC分类号: H01L21/4763 H01L21/768

    摘要: Fabrication methods for semiconductor device structures are provided. One method for fabricating a semiconductor device structure involves forming a first layer of a first dielectric material overlying a doped region formed in a semiconductor substrate, forming a first conductive contact electrically connected to the doped region within the first layer, forming a dielectric cap on the first conductive contact, forming a second layer of a second dielectric material overlying the dielectric cap and a gate structure overlying the semiconductor substrate, and forming a second conductive contact electrically connected to the gate structure within the second layer.

    摘要翻译: 提供半导体器件结构的制造方法。 制造半导体器件结构的一种方法包括形成覆盖形成在半导体衬底中的掺杂区域的第一介电材料的第一层,形成电连接到第一层内的掺杂区域的第一导电接触层, 第一导电接触,形成覆盖在电介质盖上的第二电介质材料的第二层和覆盖在半导体衬底上的栅极结构,以及形成电连接到第二层内的栅极结构的第二导电接触。

    Layout designs with via routing structures
    39.
    发明授权
    Layout designs with via routing structures 有权
    布局设计通过路由结构

    公开(公告)号:US08741763B2

    公开(公告)日:2014-06-03

    申请号:US13465129

    申请日:2012-05-07

    IPC分类号: H01L21/44 H01L23/528

    摘要: An approach for providing layout designs with via routing structures is disclosed. Embodiments include: providing a gate structure and a diffusion contact on a substrate; providing a gate contact on the gate structure; providing a metal routing structure that does not overlie a portion of the gate contact, the diffusion contact, or a combination thereof; and providing a via routing structure over the portion and under a part of the metal routing structure to couple the gate contact, the diffusion contact, or a combination thereof to the metal routing structure.

    摘要翻译: 公开了一种通过路由结构提供布局设计的方法。 实施例包括:在衬底上提供栅极结构和扩散接触; 在栅极结构上提供栅极接触; 提供不覆盖栅极接触部分,扩散接触部分或其组合的金属布线结构; 以及在金属布线结构的部分和一部分之下提供通孔布线结构以将栅极接触,扩散接触或其组合耦合到金属布线结构。