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70 条记录 (耗时 0.041 秒)

    Lithography mask utilizing asymmetric light source
    32.
    发明授权
    Lithography mask utilizing asymmetric light source 失效
    使用非对称光源的平版印刷掩模

    公开(公告)号：US07276328B1

    公开(公告)日：2007-10-02

    申请号：US10791259

    申请日：2004-03-02

    申请人： Cyrus E. Tabery ,  Bruno M. LaFontaine ,  Ivan Lavolic

    发明人： Cyrus E. Tabery ,  Bruno M. LaFontaine ,  Ivan Lavolic

    IPC分类号： G03F7/20

    CPC分类号： G03F7/70283 ,  G03F7/70066

    摘要： A method of reflective lithography includes directing an asymmetric radiation (light) beam onto a reticle of a reflective lithography system. The asymmetry in the shape of the radiation beam may be used to compensate for a non-zero (non-normal) angle of incidence of the incident radiation. The radiation source shape may be configured to produce a substantially-symmetric output from the reticle. The shape of the radiation source may be configurable by any of a variety of suitable methods, for example by use of a configurable reflective device such as a fly's eye mirror, or by use of one or more suitable mirrors, lenses, and/or slits.

    摘要翻译： 反射光刻的方法包括将不对称辐射（光）束引导到反射光刻系统的掩模版上。 辐射束形状的不对称性可用于补偿入射辐射的非零（非正常）入射角。 辐射源形状可以被配置为从掩模版产生基本上对称的输出。 辐射源的形状可以通过各种合适的方法中的任何一种来配置，例如通过使用可配置的反射装置，例如蝇眼镜，或通过使用一个或多个合适的反射镜，透镜和/或狭缝 。

    Low-temperature post-dopant activation process
    34.
    发明授权
    Low-temperature post-dopant activation process 有权
    低温后掺杂剂激活过程

    公开(公告)号：US06902966B2

    公开(公告)日：2005-06-07

    申请号：US09983625

    申请日：2001-10-25

    申请人： Bin Yu ,  Robert B. Ogle ,  Eric N. Paton ,  Cyrus E. Tabery ,  Qi Xiang

    发明人： Bin Yu ,  Robert B. Ogle ,  Eric N. Paton ,  Cyrus E. Tabery ,  Qi Xiang

    IPC分类号： H01L21/28 ,  H01L21/20 ,  H01L21/265 ,  H01L21/268 ,  H01L21/336 ,  H01L29/417 ,  H01L29/78 ,  H01L21/00

    CPC分类号： H01L29/665 ,  H01L21/268

    摘要： A method of manufacturing a MOSFET semiconductor device comprises forming a gate electrode over a substrate and a gate oxide between the gate electrode and the substrate; forming source/drain extensions in the substrate; forming first and second sidewall spacers; implanting dopants within the substrate to form source/drain regions in the substrate adjacent to the sidewalls spacers; laser thermal annealing to activate the source/drain regions; depositing a layer of nickel over the source/drain regions; and annealing to form a nickel silicide layer disposed on the source/drain regions. The source/drain extensions and sidewall spacers are adjacent to the gate electrode. The source/drain extensions can have a depth of about 50 to 300 angstroms, and the source/drain regions can have a depth of about 400 to 1000 angstroms. The annealing is at temperatures from about 350 to 500° C.

    摘要翻译： 一种制造MOSFET半导体器件的方法包括：在栅极电极和衬底之间形成衬底上的栅电极和栅极氧化物; 在衬底中形成源极/漏极延伸部; 形成第一和第二侧壁间隔物; 在所述衬底内注入掺杂剂以在所述衬底中邻近所述侧壁间隔物形成源/漏区; 激光热退火激活源/漏区; 在源极/漏极区域上沉积镍层; 并退火以形成设置在源/漏区上的硅化镍层。 源极/漏极延伸部和侧壁间隔物与栅电极相邻。 源极/漏极延伸部可以具有约50至300埃的深度，并且源极/漏极区域可以具有约400至1000埃的深度。 退火温度在约350-500℃

    Polysilicon tilting to prevent geometry effects during laser thermal annealing
    36.
    发明授权
    Polysilicon tilting to prevent geometry effects during laser thermal annealing 失效
    多晶硅瓷砖，以防止激光热退火过程中的几何效应

    公开(公告)号：US06867080B1

    公开(公告)日：2005-03-15

    申请号：US10460165

    申请日：2003-06-13

    申请人： Eric N. Paton ,  Robert B. Ogle ,  Cyrus E. Tabery ,  Qi Xiang ,  Bin Yu

    发明人： Eric N. Paton ,  Robert B. Ogle ,  Cyrus E. Tabery ,  Qi Xiang ,  Bin Yu

    IPC分类号： H01L21/20 ,  H01L21/268 ,  H01L21/28 ,  H01L21/321 ,  H01L21/8234 ,  H01L21/338 ,  H01L21/331 ,  H01L21/94

    CPC分类号： H01L21/28176 ,  H01L21/2026 ,  H01L21/268 ,  H01L21/28035 ,  H01L21/321 ,  H01L21/823437 ,  Y10S438/926

    摘要： A method is provided for eliminating uneven heating of substrate active areas during laser thermal annealing (LTA) due to variations in gate electrode density. Embodiments include adding dummy structures, formed simultaneously with the gate electrodes, to “fill in” the spaces between isolated gate electrodes, such that the spacing between the gate electrodes and the dummy structures is the same as the spacing between the densest array of device structures on the substrate surface. Since the surface features (i.e., the gate electrodes and the dummy structures) appear substantially uniform to the LTA laser, the laser radiation is uniformly absorbed by the substrate, and the substrate surface is evenly heated.

    摘要翻译： 提供了一种用于消除激光热退火（LTA）期间基板有源区的不均匀加热的方法，这是由于栅电极密度的变化。 实施例包括添加与栅电极同时形成的虚拟结构以“填充”隔离栅电极之间的空间，使得栅电极和虚拟结构之间的间隔与器件结构最密集阵列之间的间隔相同 在基板表面上。 由于表面特征（即，栅电极和虚拟结构）对于LTA激光器而言基本上均匀，激光辐射被基板均匀地吸收，并且基板表面被均匀地加热。

    Post silicide laser thermal annealing to avoid dopant deactivation
    38.
    发明授权
    Post silicide laser thermal annealing to avoid dopant deactivation 有权
    后硅化物激光热退火以避免掺杂剂失活

    公开(公告)号：US06825115B1

    公开(公告)日：2004-11-30

    申请号：US10341436

    申请日：2003-01-14

    申请人： Qi Xiang ,  Robert B. Ogle ,  Eric N. Paton ,  Cyrus E. Tabery ,  Bin Yu

    发明人： Qi Xiang ,  Robert B. Ogle ,  Eric N. Paton ,  Cyrus E. Tabery ,  Bin Yu

    IPC分类号： H01L2144

    CPC分类号： H01L29/6659 ,  H01L21/26506 ,  H01L21/268 ,  H01L21/28518 ,  H01L29/665

    摘要： Dopant deactivation, particularly at the Si/silicide interface, is avoided by forming deep source/drain implants after forming silicide layers on the substrate and activating the source/drain regions by laser thermal annealing. Embodiments include forming source/drain extensions, forming metal silicide layers on the substrate surface and gate electrode, forming preamorphized regions under the metal silicide layers in the substrate, ion implanting to form deep source/drain implants overlapping the preamorphized regions and extending deeper into the substrate then the preamorphized regions, and laser thermal annealing to activate the deep source/drain regions.

    摘要翻译： 通过在衬底上形成硅化物层并通过激光热退火来激活源极/漏极区域之后形成深源极/漏极注入来避免掺杂失活，特别是Si /硅化物界面。 实施例包括形成源极/漏极延伸部，在衬底表面上形成金属硅化物层和栅电极，在衬底中的金属硅化物层下方形成预变形区域;离子注入，以形成与预变形区域重叠的深源/漏植入物， 衬底然后是前变形区域，激光热退火激活深源/漏区。

    Low nisi/si interface contact resistance with preamorphizing and laser thermal annealing
    39.
    发明授权
    Low nisi/si interface contact resistance with preamorphizing and laser thermal annealing 失效
    低nisi / si界面接触电阻与预变形和激光热退火

    公开(公告)号：US06746944B1

    公开(公告)日：2004-06-08

    申请号：US10341345

    申请日：2003-01-14

    申请人： Qi Xiang ,  Robert B. Ogle ,  Eric N. Paton ,  Cyrus E. Tabery ,  Bin Yu

    发明人： Qi Xiang ,  Robert B. Ogle ,  Eric N. Paton ,  Cyrus E. Tabery ,  Bin Yu

    IPC分类号： H01L213205

    CPC分类号： H01L29/6659 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/268 ,  H01L21/28518 ,  H01L29/665 ,  H01L29/7833

    摘要： Semiconductor devices with reduced NiSi/Si interface contact resistance are fabricated by forming preamorphized regions in a substrate at a depth overlapping the subsequently formed NiSi/Si interface, ion implanting impurities to form deep source/drain implants overlapping the preamorphized regions deeper in the substrate and laser thermal annealing to activate the deep source/drain regions. Nickel silicide layers are then formed in a main surface of the substrate and on the gate electrode. Embodiments include forming deep source/drain regions with an activated impurity concentration of 1×1020 to 1×1021 atoms/cm3 at the NiSi/Si interface.

    摘要翻译： 具有降低的NiSi / Si界面接触电阻的半导体器件通过在与随后形成的NiSi / Si界面重叠的深度的衬底中形成预变形区域，离子注入杂质以形成与衬底中较深的预变形区域重叠的深源/漏注入; 激光热退火激活深源/漏区。 然后在衬底的主表面和栅电极上形成硅化镍层。 实施例包括在NiSi / Si界面处形成具有1×10 20至1×10 21原子/ cm 3的活化杂质浓度的深源/漏区。