公开(公告)号：US08507303B2

公开(公告)日：2013-08-13

申请号：US12699764

申请日：2010-02-03

申请人： Hong-Sick Park

发明人： Hong-Sick Park

IPC分类号： H01L21/336

CPC分类号： H01L27/12 ,  H01L27/124 ,  H01L51/5228

摘要： The present invention provides a thin film transistor array panel including an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer wherein the drain electrode faces the source electrode with a gap therebetween, and a pixel electrode connected to the drain electrode. At least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a conductive oxide and a second conductive layer of Ag that is deposited adjacent to the first conductive layer.

摘要翻译： 本发明提供一种薄膜晶体管阵列面板，其包括绝缘基板，形成在绝缘基板上的栅极线，形成在栅极线上的栅极绝缘层，漏极电极和数据线，该栅极绝缘层上形成有栅极绝缘 层，其中漏电极面对源电极，其间具有间隙，以及连接到漏电极的像素电极。 栅极线，数据线和漏电极中的至少一个包括由导电氧化物制成的第一导电层和与第一导电层相邻沉积的Ag的第二导电层。

公开(公告)号：US08262928B2

公开(公告)日：2012-09-11

申请号：US12777532

申请日：2010-05-11

申请人： Bong-Kyun Kim ,  Jong-Hyun Choung ,  Byeong-Jin Lee ,  Sun-Young Hong ,  Hong-Sick Park ,  Shi-Yul Kim ,  Ki-Beom Lee ,  Sam-Young Cho ,  Sang-Woo Kim ,  Hyun-Cheol Shin ,  Won-Guk Seo

发明人： Bong-Kyun Kim ,  Jong-Hyun Choung ,  Byeong-Jin Lee ,  Sun-Young Hong ,  Hong-Sick Park ,  Shi-Yul Kim ,  Ki-Beom Lee ,  Sam-Young Cho ,  Sang-Woo Kim ,  Hyun-Cheol Shin ,  Won-Guk Seo

IPC分类号： H01L33/44 ,  C09K13/08

CPC分类号： C23F1/26 ,  C23F1/18 ,  H01L21/32134 ,  H01L27/124 ,  H01L29/458

摘要： An etchant includes about 0.1 percent by weight to about 30 percent by weight of ammonium persulfate (NH4)2S2O8, about 0.1 percent by weight to about 10 percent by weight of an inorganic acid, about 0.1 percent by weight to about 10 percent by weight of an acetate salt, about 0.01 percent by weight to about 5 percent by weight of a fluorine-containing compound, about 0.01 percent by weight to about 5 percent by weight of a sulfonic acid compound, about 0.01 percent by weight to about 2 percent by weight of an azole compound, and a remainder of water. Accordingly, the etchant may have high stability to maintain etching ability. Thus, manufacturing margins may be improved so that manufacturing costs may be reduced.

摘要翻译： 蚀刻剂包括约0.1重量％至约30重量％的过硫酸铵（NH 4）2 S 2 O 8，约0.1重量％至约10重量％的无机酸，约0.1重量％至约10重量％的 约0.01重量％至约5重量％的含氟化合物的乙酸盐，约0.01重量％至约5重量％的磺酸化合物，约0.01重量％至约2重量％ 的唑类化合物，剩余的水。 因此，蚀刻剂可能具有高稳定性以保持蚀刻能力。 因此，可以提高制造裕度，从而可以降低制造成本。

公开(公告)号：US20120133873A1

公开(公告)日：2012-05-31

申请号：US13193488

申请日：2011-07-28

申请人： Ji-Young PARK ,  Sang Gab Kim ,  Yong-Mo Choi ,  Hyung Jun Kim ,  Sung-Haeng Cho ,  Hong-Sick Park ,  Byeong-Jin Lee ,  Soo-Wan Yoon

发明人： Ji-Young PARK ,  Sang Gab Kim ,  Yong-Mo Choi ,  Hyung Jun Kim ,  Sung-Haeng Cho ,  Hong-Sick Park ,  Byeong-Jin Lee ,  Soo-Wan Yoon

IPC分类号： G02F1/1333 ,  H01L33/16

CPC分类号： H01L27/1288 ,  G02F1/1362 ,  G02F2001/136231 ,  H01L29/41733

摘要： A method of manufacturing a liquid crystal display includes: forming a gate line including a gate electrode on a first substrate; forming a gate insulating layer on the gate line; sequentially forming a semiconductor layer, an amorphous silicon layer, and a data metal layer on the entire surface of the gate insulating layer; aligning the edges of the semiconductor layer and the data metal layer; forming a transparent conductive layer on the gate insulating layer and the data metal layer; forming a first pixel electrode and a second pixel electrode by patterning the transparent conductive layer; and forming a data line including a source electrode, a drain electrode, and an ohmic contact layer by etching the data metal layer and the amorphous silicon layer, using the first pixel electrode and the second pixel electrode as a mask, and exposing the semiconductor between the source electrode and the drain electrode.

摘要翻译： 制造液晶显示器的方法包括：在第一基板上形成包括栅电极的栅极线; 在栅极线上形成栅极绝缘层; 在栅极绝缘层的整个表面上依次形成半导体层，非晶硅层和数据金属层; 对准半导体层和数据金属层的边缘; 在栅绝缘层和数据金属层上形成透明导电层; 通过图案化透明导电层形成第一像素电极和第二像素电极; 以及使用所述第一像素电极和所述第二像素电极作为掩模，通过蚀刻所述数据金属层和所述非晶硅层来形成包括源电极，漏电极和欧姆接触层的数据线，并且使所述半导体在 源电极和漏电极。

公开(公告)号：US20110256485A1

公开(公告)日：2011-10-20

申请号：US13167587

申请日：2011-06-23

申请人： Bong-Kyun KIM ,  Hong-Sick Park ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Ji-Sun Lee ,  Byeong-Jin Lee ,  Kui-Jong Baek ,  Tai-Hyung Rhee ,  Yong-Sung Song

发明人： Bong-Kyun KIM ,  Hong-Sick Park ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Ji-Sun Lee ,  Byeong-Jin Lee ,  Kui-Jong Baek ,  Tai-Hyung Rhee ,  Yong-Sung Song

IPC分类号： G03F7/20 ,  H01L33/62

CPC分类号： C09K13/06 ,  H01L29/458 ,  H01L29/4908

摘要： An etchant composition that allows simplification and optimization of semiconductor manufacturing process is presented, along with a method of patterning a conductive layer using the etchant and a method of manufacturing a flat panel display using the etchant. The etchant includes nitric acid, phosphoric acid, acetic acid, and an acetate compound in addition to water.

摘要翻译： 提出了允许半导体制造工艺的简化和优化的蚀刻剂组合物，以及使用蚀刻剂图案化导电层的方法和使用蚀刻剂制造平板显示器的方法。 除了水之外，蚀刻剂包括硝酸，磷酸，乙酸和乙酸酯化合物。

公开(公告)号：US07985982B2

公开(公告)日：2011-07-26

申请号：US12391976

申请日：2009-02-24

申请人： Bong-Kyun Kim ,  Hong-Sick Park ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Ji-Sun Lee ,  Byeong-Jin Lee ,  Kui-Jong Baek ,  Tai-Hyung Rhee ,  Yong-Sung Song

发明人： Bong-Kyun Kim ,  Hong-Sick Park ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Ji-Sun Lee ,  Byeong-Jin Lee ,  Kui-Jong Baek ,  Tai-Hyung Rhee ,  Yong-Sung Song

IPC分类号： H01L21/84

CPC分类号： C09K13/06 ,  H01L29/458 ,  H01L29/4908

摘要： An etchant composition that allows simplification and optimization of semiconductor manufacturing process is presented, along with a method of patterning a conductive layer using the etchant and a method of manufacturing a flat panel display using the etchant. The etchant includes nitric acid, phosphoric acid, acetic acid, and an acetate compound in addition to water.

摘要翻译： 提出了允许半导体制造工艺的简化和优化的蚀刻剂组合物，以及使用蚀刻剂图案化导电层的方法和使用蚀刻剂制造平板显示器的方法。 除了水之外，蚀刻剂包括硝酸，磷酸，乙酸和乙酸酯化合物。

公开(公告)号：US07821009B2

公开(公告)日：2010-10-26

申请号：US11239795

申请日：2005-09-29

申请人： Hong-Sick Park

发明人： Hong-Sick Park

IPC分类号： H01L27/14 ,  H01L29/43

CPC分类号： H01L27/12 ,  H01L27/124 ,  H01L51/5228

摘要： A thin film transistor array panel includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer wherein the drain electrode faces the source electrode with a gap therebetween, and a pixel electrode connected to the drain electrode. At least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a conductive oxide and a second conductive layer of Ag that is deposited adjacent to the first conductive layer.

摘要翻译： 薄膜晶体管阵列面板包括绝缘基板，形成在绝缘基板上的栅极线，形成在栅极线上的栅极绝缘层，漏极电极和形成在栅极绝缘层上的源电极的数据线，其中漏极 电极面对源极，其间具有间隙，以及连接到漏电极的像素电极。 栅极线，数据线和漏电极中的至少一个包括由导电氧化物制成的第一导电层和与第一导电层相邻沉积的Ag的第二导电层。

公开(公告)号：US07638800B2

公开(公告)日：2009-12-29

申请号：US10501597

申请日：2002-07-29

申请人： Seung-Hee Yu ,  Mun-Pyo Hong ,  Soo-Guy Rho ,  Nam-Seok Rho ,  Keun-Kyu Song ,  Hee-Hwan Choe ,  Bo-Sung Kim ,  Sang-Gab Kim ,  Sung-Chul Kang ,  Hong-Sick Park

发明人： Seung-Hee Yu ,  Mun-Pyo Hong ,  Soo-Guy Rho ,  Nam-Seok Rho ,  Keun-Kyu Song ,  Hee-Hwan Choe ,  Bo-Sung Kim ,  Sang-Gab Kim ,  Sung-Chul Kang ,  Hong-Sick Park

IPC分类号： H01L21/84

CPC分类号： G02F1/136286 ,  G02F2001/136295

摘要： First, a Cr film and a CrOx film are deposited and patterned using an etchant including 8-12% Ce(NH4)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a gate wire including a plurality of gate lines, a plurality of gate electrodes and a plurality of gate pads. Next, a gate insulating film, a semiconductor layer and an ohmic contact layer are formed in sequence. A Cr film and CrOx film are deposited in sequence and patterned using an etchant including 8-12% Ce(NH4)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a data wire including a plurality of data lines, a plurality of source electrodes, a plurality of drain electrodes and a plurality of data pads. A passivation layer is deposited and patterned to form a plurality of contact holes respectively exposing the drain electrodes, the gate pads and the data pads. A transparent conductive material or a reflective conductive material is deposited and patterned to form a plurality of pixel electrodes, a plurality of subsidiary gate pads and a plurality of subsidiary data pads electrically connected to the drain electrodes, the gate pads and the data pads, respectively. The gate lines and the data lines with low reflectance are used as a light-blocking film for blocking the light leakage between the pixel areas, and do not increase the black brightness. Accordingly, a separate black matrix need not be provided on the color filter panel, thereby securing both aperture ratio of the pixel and high contrast ratio.

摘要翻译： 首先，使用包括8-12％Ce（NH 4）2（NO 3）6，10-20％NH 3和剩余的超纯水的蚀刻剂沉积和图案化Cr膜和CrOx膜，以形成包括多个 栅极线，多个栅电极和多个栅极焊盘。 接下来，依次形成栅极绝缘膜，半导体层和欧姆接触层。 依次沉积Cr膜和CrOx膜，并使用包括8-12％Ce（NH 4）2（NO 3）6，10-20％NH 3和剩余的超纯水的蚀刻剂进行图案化以形成包括多个数据的数据线 线，多个源电极，多个漏电极和多个数据焊盘。 钝化层被沉积并图案化以形成分别暴露漏电极，栅极焊盘和数据焊盘的多个接触孔。 沉积透明导电材料或反射导电材料以形成多个像素电极，分别与漏电极，栅极焊盘和数据焊盘电连接的多个辅助栅极焊盘和多个辅助数据焊盘 。 栅极线和低反射率的数据线被用作阻挡像素区域之间的漏光的遮光膜，并且不增加黑色亮度。 因此，不需要在滤色器面板上设置单独的黑矩阵，从而确保像素的开口率和高对比度。

公开(公告)号：US20090130789A1

公开(公告)日：2009-05-21

申请号：US12269603

申请日：2008-11-12

申请人： Hong-Sick Park ,  Shi-Yul Kim

发明人： Hong-Sick Park ,  Shi-Yul Kim

IPC分类号： H01L33/00

CPC分类号： H01L29/4908 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458

摘要： A thin film transistor (TFT) array panel with signal lines that have low resistivity is presented. The TFT array panel includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode facing the source electrode with a gap, and a pixel electrode connected to the drain electrode. In one embodiment, at least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a Mo-containing conductor, a second conductive layer made of a Cu-containing conductor, and a third conductive layer made of a MoN-containing conductor.

摘要翻译： 提出了具有低电阻率的信号线的薄膜晶体管（TFT）阵列面板。 TFT阵列面板包括绝缘基板，形成在绝缘基板上的栅极线，形成在栅极线上的栅极绝缘层，漏极电极和形成在栅极绝缘层上的源电极的数据线， 具有间隙的源电极和连接到漏电极的像素电极。 在一个实施例中，栅极线，数据线和漏电极中的至少一个包括由含Mo导体制成的第一导电层，由含Cu导体制成的第二导电层和第三导电层 由含MoN的导体制成。

公开(公告)号：US20090017574A1

公开(公告)日：2009-01-15

申请号：US12146763

申请日：2008-06-26

申请人： Sang-Gab Kim ,  Shi-Yul Kim ,  Hong-Sick Park ,  Hee-Hwan Choe ,  Hong-Kee Chin ,  Min-Seok Oh

发明人： Sang-Gab Kim ,  Shi-Yul Kim ,  Hong-Sick Park ,  Hee-Hwan Choe ,  Hong-Kee Chin ,  Min-Seok Oh

IPC分类号： H01L21/336 ,  H01L33/00

CPC分类号： H01L29/66765 ,  G02F1/1368 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458

摘要： A thin film transistor includes a gate electrode on a substrate, a gate insulating layer on the substrate, a channel pattern, a source electrode and a drain electrode. The channel pattern includes a semiconductor pattern formed on the gate electrode and overlaying the gate electrode as well as first and second conductive adhesive patterns formed on the semiconductor pattern and spaced apart from each other. The source electrode includes a first barrier pattern, a source pattern and a first capping pattern sequentially formed on the first conductive adhesive pattern. The drain electrode includes a second barrier pattern, a drain pattern and a second capping pattern sequentially formed on the second conductive adhesive pattern. Etched portions of the first and second conductive adhesive patterns have a substantially vertical profile to prevent the exposure of the source and drain electrodes, thereby improving the characteristics of the thin film transistor.

摘要翻译： 薄膜晶体管包括衬底上的栅电极，衬底上的栅极绝缘层，沟道图案，源电极和漏电极。 沟道图案包括形成在栅电极上并覆盖栅电极的半导体图案以及形成在半导体图案上并彼此间隔开的第一和第二导电粘合剂图案。 源电极包括顺序地形成在第一导电粘合剂图案上的第一阻挡图案，源图案和第一封盖图案。 漏电极包括顺序地形成在第二导电粘合剂图案上的第二阻挡图案，漏极图案和第二封盖图案。 第一和第二导电粘合剂图案的蚀刻部分具有基本垂直的轮廓，以防止源极和漏极的暴露，从而改善薄膜晶体管的特性。

公开(公告)号：US20080224093A1

公开(公告)日：2008-09-18

申请号：US12106023

申请日：2008-04-18

申请人： Hong-Sick Park ,  Hong-Je Cho ,  Sung-Chul Kang ,  Pong-Ok Park ,  An-Na Park

发明人： Hong-Sick Park ,  Hong-Je Cho ,  Sung-Chul Kang ,  Pong-Ok Park ,  An-Na Park

IPC分类号： C09K13/06

CPC分类号： H01L21/32134 ,  C23F1/20 ,  C23F1/26 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/4908

摘要： Gate lines including a lower Al—Nd layer and an upper MoW layer, data lines including a MoW layer, and pixel electrodes including an IZO layer are patterned using a single etchant. The etchant contains a phosphoric acid of about 50-60%, a nitric acid of about 6-10%, an acetic acid of about 15-25%, a stabilizer of about 2-5% stabilizer, and deionized water. The stabilizer includes oxy-hydride inorganic acid represented by M(OH)xLy, where M includes at least one of Zn, Sn, Cr, Al, Ba, Fe, Ti, Si and B, L includes at least one of H2O, NH3, CN and NH2R (where R is alkyl group), X is 2 or 3, and Y is 0, 1, 2 or 3.

摘要翻译： 使用单个蚀刻剂对包括下Al-Nd层和上MoW层的栅极线，包括MoW层的数据线和包括IZO层的像素电极进行图案化。 蚀刻剂含有约50-60％的磷酸，约6-10％的硝酸，约15-25％的乙酸，约2-5％的稳定剂的稳定剂和去离子水。 稳定剂包括由M（OH）x L L y Y表示的氢氧化物无机酸，其中M包括Zn，Sn，Cr，Al，Ba，Fe ，Ti，Si和B，L包括H 2 O，NH 3，CN和NH 2 R中的至少一个（其中R是 烷基），X为2或3，Y为0,1,2或3。