摘要:
The invention is directed to an improved eFUSE that prevent rupturing of the fuse link, reduces current through the fuse link, and optimizes electromigration through the fuse link through the use of a feedback circuit.
摘要:
A semiconductor device includes: an e-fuse gate, a floating pattern between the e-fuse gate and an e-fuse active portion, a blocking dielectric pattern between the floating pattern and the e-fuse gate, and an e-fuse dielectric layer between the floating pattern and the e-fuse active portion. The floating pattern includes a first portion between the e-fuse gate and the e-fuse active portion and a pair of second portions extended upward along both sidewalls of the e-fuse gate from both edges of the first portion.
摘要:
According to example embodiments, a solar cell includes a first unit portion, a second unit portion, and an insulating layer. The first and second unit portions may have different bandgaps, and the insulating layer may be between the first unit portion and the second unit portion.
摘要:
An e-fuse structure and method has an anode; a fuse link (a first end of the fuse link is connected to the anode); a cathode (a second end of the fuse link opposite the first end is connected to the cathode); and a silicide layer on the fuse link. The silicide layer has a first silicide region adjacent the anode and a second silicide region adjacent the cathode. The second silicide region comprises an impurity not contained within the first silicide region. Further, the first silicide region is thinner than the second silicide region.
摘要:
A fuse structure includes a non-planar fuse material layer typically located over and replicating a topographic feature within a substrate. The non-planar fuse material layer includes an angular bend that assists in providing a lower severance current within the non-planar fuse material layer.
摘要:
The present invention provides an electrical fuse structure for achieving a post-programming resistance distribution with higher resistance values and to enhance the reliability of electrical fuse programming. A partly doped electrical fuse structure with undoped semiconductor material in the cathode combined with P-doped semiconductor material in the fuselink and anode is disclosed and the data supporting the superior performance of the disclosed electrical fuse is shown.
摘要:
A capacitor having a suitably large value for decoupling applications is formed in a trench defined by isolation structures such as recessed isolation or shallow trench isolation. The capacitor provides a contact area coextensive with an active area and can be reliably formed individually or in small numbers. Plate contacts are preferably made through implanted regions extending to or between dopant diffused regions forming a capacitor plate. The capacitor can be formed by a process subsequent to formation of isolation structures such that preferred soft mask processes can be used to form the isolation structures and process commonality and compatibility constraint are avoided while the capacitor forming processes can be performed in common with processing for other structures.
摘要:
An electrically programmable fuse is provided which includes a cathode, an anode, and a fuse link conductively connecting the cathode to the anode. The cathode, the anode and the fuse link each have a length in a direction of current between the anode and cathode. Each of the cathode, the anode and the fuse link also has a width in a direction transverse to the respective length. At a cathode junction where the cathode meets the fuse link, the width of the fuse link decreases substantially and abruptly relative to the width of the cathode. The width of the fuse link increases only gradually in a direction towards an anode junction where the fuse link meets the anode.
摘要:
A novel trench-type decoupling capacitor structure and low-cost manufacturing process to create trench decoupling capacitors (decaps). In a unique aspect, the invention necessitates the addition of only a simplified trench to a base logic design.
摘要:
A novel trench-type decoupling capacitor structure and low-cost manufacturing process to create trench decoupling capacitors (decaps). In a unique aspect, the invention necessitates the addition of only a simplified trench to a base logic design.