Programmable circuit components with recursive architecture

    公开(公告)号:US09692420B2

    公开(公告)日:2017-06-27

    申请号:US15339617

    申请日:2016-10-31

    Abstract: A circuit component that is adjustable at run time and a method of designing the circuit are disclosed. The component contains a hierarchy of recursive levels in which a bottom level is a compound element made from two connected simple elements, and each higher level contains two compound elements connected in the same fashion. The described circuit allows for a large number of available values of the component value to be arranged in a logarithmic fashion rather than a linear one as in the prior art, thus generally reducing errors between any desired value for the component and the available values. In addition, such compound elements reduce the power dissipated by the analog element and the susceptibility to noise as compared to prior art adjustable components without adversely affecting the overall gain of the circuit.

    Data Input on Audio Device Analog Output Port
    35.
    发明申请
    Data Input on Audio Device Analog Output Port 有权
    音频设备上的数据输入模拟输出端口

    公开(公告)号:US20160119710A1

    公开(公告)日:2016-04-28

    申请号:US14920791

    申请日:2015-10-22

    CPC classification number: H04R1/1041 H04M1/6058 H04R5/04 H04R2420/09

    Abstract: An apparatus is disclosed for inputting digital data on the output channel(s) of an audio subsystem in an audio device, without interfering with normal operation of the audio subsystem. The described circuit includes a resistive element in parallel with the expected load device, such as a headphone or speaker. The resistive element receives a modulated digital signal from a data source or a switch, and the instantaneous current through the resistive element due to the modulated digital signal is reflected in a current feedback mechanism of the audio subsystem. Demodulation logic retrieves the digital signal from the current measured by the current feedback mechanism. A capacitor is provided to prevent the current in the resistive element from the digital signal from impacting the average DC current that the feedback mechanism uses to evaluate the load device.

    Abstract translation: 公开了一种用于在音频设备中的音频子系统的输出通道上输入数字数据而不干扰音频子系统的正常操作的装置。 所描述的电路包括与期望的负载装置(例如耳机或扬声器)并联的电阻元件。 电阻元件从数据源或开关接收调制的数字信号,并且由于调制的数字信号引起的通过电阻元件的瞬时电流被反映在音频子系统的电流反馈机制中。 解调逻辑从当前反馈机制测量的电流中检索数字信号。 提供电容器以防止电阻元件中的电流数字信号影响反馈机构用于评估负载装置的平均DC电流。

    System and method for series and parallel combinations of electrical elements
    36.
    发明授权
    System and method for series and parallel combinations of electrical elements 有权
    电气元件串联和并联组合的系统和方法

    公开(公告)号:US09098663B2

    公开(公告)日:2015-08-04

    申请号:US14446780

    申请日:2014-07-30

    CPC classification number: G06F17/5045 G06F17/5063 G06F2217/02 G06F2217/06

    Abstract: A method and system for generating and matching complex series and/or parallel combinations of nominally identical initial elements to achieve an arbitrary compound value is disclosed. A recursive algorithm successively adds one or more similar nominal two-terminal elements to generate a series and/or parallel compound combination of nominal elements, the compound combination having a desired impedance. The compound value, and thus the ratio between two compound values, can be determined to almost any desired degree of accuracy, with potential errors greatly reduced from those typical in the construction of individual elements of different values. Since the initial elements are nominally identical, the compound value, and the ratio between values, depends primarily upon the connections of the initial elements, rather than their geometry, and thus remain virtually constant regardless of variations in the manufacturing process.

    Abstract translation: 公开了一种用于产生和匹配名义上相同的初始元素以实现任意化合物值的复杂串联和/或并联组合的方法和系统。 递归算法连续地添加一个或多个相似的标称两端元件以产生具有期望阻抗的复合组合的标称元件的串联和/或并联复合组合。 可以将化合物值以及因此两个化合物值之间的比率确定为几乎任何所需的准确度,其中潜在误差比在不同值的各个元素的构造中典型地降低。 由于初始元素名义上相同,所以化合物值和值之间的比例主要取决于初始元素的连接而不是其几何形状,并且因此保持实质上恒定,而与制造过程中的变化无关。

    FIR filter using unclocked delay elements
    37.
    发明授权
    FIR filter using unclocked delay elements 有权
    FIR滤波器使用非锁定延迟元件

    公开(公告)号:US08937991B2

    公开(公告)日:2015-01-20

    申请号:US14055785

    申请日:2013-10-16

    CPC classification number: H04L25/4902 H03H17/0213 H03H17/06

    Abstract: A system and method for filtering an analog signal with a finite impulse response (FIR) filter that does not require analog delay elements are disclosed. An analog signal is pulse-width encoded, and the pulse-width encoded signal passed to a delay line comprising unclocked delay elements, such as logic gates, rather than clocked delay elements such as are used in conventional FIR filters. The propagation of the input signal is thus due only to the delay inherent in each gate, and occurs based upon when a signal reaches the gate rather than being caused by a clock signal. As with a conventional FIR filter, weighting elements having impedance are used to weigh the output of each delay element, and the resulting outputs summed to obtain a filtered output signal. For certain signals, such a circuit and method provides a simpler way of filtering than conventional filters.

    Abstract translation: 公开了一种使用不需要模拟延迟元件的有限脉冲响应(FIR)滤波器对模拟信号进行滤波的系统和方法。 模拟信号被脉冲宽度编码,并且脉冲宽度编码信号传递到包括诸如逻辑门之类的非锁定延迟元件的延迟线,而不是例如在常规FIR滤波器中使用的定时延迟元件。 因此,输入信号的传播仅由于每个栅极固有的延迟而发生,并且基于何时信号到达门而不是由时钟信号引起。 与常规FIR滤波器一样,具有阻抗的加权元件用于称量每个延迟元件的输出,并且所得到的输出相加以获得经滤波的输出信号。 对于某些信号,这种电路和方法提供比常规滤波器更简单的滤波方式。

    Feedback in noise shaping control loop
    38.
    发明授权
    Feedback in noise shaping control loop 失效
    噪声整形控制回路中的反馈

    公开(公告)号:US08698660B2

    公开(公告)日:2014-04-15

    申请号:US13665801

    申请日:2012-10-31

    CPC classification number: H03M3/458 H03M3/42 H03M3/448 H03M3/456 H03M3/47

    Abstract: The present application describes an apparatus and method for improving the performance of ΣΔ modulators functioning as ADCs. In one embodiment, the ΣΔ modulator comprises a plurality of quantizers operating in a round-robin fashion, rather than the single quantizer of the prior art. The use of multiple quantizers allows the ΣΔ modulator to appear to be functioning at a significantly higher rate than a single quantizer allows. In another embodiment, a second-order ΣΔ modulator contains a plurality of control loops, rather than the single control loop of the prior art. The use of multiple control loops allows the ΣΔ modulator to have multiple points of maximum signal-to-noise ratio rather than a single such point as in prior art ΣΔ modulators.

    Abstract translation: 本申请描述了一种用于提高&Sgr& Dgr的性能的装置和方法; 作为ADC的调制器。 在一个实施例中,&S& 调制器包括以循环方式操作的多个量化器,而不是现有技术的单个量化器。 使用多个量化器允许&Sgr;&Dgr; 调制器似乎以比单个量化器更高的速率运行。 在另一个实施例中,二阶&S& 调制器包含多个控制回路,而不是现有技术的单个控制回路。 使用多个控制循环允许&Sgr;&Dgr; 调制器具有多个最大信噪比的点,而不是现有技术中的单个点;&Dgr; 调制器

    Feedback in Noise Shaping Control Loop
    39.
    发明申请
    Feedback in Noise Shaping Control Loop 失效
    噪声整形控制回路中的反馈

    公开(公告)号:US20130106486A1

    公开(公告)日:2013-05-02

    申请号:US13665801

    申请日:2012-10-31

    CPC classification number: H03M3/458 H03M3/42 H03M3/448 H03M3/456 H03M3/47

    Abstract: The present application describes an apparatus and method for improving the performance of ΣΔ modulators functioning as ADCs. In one embodiment, the ΣΔ modulator comprises a plurality of quantizers operating in a round-robin fashion, rather than the single quantizer of the prior art. The use of multiple quantizers allows the ΣΔ modulator to appear to be functioning at a significantly higher rate than a single quantizer allows. In another embodiment, a second-order ΣΔ modulator contains a plurality of control loops, rather than the single control loop of the prior art. The use of multiple control loops allows the ΣΔ modulator to have multiple points of maximum signal-to-noise ratio rather than a single such point as in prior art ΣΔ modulators.

    Abstract translation: 本申请描述了用于改善用作ADC的SigmaDelta调制器的性能的装置和方法。 在一个实施例中,SigmaDelta调制器包括以循环方式操作的多个量化器,而不是现有技术的单个量化器。 使用多个量化器可以使SigmaDelta调制器以比单个量化器允许的更高的速率运行。 在另一个实施例中,二阶SigmaDelta调制器包含多个控制回路,而不是现有技术的单个控制回路。 使用多个控制回路允许SigmaDelta调制器具有多个最大信噪比的点,而不是像现有技术的SigmaDelta调制器中的单个点。

    Determination of effects of physical activity on electrical load devices

    公开(公告)号:US10798479B2

    公开(公告)日:2020-10-06

    申请号:US16672473

    申请日:2019-11-03

    Abstract: An improved system and method for recognizing an audio signal due to physical activity and taking a predetermined action in response is disclosed. A “reverse noise signal” created by the sound pressure wave of the physical activity acting on the earpiece transducer is obtained. In some embodiments, an ambient noise signal is inverted and fed back, and the inverted signal is added to the intended audio signal being sent to the earpiece so that the ambient noise is cancelled. In other embodiments, a processor receives the ambient noise signal and predicts the modification to the intended audio signal needed to counteract the ambient noise. In other embodiments, the reverse noise signal may represent a motor or biological activity of a user; the system may take different actions in response to different physical activities, such as a heart beat of the user, or a tap, footfall, or swallowing by the user.

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