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    Magnetoresistive stack and method of fabricating same
    33.
    发明授权
    Magnetoresistive stack and method of fabricating same 有权

    公开(公告)号：US10516103B1

    公开(公告)日：2019-12-24

    申请号：US16551952

    申请日：2019-08-27

    Applicant: Everspin Technologies, Inc.

    Inventor： Renu Whig ,  Jijun Sun ,  Nicholas Rizzo ,  Jon Slaughter ,  Dimitri Houssameddine ,  Frederick Mancoff

    IPC: H01L21/00 ,  H01L43/12 ,  G11C11/16 ,  H01L43/08 ,  H01L43/02 ,  H01L43/10

    Abstract: A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.

    Method of manufacturing a magnetoresistive stack/ structure using plurality of encapsulation layers
    34.
    发明授权
    Method of manufacturing a magnetoresistive stack/ structure using plurality of encapsulation layers 有权

    公开(公告)号：US10483460B2

    公开(公告)日：2019-11-19

    申请号：US15337123

    申请日：2016-10-28

    Applicant: Everspin Technologies, Inc.

    Inventor： Kerry Joseph Nagel ,  Wenchin Lin ,  Sarin A. Deshpande ,  Jijun Sun ,  Sanjeev Aggarwal ,  Chaitanya Mudivarthi

    IPC: H01L43/12 ,  G11C11/16 ,  H01L43/08

    Abstract: A method of manufacturing a magnetoresistive stack/structure comprising etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer; depositing a first encapsulation layer on the sidewalls of the second magnetic region and over the dielectric layer; etching the first encapsulation layer which is disposed over the exposed surface of the dielectric layer. The method further includes (a) depositing a second encapsulation layer: (i) on the first encapsulation layer disposed on the sidewalls of the second magnetic region and (ii) over the exposed surface of the dielectric layer and (b) depositing a third encapsulation layer: (i) on the second encapsulation layer which is on the first encapsulation layer and the exposed surface of the dielectric layer. The method also includes etching the remaining layers of the stack/structure (via one or more etch processes).

    MAGNETORESISTIVE STACKS AND METHODS THEREFOR
    35.
    发明申请
    MAGNETORESISTIVE STACKS AND METHODS THEREFOR 审中-公开

    公开(公告)号：US20190305213A1

    公开(公告)日：2019-10-03

    申请号：US15941025

    申请日：2018-03-30

    Applicant: Everspin Technologies, Inc.

    Inventor： Jijun Sun

    IPC: H01L43/08 ,  H01L43/12 ,  H01L43/02 ,  H01L43/10 ,  G11C11/16

    Abstract: A magnetoresistive device may include a tunnel barrier region, a magnetically fixed region positioned on one side of the tunnel barrier region, and a magnetically free region positioned on an opposite side of the tunnel barrier region. The magnetically free region may include a plurality of ferromagnetic regions and at least one nonmagnetic insertion region. At least one ferromagnetic region of the plurality of ferromagnetic regions may include a multi-layer structure comprising a first layer of cobalt, and a second layer including at least one of platinum or palladium

    Magnetic field sensor
    38.
    发明授权
    Magnetic field sensor 有权

    公开(公告)号：US09640753B2

    公开(公告)日：2017-05-02

    申请号：US14168095

    申请日：2014-01-30

    Applicant: EVERSPIN TECHNOLOGIES, INC.

    Inventor： Jijun Sun ,  Phillip Mather ,  Srinivas Pietambaram ,  Jon Slaughter ,  Renu Whig ,  Nicholas Rizzo

    IPC: G01R33/06 ,  H01L43/10 ,  G01R33/09 ,  H01L43/12

    CPC classification number: H01L43/10 ,  G01R33/098 ,  H01L43/12 ,  Y10T29/49117

    Abstract: A sensor and fabrication process are provided for forming reference layers with substantially orthogonal magnetization directions having zero offset with a small compensation angle. An exemplary embodiment includes a sensor layer stack of a magnetoresistive thin-film based magnetic field sensor, the sensor layer stack comprising a pinning layer; a pinned layer including a layer of amorphous material over the pinning layer, and a first layer of crystalline material over the layer of amorphous material; a nonmagnetic coupling layer over the pinned layer; a fixed layer over the nonmagnetic coupling layer; a tunnel barrier over the fixed layer; and a sense layer over the nonmagnetic intermediate layer. Another embodiment includes a sensor layer stack where a pinned layer including two crystalline layers separated by a amorphous layer.

    Magnetoresistive memory element and method of fabricating same
    39.
    发明授权
    Magnetoresistive memory element and method of fabricating same 有权
    磁阻存储元件及其制造方法

    公开(公告)号：US09553258B2

    公开(公告)日：2017-01-24

    申请号：US14860657

    申请日：2015-09-21

    Applicant: Everspin Technologies, Inc.

    Inventor： Renu Whig ,  Jijun Sun ,  Nicholas Rizzo ,  Jon Slaughter ,  Dimitri Houssameddine ,  Frederick Mancoff

    IPC: H01L21/8234 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01L43/02 ,  G11C11/16

    CPC classification number: H01L43/12 ,  G11C11/161 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

    Abstract: A magnetoresistive memory element (for example, a spin-torque magnetoresistive memory element), includes first and second dielectric layers, wherein at least one of the dielectric layers is a magnetic tunnel junction. The memory element also includes a free magnetic layer having a first surface in contact with the first dielectric layer and a second surface in contact with the second dielectric layer. The free magnetic layer, which is disposed between the first and second dielectric layers, includes (i) a first high-iron interface region located along the first surface of the free magnetic layer, wherein the first high-iron interface region has at least 50% iron by atomic composition, and (ii) a first layer of ferromagnetic material adjacent to the first high-iron interface region, the first high-iron interface region between the first layer of ferromagnetic material and the first surface of the free magnetic layer.

    Abstract translation: 磁阻存储元件（例如，自旋扭矩磁阻存储元件）包括第一和第二电介质层，其中至少一个电介质层是磁性隧道结。 存储元件还包括具有与第一介电层接触的第一表面和与第二介电层接触的第二表面的自由磁性层。 设置在第一和第二电介质层之间的自由磁性层包括（i）沿着自由磁性层的第一表面设置的第一高铁界面区域，其中第一高铁界面区域具有至少50 以及（ii）与第一高铁界面区域相邻的第一铁磁材料层，第一铁磁材料层与自由磁性层的第一表面之间的第一高铁界面区域。

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