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    Atomic execution over accesses to multiple memory locations in a multiprocessor system
    31.
    发明授权
    Atomic execution over accesses to multiple memory locations in a multiprocessor system 有权
    通过对多处理器系统中的多个内存位置的访问进行原子执行

    公开(公告)号：US08799583B2

    公开(公告)日：2014-08-05

    申请号：US12786787

    申请日：2010-05-25

    申请人： Mark S. Farrell ,  Jonathan T. Hsieh ,  Christian Jacobi ,  Timothy J. Slegel

    发明人： Mark S. Farrell ,  Jonathan T. Hsieh ,  Christian Jacobi ,  Timothy J. Slegel

    IPC分类号： G06F12/00

    CPC分类号： G06F12/084 ,  G06F9/30043 ,  G06F9/30072 ,  G06F9/3834 ,  G06F9/528 ,  G06F12/0815 ,  G06F2212/62

    摘要： A method and central processing unit supporting atomic access of shared data by a sequence of memory access operations. A processor status flag is reset. A processor executes, subsequent to the setting of the processor status flag, a sequence of program instructions with instructions accessing a subset of shared data contained within its local cache. During execution of the sequence of program instructions and in response to a modification by another processor of the subset of shared data, the processor status flag is set. Subsequent to the executing the sequence of program instructions and based upon the state of the processor status flag, either a first program processing or a second program processing is executed. In some examples the first program processing includes storing results data into the local cache and the second program processing includes discarding the results data.

    摘要翻译： 一种通过一系列存储器访问操作支持共享数据的原子访问的方法和中央处理单元。 处理器状态标志被复位。 在处理器状态标志的设置之后，处理器执行具有访问包含在其本地高速缓存中的共享数据的子集的指令的程序指令序列。 在程序指令序列的执行期间，并且响应于另一个处理器对共享数据子集的修改，处理器状态标志被置位。 在执行程序指令序列之后，并且基于处理器状态标志的状态，执行第一程序处理或第二程序处理。 在一些示例中，第一程序处理包括将结果数据存储到本地高速缓存中，并且第二程序处理包括丢弃结果数据。

    Determination of running status of logical processor
    32.
    发明授权
    Determination of running status of logical processor 有权
    确定逻辑处理器的运行状态

    公开(公告)号：US08689230B2

    公开(公告)日：2014-04-01

    申请号：US13619400

    申请日：2012-09-14

    申请人： Greg A. Dyck ,  Mark S. Farrell ,  Charles W. Gainey ,  Jeffrey P. Kubala ,  Robert R. Rogers ,  Mark A. Wisniewski

    发明人： Greg A. Dyck ,  Mark S. Farrell ,  Charles W. Gainey ,  Jeffrey P. Kubala ,  Robert R. Rogers ,  Mark A. Wisniewski

    IPC分类号： G06F9/46 ,  G06F13/00 ,  G06F11/00

    CPC分类号： G06F9/52 ,  G06F9/4843 ,  G06F9/5077

    摘要： An embodiment provides for operating an information processing system. An aspect of the invention includes allocating an execution interval to a first logical processor of a plurality of logical processors of the information processing system. The execution interval is allocated for use by the first logical processor in executing instructions on a physical processor of the information processing system. The first logical processor determines that a resource required for execution by the first logical processor is locked by another one of the other logical processors. An instruction is issued by the first logical processor to determine whether a lock-holding logical processor is currently running. The lock-holding logical processor waits to release the lock if it is currently running. A command is issued by the first logical processor to a super-privileged process for relinquishing the allocated execution interval by the first logical processor if the locking holding processor is not running.

    摘要翻译： 实施例提供了操作信息处理系统。 本发明的一个方面包括将执行间隔分配给信息处理系统的多个逻辑处理器的第一逻辑处理器。 执行间隔被分配供第一逻辑处理器在信息处理系统的物理处理器上执行指令时使用。 第一逻辑处理器确定由第一逻辑处理器执行所需的资源被另一个其他逻辑处理器锁定。 由第一逻辑处理器发出指令以确定锁定保持逻辑处理器当前是否正在运行。 锁定逻辑处理器等待释放锁定，如果它当前正在运行。 如果锁定保持处理器不在运行，则由第一逻辑处理器发出命令到超级特权进程以放弃由第一逻辑处理器分配的执行间隔。

    RUN-TIME INSTRUMENTATION REPORTING
    33.
    发明申请
    RUN-TIME INSTRUMENTATION REPORTING 有权
    运行时间仪表报告

    公开(公告)号：US20130246755A1

    公开(公告)日：2013-09-19

    申请号：US13422552

    申请日：2012-03-16

    申请人： Mark S. Farrell ,  Charles W. Gainey, JR. ,  Marcel Mitran ,  Chung-Lung K. Shum ,  Brian L. Smith

    发明人： Mark S. Farrell ,  Charles W. Gainey, JR. ,  Marcel Mitran ,  Chung-Lung K. Shum ,  Brian L. Smith

    IPC分类号： G06F9/30

    CPC分类号： G06F9/30145 ,  G06F9/3005 ,  G06F9/45504 ,  G06F11/3636 ,  G06F11/3648

    摘要： Embodiments of the invention relate to run-time instrumentation reporting. An instruction stream is executed by a processor. Run-time instrumentation information of the executing instruction stream is captured by the processor. Run-time instrumentation records are created based on the captured run-time instrumentation information. A run-time instrumentation sample point of the executing instruction stream on the processor is detected. A reporting group is stored in a run-time instrumentation program buffer. The storing is based on the detecting and the storing includes: determining a current address of the run-time instrumentation program buffer, the determining based on instruction accessible run-time instrumentation controls; and storing the reporting group into the run-time instrumentation program buffer based on an origin address and the current address of the run-time instrumentation program buffer, the reporting group including the created run-time instrumentation records.

    摘要翻译： 本发明的实施例涉及运行时仪表报告。 指令流由处理器执行。 处理器捕获执行指令流的运行时检测信息。 基于捕获的运行时间检测信息创建运行时检测记录。 检测处理器上执行指令流的运行时检测采样点。 报告组存储在运行时仪表程序缓冲区中。 存储是基于检测和存储包括：确定运行时仪表程序缓冲器的当前地址，基于指令可访问的运行时仪表控制的确定; 并且基于源地址和运行时仪表程序缓冲器的当前地址将报告组存储到运行时检测程序缓冲器中，报告组包括创建的运行时仪表记录。

    CONVERTING A MESSAGE SIGNALED INTERRUPTION INTO AN I/O ADAPTER EVENT NOTIFICATION
    36.
    发明申请
    CONVERTING A MESSAGE SIGNALED INTERRUPTION INTO AN I/O ADAPTER EVENT NOTIFICATION 有权
    将消息信号中断转换为I / O适配器事件通知

    公开(公告)号：US20110321061A1

    公开(公告)日：2011-12-29

    申请号：US12821175

    申请日：2010-06-23

    申请人： David Craddock ,  Janet R. Easton ,  Mark S. Farrell ,  Thomas A. Gregg ,  Eric N. Lais ,  Gustav E. Sittmann, III

    发明人： David Craddock ,  Janet R. Easton ,  Mark S. Farrell ,  Thomas A. Gregg ,  Eric N. Lais ,  Gustav E. Sittmann, III

    IPC分类号： G06F9/44 ,  G06F13/24

    CPC分类号： G06F13/24 ,  G06F9/4812 ,  G06F2213/0026

    摘要： One or more message signaled interruption requests from one or more input/output (I/O) adapters are converted to I/O adapter event notifications. Each I/O adapter event notification includes the setting of one or more specific indicators in system memory and an interruption request, the first of which results in a pending I/O adapter interruption request. While a request for an I/O adapter interruption is pending, subsequent message signaled interruption requests are converted to I/O adapter event notifications, but do not result in additional requests for I/O adapter interruptions.

    摘要翻译： 一个或多个来自一个或多个输入/输出（I / O）适配器的信号中断请求被转换为I / O适配器事件通知。 每个I / O适配器事件通知包括系统内存中的一个或多个特定指示符的设置和中断请求，其中第一个会导致挂起的I / O适配器中断请求。 当I / O适配器中断的请求处于待处理状态时，后续的消息信号中断请求将转换为I / O适配器事件通知，但不会导致对I / O适配器中断的其他请求。

    Exhaust diffuser for a truck
    39.
    发明授权
    Exhaust diffuser for a truck 有权
    叉车尾气扩散器

    公开(公告)号：US08056328B2

    公开(公告)日：2011-11-15

    申请号：US11999877

    申请日：2007-12-07

    申请人： Mark S. Farrell ,  Ralph B. Pastore

    发明人： Mark S. Farrell ,  Ralph B. Pastore

    IPC分类号： F01N7/00

    CPC分类号： F01N13/007

    摘要： An apparatus for diluting and diffusing engine exhaust, includes a diffuser pipe horizontally oriented and having an inlet connection to receive exhaust gases from an engine and having an outlet defined as an elongated opening on an upper surface thereof, the inlet being disposed at about a longitudinal midpoint of the diffuser pipe, a deflector mounted in the diffuser pipe opposite the inlet to divide an entering exhaust gas flow toward opposite ends of the diffuser pipe, a baffle formed as an elongated plate having a multiplicity of holes mounted in the pipe between the inlet connection and the outlet and extending a length of the diffuser pipe, and, a dispersing grate formed as an elongated plate having a multiplicity of holes and being mounted above the outlet and spaced therefrom, the dispersing grate having a curvature about a longitudinal axis, and being mounted with a convex surface facing the outlet.

    摘要翻译： 一种用于稀释和扩散发动机排气的装置，包括水平定向的扩散管，并具有入口连接件，用于接收来自发动机的废气，并且在其上表面上具有限定为细长开口的出口，所述入口设置在纵向 扩散管的中点，安装在与入口相对的扩散管中的偏转器，以将进入的废气流分配到扩散管的相对端，形成为细长板的挡板，其具有安装在入口之间的管中的多个孔 连接和出口并延伸扩散管的长度，以及形成为具有多个孔并且安装在出口上方并与之隔开的细长板的分散格栅，分散格栅围绕纵向轴线具有曲率，并且 安装有面向出口的凸形表面。

    MICROPROCESSOR, METHOD AND COMPUTER PROGRAM PRODUCT FOR DIRECT PAGE PREFETCH IN MILLICODE CAPABLE COMPUTER SYSTEM
    40.
    发明申请
    MICROPROCESSOR, METHOD AND COMPUTER PROGRAM PRODUCT FOR DIRECT PAGE PREFETCH IN MILLICODE CAPABLE COMPUTER SYSTEM 有权
    MICROPROCESSOR，方法和计算机程序产品，用于在MILLICODE可编程计算机系统中直接提取

    公开(公告)号：US20090210662A1

    公开(公告)日：2009-08-20

    申请号：US12032041

    申请日：2008-02-15

    申请人： David A. Schroter ,  Mark S. Farrell ,  Jennifer Navarro ,  Chung-Lung Kevin Shum ,  Charles F. Webb

    发明人： David A. Schroter ,  Mark S. Farrell ,  Jennifer Navarro ,  Chung-Lung Kevin Shum ,  Charles F. Webb

    IPC分类号： G06F9/30 ,  G06F12/08

    CPC分类号： G06F9/30047 ,  G06F12/0862

    摘要： A microprocessor equipped to provide hardware initiated prefetching, includes at least one architecture for performing: issuance of a prefetch instruction; writing of a prefetch address into a prefetch fetch address register (PFAR); attempting a prefetch according to the address; detecting one of a cache miss and a cache hit; and if there is a cache miss, then sending a miss request to a next cache level and attempting cache access in a non-busy cycle; and if there is a cache hit, then incrementing the address in the PFAR and completing the prefetch. A method and a computer program product are provided.

    摘要翻译： 配备提供硬件发起预取的微处理器包括用于执行：发出预取指令的至少一个架构; 将预取地址写入预取提取地址寄存器（PFAR）; 根据地址尝试预取; 检测缓存未命中和缓存命中之一; 并且如果存在高速缓存未命中，则将错误请求发送到下一个高速缓存级别，并在非繁忙周期中尝试高速缓存访​​问; 并且如果存在缓存命中，则增加PFAR中的地址并完成预取。 提供了一种方法和计算机程序产品。