公开(公告)号：US08750635B2

公开(公告)日：2014-06-10

申请号：US13614502

申请日：2012-09-13

申请人： Masatoshi Yokokawa ,  Takefumi Nagumo ,  Jun Luo

发明人： Masatoshi Yokokawa ,  Takefumi Nagumo ,  Jun Luo

IPC分类号： G06K9/36

CPC分类号： G06T5/002 ,  G06T5/50 ,  G06T7/223 ,  G06T2207/10016 ,  H04N5/21 ,  H04N5/23267

摘要： There is provided an image processing apparatus including a local-motion-compensation-processing unit which generates a local-motion-compensation image by detecting a local motion vector, which is a motion vector for each block forming an image, from a standard image and a reference image, and performing motion compensation on the reference image using the local motion vector, a global-motion-compensation-processing unit which generates a global-motion-compensation image by calculating a global motion vector, which is a motion vector for an entire image between the standard image and the reference image, using the local motion vector, and performing motion compensation on the reference image using the global motion vector, and a blend processing unit which generates a blend-motion-compensation image by combining a pixel value of a pixel in the local-motion-compensation image and a pixel value of a pixel in the global-motion-compensation image based on a noise intensity for a luminance value of an image.

摘要翻译： 提供了一种图像处理装置，其包括局部运动补偿处理单元，其通过从标准图像检测作为形成图像的每个块的运动矢量的局部运动矢量来生成局部运动补偿图像，以及 参考图像，并使用局部运动矢量对参考图像执行运动补偿;全局运动补偿处理单元，其通过计算全局运动补偿图像来生成全局运动补偿图像，该全局运动补偿图像是用于 使用局部运动矢量在标准图像和参考图像之间的整个图像，以及使用全局运动矢量对参考图像执行运动补偿;以及混合处理单元，其通过组合像素值来生成混合运动补偿图像 的局部运动补偿图像中的像素和全局运动补偿图像中的像素的像素值，基于亮度的噪声强度 图像的值。

公开(公告)号：US08597535B2

公开(公告)日：2013-12-03

申请号：US13108404

申请日：2011-05-16

申请人： Jun Luo ,  Wesley Hackenberger

发明人： Jun Luo ,  Wesley Hackenberger

IPC分类号： C04B35/493 ,  H01L41/187

CPC分类号： C30B11/00 ,  C04B35/499 ,  C04B2235/3206 ,  C04B2235/3255 ,  C04B2235/3286 ,  C30B29/22 ,  C30B29/30 ,  C30B29/32 ,  H01L41/1875 ,  H01L41/41

摘要： A ternary single crystal relaxor piezoelectric of PMN-PZ-PT grown from a novel melt using the Vertical Bridgeman method. The ternary single crystals are characterized by a Curie temperature, Tc, of at least 150° C. and a rhombohedral to tetragonal phase transition temperature, Trt, of at least about 110° C. The ternary crystals further exhibit a piezoelectric coefficient, d33, in the range of at least about 1200-2000 pC/N.

摘要翻译： 使用Vertical Bridgeman方法从新型熔体生长的PMN-PZ-PT的三元单晶弛豫压电体。 三元单晶的特征在​​于居里温度Tc至少为150℃，菱方相至四方相转变温度Trt为至少约110℃。三元晶体还表现出压电系数d33， 在至少约1200-2000pC / N的范围内。

公开(公告)号：US20130270615A1

公开(公告)日：2013-10-17

申请号：US13508731

申请日：2011-09-28

申请人： Dongping Wu ,  Jun Luo ,  Yinghua Piao ,  Zhiwei Zhu ,  Shili Zhang ,  Wei Zhang

发明人： Dongping Wu ,  Jun Luo ,  Yinghua Piao ,  Zhiwei Zhu ,  Shili Zhang ,  Wei Zhang

IPC分类号： H01L29/78 ,  H01L29/66

CPC分类号： H01L29/7839 ,  H01L29/6653 ,  H01L29/66848

摘要： A method of making a transistor, comprising: providing a semiconductor substrate; forming a gate stack over the semiconductor substrate; forming an insulating layer over the semiconductor substrate; forming a depleting layer over the insulating layer; etching the depleting layer and the insulating layer; forming a metal layer over the semiconductor substrate; performing thermal annealing; and removing the metal layer. As advantages of the present invention, an upper outside part of each of the sidewalls include a material that can react with the metal layer, so that metal on two sides of the sidewalls is absorbed during the annealing process, preventing the metal from diffusing toward the semiconductor layer, and ensuring that the formed Schottky junctions can be ultra-thin and uniform, and have controllable and suppressed lateral growth.

摘要翻译： 一种制造晶体管的方法，包括：提供半导体衬底; 在所述半导体衬底上形成栅叠层; 在半导体衬底上形成绝缘层; 在绝缘层上形成耗尽层; 蚀刻耗尽层和绝缘层; 在所述半导体衬底上形成金属层; 进行热退火; 并去除金属层。 作为本发明的优点，每个侧壁的上部外侧部分包括能够与金属层反应的材料，从而在退火过程中吸收侧壁两侧的金属，从而防止金属朝向 半导体层，并且确保形成的肖特基结可以是超薄和均匀的，并且具有可控和抑制的横向生长。

公开(公告)号：US08536053B2

公开(公告)日：2013-09-17

申请号：US13063922

申请日：2011-01-27

申请人： Jun Luo ,  Chao Zhao ,  Huicai Zhong

发明人： Jun Luo ,  Chao Zhao ,  Huicai Zhong

IPC分类号： H01L21/28

CPC分类号： H01L29/41775 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545

摘要： A method for restricting lateral encroachment of the metal silicide into the channel region, comprising: providing a semiconductor substrate, a gate stack being formed on the semiconductor substrate, a source region being formed in the semiconductor on one side of the gate stack, and a drain region being formed in the semiconductor substrate on the other side of the gate stack; forming a sacrificial spacer around the gate stack and on the semiconductor substrate; depositing a metal layer for covering the semiconductor substrate, the gate stack and the sacrificial spacer; performing a thermal treatment on the semiconductor substrate, thereby causing the metal layer to react with the sacrificial spacer and the semiconductor substrate in the source region and the drain region; removing the sacrificial spacer, reaction products of the sacrificial spacer and the metal layer, and a part of the metal layer which does not react with the sacrificial spacer.

摘要翻译： 一种用于限制金属硅化物向通道区域的横向侵入的方法，包括：提供半导体衬底，形成在半导体衬底上的栅堆叠，形成在栅叠层一侧的半导体中的源区， 漏极区域形成在栅极堆叠的另一侧上的半导体衬底中; 在所述栅极堆叠和所述半导体衬底上形成牺牲隔离物; 沉积用于覆盖半导体衬底，栅极堆叠和牺牲间隔物的金属层; 对所述半导体基板进行热处理，由此使所述金属层与所述源极区域和所述漏极区域中的所述牺牲隔离物和所述半导体基板反应; 去除牺牲间隔物，牺牲间隔物和金属层的反应产物，以及不与牺牲间隔物反应的金属层的一部分。

公开(公告)号：US20130221414A1

公开(公告)日：2013-08-29

申请号：US13697319

申请日：2012-03-26

申请人： Chao Zhao ,  Jun Luo ,  Huicai Zhong

发明人： Chao Zhao ,  Jun Luo ,  Huicai Zhong

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66795 ,  H01L29/785 ,  H01L2029/7858

摘要： The present invention provides a semiconductor FET and a method for manufacturing the same. The semiconductor FET may comprise: a gate wall; a fin outside the gate wall, both ends of the fin being connected with the source/drain regions on both ends of the fin; and a contact wall on both sides of the gate wall, the contact wall being connected with the source/drain regions via the underlying silicide layer, wherein an airgap is provided around the gate wall. Since an airgap is formed around the gate wall, and particularly the airgap is formed between the gate wall and the contact wall, it is possible to decrease the parasitic capacitance between the gate wall and the contact wall. As a result, the problem of excessive parasitic capacitance resulting from use of the contact wall can be effectively alleviated.

摘要翻译： 本发明提供一种半导体FET及其制造方法。 半导体FET可以包括：栅极壁; 在门壁外的翅片，翅片的两端与翅片两端的源极/漏极区域连接; 以及在栅极壁的两侧上的接触壁，所述接触壁经由下面的硅化物层与源极/漏极区域连接，其中在栅极壁周围设置气隙。 由于在栅极壁周围形成气隙，特别是在栅极壁和接触壁之间形成气隙，因此能够降低栅极壁与接触壁之间的寄生电容。 结果，可以有效地缓解由使用接触壁引起的过大的寄生电容的问题。

公开(公告)号：US20130062708A1

公开(公告)日：2013-03-14

申请号：US13577942

申请日：2011-11-18

申请人： Huicai Zhong ,  Qingqing Liang ,  Jun Luo ,  Chao Zhao

发明人： Huicai Zhong ,  Qingqing Liang ,  Jun Luo ,  Chao Zhao

IPC分类号： H01L21/762 ,  H01L27/088

CPC分类号： H01L29/66795 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/823821 ,  H01L21/823878 ,  H01L21/845 ,  H01L29/0649 ,  H01L29/66545 ,  H01L29/785

摘要： A semiconductor device structure, a method for manufacturing the same, and a method for manufacturing a semiconductor fin are disclosed. In one embodiment, the method for manufacturing the semiconductor device structure comprises: forming a fin in a first direction on a semiconductor substrate; forming a gate line in a second direction, the second direction crossing the first direction on the semiconductor substrate, and the gate line intersecting the fin with a gate dielectric layer sandwiched between the gate line and the fin; forming a dielectric spacer surrounding the gate line; and performing inter-device electrical isolation at a predetermined position, wherein isolated portions of the gate line form independent gate electrodes of respective devices.

摘要翻译： 公开了一种半导体器件结构，其制造方法和半导体鳍片的制造方法。 在一个实施例中，制造半导体器件结构的方法包括：在半导体衬底上沿第一方向形成翅片; 在第二方向上形成栅极线，在半导体衬底上与第一方向交叉的第二方向和与鳍状物交叉的栅极线与夹在栅极线和鳍之间的栅极电介质层形成栅极线; 形成围绕所述栅极线的介电隔离层; 以及在预定位置执行器件间电隔离，其中所述栅极线的隔离部分形成各个器件的独立栅电极。

公开(公告)号：US20110235942A1

公开(公告)日：2011-09-29

申请号：US13030447

申请日：2011-02-18

申请人： Jun Luo ,  Takefumi Nagumo ,  Yuhi Kondo

发明人： Jun Luo ,  Takefumi Nagumo ,  Yuhi Kondo

IPC分类号： G06K9/40

CPC分类号： G06T5/003 ,  G06T5/50 ,  G06T2207/10016 ,  G06T2207/10024 ,  G06T2207/20012 ,  G06T2207/20021 ,  G06T2207/20201

摘要： An image processing apparatus includes: a motion prediction processing unit detecting an inter-image motion between a standard image and a reference image; a motion compensation processing unit generating a motion-compensated image by moving the reference image so as to be aligned with the standard image in a pixel position; an addition processing unit generating a noise-reduced image from which noise of the standard image is reduced; and an addition determination unit calculating an addition weight of the motion-compensated image. The addition determination unit includes a first motion region detection unit calculating a motion region determination value, a second motion region detection unit calculating a motion region determination value, a control map generation unit selecting and outputting one of two motion region determination values, a noise determination table generation unit generating or correcting a noise determination table, and an addition determination processing execution unit determining the addition weight.

摘要翻译： 一种图像处理装置，包括：运动预测处理单元，检测标准图像与参考图像之间的图像间运动; 运动补偿处理单元，通过移动所述参考图像以在像素位置与所述标准图像对准来生成运动补偿图像; 生成降低了标准图像噪声的降噪图像的加法处理单元; 以及加法确定单元，计算运动补偿图像的加权重量。 加法确定单元包括计算运动区域确定值的第一运动区域检测单元，计算运动区域确定值的第二运动区域检测单元，选择并输出两个运动区域确定值之一的控制图生成单元，噪声判定 生成或校正噪声判定表的表生成单元，以及确定加权重的加法确定处理执行单元。

公开(公告)号：US20110121949A1

公开(公告)日：2011-05-26

申请号：US12924413

申请日：2010-09-27

申请人： Dongning Guo ,  Jun Luo

发明人： Dongning Guo ,  Jun Luo

IPC分类号： G06K7/016

CPC分类号： H04W72/1257 ,  H04W72/0446 ,  H04W72/0466

摘要： A system including a number of wireless communication nodes spaced apart from one another. The nodes are structured to transmit and receive unique signatures. A neighborhood of nodes may be discovered based on the unique signatures.

摘要翻译： 一种包括彼此间隔开的多个无线通信节点的系统。 这些节点的结构是发送和接收独特的签名。 可以基于唯一签名来发现节点邻域。

公开(公告)号：US07874348B2

公开(公告)日：2011-01-25

申请号：US12202403

申请日：2008-09-01

申请人： Jian Liu ,  Jun Luo

发明人： Jian Liu ,  Jun Luo

IPC分类号： H05K7/20

CPC分类号： H01L23/427 ,  H01L23/467 ,  H01L2924/0002 ,  H01L2924/00

摘要： A fan holder used to secure a fan to a heat dissipation device, includes a main body for mounting the fan thereon, a pair of blocking wings and a pair of baffle walls extending from the main body to define a space for receiving the fan therein. The blocking wings each include a pair of locking protrusions engaging in the fan to prevent the fan from moving vertically. The baffle walls each includes a pair of blocking flanges fittingly received in cutouts defied in the fan to prevent the fan from moving horizontally along a lateral direction of the fan holder. The baffle walls engage with front and rear sides of the fan for preventing the fan from moving along a front-to-rear direction.

摘要翻译： 用于将风扇固定到散热装置的风扇架包括：用于将风扇安装在其上的主体，一对阻挡翼和从主体延伸的一对挡板，以限定用于在其中容纳风扇的空间。 阻挡翼各自包括一对接合在风扇中的锁定突起，以防止风扇垂直移动。 挡板壁每个包括一对阻挡凸缘，其适合地接收在风扇中的缺口中，以防止风扇沿风扇保持器的横向方向水平移动。 挡板壁与风扇的前侧和后侧接合，以防止风扇沿着前后方向移动。

公开(公告)号：USD598730S1

公开(公告)日：2009-08-25

申请号：US29282551

申请日：2007-07-24

申请人： Jun Luo ,  Desheng Li

设计人： Jun Luo ,  Desheng Li