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公开(公告)号:US20090224791A1
公开(公告)日:2009-09-10
申请号:US12042606
申请日:2008-03-05
申请人: Hsiao-Tsung Yen , Tzu-Jin Yeh , Sally Liu
发明人: Hsiao-Tsung Yen , Tzu-Jin Yeh , Sally Liu
IPC分类号: G01R31/27
CPC分类号: G01R31/2884 , H01L22/34
摘要: A method and system for de-embedding an on-wafer device is disclosed. The method comprises representing the intrinsic characteristics of a test structure using a set of ABCD matrix components; determining the intrinsic characteristics arising from the test structure; and using the determined intrinsic characteristics of the test structure to produce a set of parameters representative of the intrinsic characteristics of a device-under-test (“DUT”).
摘要翻译: 公开了一种用于去嵌入晶片装置的方法和系统。 该方法包括使用一组ABCD矩阵分量表示测试结构的固有特性; 确定测试结构产生的内在特性; 并且使用确定的测试结构的固有特性来产生表示待测器件(“DUT”)的固有特性的一组参数。
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公开(公告)号:US07954080B2
公开(公告)日:2011-05-31
申请号:US12042606
申请日:2008-03-05
申请人: Hsiao-Tsung Yen , Tzu-Jin Yeh , Sally Liu
发明人: Hsiao-Tsung Yen , Tzu-Jin Yeh , Sally Liu
IPC分类号: G06F17/50
CPC分类号: G01R31/2884 , H01L22/34
摘要: A method and system for de-embedding an on-wafer device is disclosed. The method comprises representing the intrinsic characteristics of a test structure using a set of ABCD matrix components; determining the intrinsic characteristics arising from the test structure; and using the determined intrinsic characteristics of the test structure to produce a set of parameters representative of the intrinsic characteristics of a device-under-test (“DUT”).
摘要翻译: 公开了一种用于去嵌入晶片装置的方法和系统。 该方法包括使用一组ABCD矩阵分量表示测试结构的固有特性; 确定测试结构产生的内在特性; 并且使用确定的测试结构的固有特性来产生表示待测器件(“DUT”)的固有特性的一组参数。
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公开(公告)号:US08890222B2
公开(公告)日:2014-11-18
申请号:US13365303
申请日:2012-02-03
申请人: Hsiao-Tsung Yen , Yu-Ling Lin
发明人: Hsiao-Tsung Yen , Yu-Ling Lin
IPC分类号: H01L27/108 , H01L29/8605
CPC分类号: H01L27/10808 , H01L21/823475 , H01L23/5226 , H01L23/5228 , H01L23/528 , H01L27/0629 , H01L27/0802 , H01L27/10844 , H01L27/10897 , H01L28/20 , H01L29/0653 , H01L2924/0002 , H01L2924/00
摘要: A meander line resistor structure comprises a first resistor formed on a first active region, wherein the first resistor is formed by a plurality of first vias connected in series, a second resistor formed on a second active region, wherein the second resistor is formed by a plurality of second vias connected in series and a third resistor formed on the second active region, wherein the third resistor is formed by a plurality of third vias connected in series. The meander line resistor further comprises a first connector coupled between the first resistor and the second resistor.
摘要翻译: 弯曲线电阻器结构包括形成在第一有源区上的第一电阻器,其中第一电阻器由串联连接的多个第一通孔形成,第二电阻器形成在第二有源区上,其中第二电阻器由 串联连接的多个第二通孔和形成在第二有源区上的第三电阻器,其中第三电阻器由串联连接的多个第三通孔形成。 曲折线电阻器还包括耦合在第一电阻器和第二电阻器之间的第一连接器。
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公开(公告)号:US20130168809A1
公开(公告)日:2013-07-04
申请号:US13340856
申请日:2011-12-30
申请人: Hsiao-Tsung Yen , Yu-Ling Lin , Ying-Ta Lu , Huan-Neng Chen , Ho-Hsiang Chen
发明人: Hsiao-Tsung Yen , Yu-Ling Lin , Ying-Ta Lu , Huan-Neng Chen , Ho-Hsiang Chen
IPC分类号: H01L23/485
CPC分类号: H01F27/2804 , H01F5/003 , H01F2027/2809 , H01L23/5226 , H01L23/5227 , H01L23/528 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要: The present disclosure provides a semiconductor device. The semiconductor device includes a first inductor formed on a first substrate; a second inductor formed on a second substrate and conductively coupled with the first inductor as a transformer; and a plurality of micro-bump features configured between the first and second substrates. The plurality of micro-bump features include a magnetic material having a relative permeability substantially greater than one and are configured to enhance coupling between the first and second inductors.
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公开(公告)号:US08264288B2
公开(公告)日:2012-09-11
申请号:US12957040
申请日:2010-11-30
申请人: Yu-Ling Lin , Ying-Ta Lu , Hsiao-Tsung Yen , Ho-Hsiang Chen , Chewn-Pu Jou , Fu-Lung Hsueh
发明人: Yu-Ling Lin , Ying-Ta Lu , Hsiao-Tsung Yen , Ho-Hsiang Chen , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号: H03L1/00
CPC分类号: H03B5/1228 , H03B5/1215 , H03B27/00 , H03B2200/0078 , H03B2200/0098
摘要: A circuit includes an oscillator circuit including a first oscillator and a second oscillator. The first and the second oscillators are configured to generate signal having a same frequency and different phases. A transmission line is coupled between the first and the second oscillators.
摘要翻译: 电路包括包括第一振荡器和第二振荡器的振荡器电路。 第一和第二振荡器被配置为产生具有相同频率和不同相位的信号。 传输线耦合在第一和第二振荡器之间。
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公开(公告)号:US08659126B2
公开(公告)日:2014-02-25
申请号:US13313240
申请日:2011-12-07
申请人: Yu-Ling Lin , Hsiao-Tsung Yen , Ho-Hsiang Chen , Chewn-Pu Jou
发明人: Yu-Ling Lin , Hsiao-Tsung Yen , Ho-Hsiang Chen , Chewn-Pu Jou
IPC分类号: H01L23/552
CPC分类号: H01L23/5227 , H01L23/5225 , H01L23/552 , H01L23/585 , H01L23/645 , H01L25/16 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2924/0002 , H01L2924/00
摘要: The present disclosure provides an Integrated Circuit (IC) device. The IC device includes a first die that contains an electronic component. The IC device includes second die that contains a ground shielding structure. The IC device includes a layer disposed between the first die and the second die. The layer couples the first die and the second die together. The present disclosure also involves a microelectronic device. The microelectronic device includes a first die that contains a plurality of first interconnect layers. An inductor coil structure is disposed in a subset of the first interconnect layers. The microelectronic device includes a second die that contains a plurality of second interconnect layers. A patterned ground shielding (PGS) structure is disposed in a subset of the second interconnect layers. The microelectronic device includes an underfill layer disposed between the first and second dies. The underfill layer contains one or more microbumps.
摘要翻译: 本公开提供了一种集成电路(IC)装置。 IC器件包括包含电子元件的第一管芯。 IC器件包括包含接地屏蔽结构的第二管芯。 IC器件包括设置在第一管芯和第二管芯之间的层。 该层将第一管芯和第二管芯结合在一起。 本公开还涉及微电子器件。 微电子器件包括包含多个第一互连层的第一管芯。 电感线圈结构设置在第一互连层的子集中。 微电子器件包括包含多个第二互连层的第二管芯。 图案化接地屏蔽(PGS)结构设置在第二互连层的子集中。 微电子器件包括设置在第一和第二裸片之间的底部填充层。 底层填充层包含一个或多个微胶囊。
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公开(公告)号:US20130200448A1
公开(公告)日:2013-08-08
申请号:US13365303
申请日:2012-02-03
申请人: Hsiao-Tsung Yen , Yu-Ling Lin
发明人: Hsiao-Tsung Yen , Yu-Ling Lin
IPC分类号: H01L27/108 , H01L21/8234 , H01L29/8605
CPC分类号: H01L27/10808 , H01L21/823475 , H01L23/5226 , H01L23/5228 , H01L23/528 , H01L27/0629 , H01L27/0802 , H01L27/10844 , H01L27/10897 , H01L28/20 , H01L29/0653 , H01L2924/0002 , H01L2924/00
摘要: A meander line resistor structure comprises a first resistor formed on a first active region, wherein the first resistor is formed by a plurality of first vias connected in series, a second resistor formed on a second active region, wherein the second resistor is formed by a plurality of second vias connected in series and a third resistor formed on the second active region, wherein the third resistor is formed by a plurality of third vias connected in series. The meander line resistor further comprises a first connector coupled between the first resistor and the second resistor.
摘要翻译: 弯曲线电阻器结构包括形成在第一有源区上的第一电阻器,其中第一电阻器由串联连接的多个第一通孔形成,第二电阻器形成在第二有源区上,其中第二电阻器由 串联连接的多个第二通孔和形成在第二有源区上的第三电阻器,其中第三电阻器由串联连接的多个第三通孔形成。 曲折线电阻器还包括耦合在第一电阻器和第二电阻器之间的第一连接器。
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公开(公告)号:US20130154053A1
公开(公告)日:2013-06-20
申请号:US13330127
申请日:2011-12-19
申请人: Hsiao-Tsung Yen , Yu-Ling Lin
发明人: Hsiao-Tsung Yen , Yu-Ling Lin
CPC分类号: H01F17/0006 , H01F2017/002 , H01F2017/0053 , H01L23/481 , H01L23/5227 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要: A device using an inductor with one or more through vias, and a method of manufacture is provided. In an embodiment, an inductor is formed in one or more of the metallization layers. One or more through vias are positioned directly below the inductor. The through vias may extend through one or more dielectric layers interposed between a substrate and the inductors. Additionally, the through vias may extend completely or partially through the substrate.
摘要翻译: 提供一种使用具有一个或多个通孔的电感器的装置,以及制造方法。 在一个实施例中,在一个或多个金属化层中形成电感器。 一个或多个通孔位于电感器正下方。 通孔可以延伸穿过介于衬底和电感器之间的一个或多个电介质层。 此外,通孔可以完全地或部分地延伸通过衬底。
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公开(公告)号:US08610247B2
公开(公告)日:2013-12-17
申请号:US13340856
申请日:2011-12-30
申请人: Hsiao-Tsung Yen , Yu-Ling Lin , Ying-Ta Lu , Huan-Neng Chen , Ho-Hsiang Chen
发明人: Hsiao-Tsung Yen , Yu-Ling Lin , Ying-Ta Lu , Huan-Neng Chen , Ho-Hsiang Chen
IPC分类号: H01L27/08
CPC分类号: H01F27/2804 , H01F5/003 , H01F2027/2809 , H01L23/5226 , H01L23/5227 , H01L23/528 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要: The present disclosure provides a semiconductor device. The semiconductor device includes a first inductor formed on a first substrate; a second inductor formed on a second substrate and conductively coupled with the first inductor as a transformer; and a plurality of micro-bump features configured between the first and second substrates. The plurality of micro-bump features include a magnetic material having a relative permeability substantially greater than one and are configured to enhance coupling between the first and second inductors.
摘要翻译: 本发明提供一种半导体器件。 半导体器件包括形成在第一衬底上的第一电感器; 第二电感器,其形成在第二基板上,并与所述第一电感器作为变压器导电耦合; 以及配置在第一和第二基板之间的多个微凸块特征。 多个微凸块特征包括具有相对磁导率基本上大于1的磁性材料,并且被配置为增强第一和第二电感器之间的耦合。
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公开(公告)号:US08580647B2
公开(公告)日:2013-11-12
申请号:US13330127
申请日:2011-12-19
申请人: Hsiao-Tsung Yen , Yu-Ling Lin
发明人: Hsiao-Tsung Yen , Yu-Ling Lin
IPC分类号: H01L21/20
CPC分类号: H01F17/0006 , H01F2017/002 , H01F2017/0053 , H01L23/481 , H01L23/5227 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要: A device using an inductor with one or more through vias, and a method of manufacture is provided. In an embodiment, an inductor is formed in one or more of the metallization layers. One or more through vias are positioned directly below the inductor. The through vias may extend through one or more dielectric layers interposed between a substrate and the inductors. Additionally, the through vias may extend completely or partially through the substrate.
摘要翻译: 提供一种使用具有一个或多个通孔的电感器的装置,以及制造方法。 在一个实施例中,在一个或多个金属化层中形成电感器。 一个或多个通孔位于电感器正下方。 通孔可以延伸穿过介于衬底和电感器之间的一个或多个电介质层。 此外,通孔可以完全地或部分地延伸通过衬底。
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